Very Large Scale Integrated Circuits VLSI Overview

VLSI stands for Very Large Scale Integrated Circuits.
SSI – Small Scale Integration (50s and 60s)
1 – 10 transistors
Simple logic gates
MSI – Medium Scale Integration(70s)
10-100 transistors
logic functions, counters, etc
LSI – Large Scale Integration(80s)
100-10,000 transistors
First microprocessors on the chip

1. VLSI

2. S.NO TITLE Author’s Assigned Code 1 Digital Integrated Circuits - A Design Perspective J. M. Rabaey RAB 2 Application-Specific Integrated Circuits M. John, S. Smith SMH Recommended Text Books:

3. Starting point  VLSI stands for V ery L arge S cale I ntegrated Circuits. Where did it come from? VLSI HISTORY SSI – Small Scale Integration (50s and 60s) 1 – 10 transistors Simple logic gates MSI – Medium Scale Integration(70s) 10-100 transistors logic functions, counters etc LSI – Large Scale Integration(80s) 100-10,000 transistors First microprocessors on the chip VLSI – Very Large Scale Integration(>90s) >10,000 Transistors Today we have more than 1billion transistors on a single chip. Some people call it ULSI or UULSI but then there will be no end VLSI Overview (Motivation)

4. Intel,s Itanium 2 Processor 2 core per die 1.72 billion transistors per die 90nm design (2003) Today 65nm

5. VLSI Overview (Motivation) Key feature: transistor length L 2002: L=130nm 2005: L= 90nm? CMOS Transistors

6. VLSI History - The First Computer VLSI Overview (Motivation)

7. VLSI History - ENIAC - The first electronic computer (1946) VLSI Overview (Motivation) 80 ft long 8.5 ft high several feet wide 18,000 vacuum tubes

8. VLSI History - The Transistor Revolution Bardeen 1948 VLSI Overview (Motivation) First transistor Bell Labs, 1948

9. VLSI History - The First Integrated Circuits Jack Kilby 1958 VLSI Overview (Motivation) Bipolar logic 1960’s ECL 3-input Gate Motorola 1966

10. VLSI History - Intel 4004 Micro-Processor VLSI Overview (Motivation) 1971 1000 transistors 1 MHz operation

11. VLSI History - Intel Pentium (IV) microprocessor VLSI Overview (Motivation) 2004 100 M transistors 3 GHz operation

12. VLSI Design Styles Full Custom Each circuit element carefully “handcrafted” Huge design effort High Design Costs/ Low Unit Cost High Performance Typically used for high-volume applications Application-Specific Integrated Circuit (ASIC ) Constrained design using pre-designed (and sometimes pre-manufactured) components Also called Semi-Custom design CAD tools reduce design effort Lower Design Cost/ Medium Unit Cost Medium Performance VLSI Overview (Motivation)

13. VLSI Design Styles (Contd.) Programmable Logic (PLD, FPGA) Pre-manufactured components with programmable interconnect CAD tools greatly reduce design effort Low Design Cost / High Unit Cost Lower Performance System-on-Chip ( SoC ) Relatively new field Pre-designed custom cores (e.g., microcontroller) - “intellectual property” (IP) ASIC logic for special-purpose hardware Programmable Logic (PLD, FPGA) for custom applications. Analog Components VLSI Overview (Motivation)

14. VLSI Trends: Moore’s Law In 1965, Gordon Moore predicted that transistors would continue to shrink, allowing: Doubled transistor density every 18-24 months Doubled performance every 18-24 months History has proven Moore right VLSI Overview (Motivation) I’m smiling because I was right! Gordon Moore Intel Co-Founder and Chairman Emeritus Image source: Intel Corporation www.intel.com

15. VLSI Trends: Moore’s Law VLSI Overview (Motivation)

16. VLSI Trends: Moore’s Law VLSI Overview (Motivation)

17. VLSI Trends: Transistor Counts VLSI Overview (Motivation) 1,000,000 100,000 10,000 1,000 10 100 1 1975 1980 1985 1990 1995 2000 2005 2010 8086 80286 i386 i486 Pentium ® Pentium ® Pro K 1 Billion Transistors Source: Intel Projected Pentium ® II Pentium ® III Courtesy, Intel

18. VLSI Trends: Moore’s law in Microprocessors VLSI Overview (Motivation) 4004 8008 8080 8085 8086 286 386 486 Pentium ® proc P6 0.001 0.01 0.1 1 10 100 1000 1970 1980 1990 2000 2010 Year Transistors (MT) 2X growth in 1.96 years! Transistors on Lead Microprocessors double every 2 years Courtesy, Intel

19. VLSI Trends: Frequency VLSI Overview (Motivation) P6 Pentium ® proc 486 386 286 8086 8085 8080 8008 4004 0.1 1 10 100 1000 10000 1970 1980 1990 2000 2010 Year Frequency (Mhz) Lead Microprocessors frequency doubles every 2 years Doubles every 2 years Courtesy, Intel

20. VLSI Trends: Power Dissipation VLSI Overview (Motivation) P6 Pentium ® proc 486 386 286 8086 8085 8080 8008 4004 0.1 1 10 100 1971 1974 1978 1985 1992 2000 Year Power (Watts) Lead Microprocessors power continues to increase Courtesy, Intel

21. VLSI Trends: Summary Transistor Count Increasing Transistor Size Decreasing Frequency Increasing Cost per Transistor Decreasing Power consumption per transistor Decreasing Gate delay Decreasing VLSI Overview (Motivation)

22. VLSI Trends: Summary (Contd.) Chip power consumption Increasing Chip pins Increasing Chip Cost More or less same Chip Size Increasing Supply voltage (Vdd) Decreasing VLSI Overview (Motivation)

23. VLSI Trends: Summary (Contd.) Connection Wires Becoming thinner and longer Connection Wire Layers Increasing VLSI Overview (Motivation)

24. VLSI Overview (Motivation)

25. VLSI Cost NRE (non-recurrent engineering) costs design time and effort, mask generation one-time cost factor Recurrent costs silicon processing, packaging, test proportional to volume proportional to chip area VLSI Overview (Motivation)

26. VLSI Cost Cost per IC = Variable cost per IC + (fixed cost / volume) Variable cost= (Cost of die + cost of die test + cost of packaging) /Final test yield VLSI Overview (Motivation)

27. VLSI Cost- Die Cost VLSI Overview (Motivation) Single die Wafer From http://www.amd.com Going up to 12” (30cm)

28. VLSI Cost- Cost per Transistor VLSI Overview (Motivation) 0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 1982 1985 1988 1991 1994 1997 2000 2003 2006 2009 2012 cost: ¢-per- transistor Fabrication capital cost per transistor (Moore’s law)

29. VLSI Cost- Yield VLSI Overview (Motivation)

30. VLSI Cost- Defects VLSI Overview (Motivation) a is approximately 3 a depends on complexity and is proportional to number of masks

31. VLSI Cost- Some Examples (1994) VLSI Overview (Motivation) Chip Metal layers Line width Wafer cost Def./ cm 2 Area mm 2 Dies/wafer Yield Die cost 386DX 2 0.90 $900 1.0 43 360 71% $4 486 DX2 3 0.80 $1200 1.0 81 181 54% $12 Power PC 601 4 0.80 $1700 1.3 121 115 28% $53 HP PA 7100 3 0.80 $1300 1.0 196 66 27% $73 DEC Alpha 3 0.70 $1500 1.2 234 53 19% $149 Super Sparc 3 0.70 $1700 1.6 256 48 13% $272 Pentium 3 0.80 $1500 1.5 296 40 9% $417

32. Technology Scaling The process of shrinking the layout in which every dimension is reduced by a factor is called Scaling. Transistors become smaller less resistive Faster use less power. Designs have smaller die sizes, higher yield and increased performance. VLSI Overview (Motivation)

33. Technology Scaling (Contd..) Can Scaling Continue? Scaling work well in the past. In order to keep scaling work in the future, many technical problems need to be solved. Some characteristics of the transistors do not scale uniformly, e.g., delay, leakage current, threshold voltage, etc. Mismatch in the scaling of transistors and interconnects. Interconnect delay has increased from 5-10% of the overall delay to 50-70%. VLSI Overview (Motivation)

34. Technology Scaling (Contd..) Can Scaling Continue? Technology shrinks by 0.7/generation With every generation can integrate 2x more functions per chip; chip cost does not increase significantly Cost of a function decreases by 2x But … How to design chips with more and more functions? Design engineering population does not double every two years… Hence, a need for more efficient design methods Exploit different levels of abstraction VLSI Overview (Motivation)

35. VLSI Challenges Complicated Design Too many transistors and no way to handle them manually. Solutions: CAD Hierarchical design Design re-use Power and Noise Huge power consumption and heat dissipation becomes a problem Noise and cross talk. Solutions: Better physical design VLSI Overview (Motivation)

36. VLSI Challenges (Contd..) Interconnect Area Too many interconnects Solutions: More interconnect layers CAD tools for 3-D routing Interconnect Delay Interconnect delay becomes a dominating factor in circuit performance Solutions: Use copper wire Interconnect optimization in physical design, e.g., wire sizing, buffer insertion, buffer sizing . VLSI Overview (Motivation)

37. 0.65 1989 0.5 1992 0.35 1995 0.25 1998 0.18 2001 0.13 2004 0.1 2007 5 10 15 20 25 30 35 40 Gate delay Interconnect delay Source: SIA Roadmap 1997 VLSI Overview (Motivation) VLSI Challenges (Contd..) Interconnect Delay

38. VLSI Overview (Motivation) Gallery- Early Processor (Intel 4004) Introduction date: November 15, 1971 Clock speed: 108 KHz Number of transistors: 2,300 (10 microns) Bus width: 4 bits Addressable memory: 640 bytes Typical use: calculator, first microcomputer chip, arithmetic manipulation

39. VLSI Overview (Motivation) Gallery- Today’s Processor (Pentium-4) 0.18-micron process technology (2, 1.9, 1.8, 1.7, 1.6, 1.5, and 1.4 GHz) Introduction date: August 27, 2001 (2, 1.9 GHz); ...; November 20, 2000 (1.5, 1.4 GHz) Level Two cache: 256 KB Advanced Transfer Cache (Integrated) System Bus Speed: 400 MHz SSE2 SIMD Extensions Transistors: 42 Million Typical Use: Desktops and entry-level workstations 0.13-micron process technology (2.53, 2.2, 2 GHz) Introduction date: January 7, 2002 Level Two cache: 512 KB Advanced Transistors: 55 Million

40. VLSI Overview (Motivation) Summary Digital integrated circuits have come a long way and still have quite some potential left for the coming decades. Some of the challenges faced by today's VLSI designers are: Decrease Cost Increase Reliability Increase Speed (frequency) Decrease power and energy dissipation