16148_counterrss2_Counters _under sequential circuits.ppt

counter

1. CS1104-13 Lecture 13: Sequential Logic:
Counters and Registers
1
Sequential Logic
Counters and Registers
Counters
Introduction: Counters
Asynchronous (Ripple) Counters
Synchronous (Parallel) Counters

2. CS1104-13 Lecture 13: Sequential Logic:
Counters and Registers
2
Sequential Logic
Counters and Registers
Registers
Introduction: Registers
Simple Registers
Registers with Parallel Load
Using Registers to implement Sequential Circuits
Shift Registers
Serial In/Serial Out Shift Registers
Serial In/Parallel Out Shift Registers
Parallel In/Serial Out Shift Registers
Parallel In/Parallel Out Shift Registers

3. CS1104-13 Introduction: Counters 3
Introduction: Counters
Counters are circuits that cycle through a specified
number of states.
Two types of counters:
synchronous (parallel) counters
asynchronous (ripple) counters
Ripple counters allow some flip-flop outputs to be
used as a source of clock for other flip-flops.
Synchronous counters apply the same clock to all
flip-flops.

4. CS1103

5. CS1103

6. CS1104-13 Asynchronous (Ripple) Counters 6
Asynchronous (Ripple) Counters
Asynchronous counters: the flip-flops do not change
states at exactly the same time as they do not have a
common clock pulse.
Also known as ripple counters, as the input clock
pulse “ripples” through the counter – cumulative
delay is a drawback.
n flip-flops  a MOD (modulus) 2
n
counter. (Note: A
MOD-x counter cycles through x states.)
Output of the last flip-flop (MSB) divides the input
clock frequency by the MOD number of the counter,
hence a counter is also a frequency divider.

7. CS1104-13 Asynchronous (Ripple) Counters 7
Asynchronous (Ripple) Counters
Example: 2-bit ripple binary counter.
Output of one flip-flop is connected to the clock input
of the next more-significant flip-flop.
K
J
K
J
HIGH
Q
0
Q
1
Q
0
FF1FF0
CLK CC
Timing diagram
00  01  10  11  00 ...
4321CLK
Q
0
Q
0
Q
1
1 1
1 1
0
0 0
0 0
0

8. CS1104-13 Asynchronous (Ripple) Counters 8
Asynchronous (Ripple) Counters
Example: 3-bit ripple binary counter.
K
J
K
JQ
0 Q
1
Q
0
FF1FF0
CC
K
J
Q
1
C
FF2
Q
2
CLK
HIGH
4321CLK
Q
0
Q
1
1 1
1 1
0
0 0
0 0
0
8765
1 10 0
1 10 0
Q
2 0 00 0 1 1 11 0
Recycles back to 0

9. CS1104-13 Asynchronous (Ripple) Counters 9
Asynchronous (Ripple) Counters
Example: 4-bit ripple binary counter (negative-edge
triggered).
K
J
K
J
Q
1Q
0
FF1FF0
CC
K
J
C
FF2
Q
2
CLK
HIGH
K
J
C
FF3
Q
3
CLK
12345678910111213141516
Q
0
Q
1
Q
2
Q
3

10. CS1104-13 Synchronous (Parallel) Counters 10
Synchronous (Parallel) Counters
Synchronous (parallel) counters: the flip-flops are
clocked at the same time by a common clock pulse.
We can design these counters using the sequential
logic design process.

11. CS1103

12. CS1103

13. CS1103

14. CS1103

15. CS1103

16. CS1103

17. End of segment