2. Lecture 2 Transistors BJT and FET_Updated 4.pdf
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About This Presentation
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Slide Content
Lecture #2: Transistors
BJT and FET
Faculty of Electronics and
Telecommunications,
VNU-University of Engineering
and Technology
1
BJT and FET
Faculty of Electronics and
Telecommunications,
VNU-University of Engineering
and Technology
1
Outline
•Bipolar Junction Transistor (BJT)
Simplified Structure and Modes of Operation
I-V Characteristics
Biasing of the BJT
BJT Circuit at DC
Small-Signal Operating Model
•Field Effect Transistor (FET)
Introduction
JFETand MOSFET
Small-Signal Operating Model
Textbook: Adel. S. Sedra, Kenneth C. Smith. Microelectronic
Circuits. Oxford University Press. 2011/2014 (Chapter 5& 6).
2
Transistor Families
•Bipolar Junction Transistor (BJT)
Simplified Structure and Modes of Operation
I-V Characteristics
Biasing of the BJT
BJT Circuit at DC
Small-Signal Operating Model
•Field Effect Transistor (FET)
Introduction
JFETand MOSFET
Small-Signal Operating Model
Textbook: Adel. S. Sedra, Kenneth C. Smith. Microelectronic
Circuits. Oxford University Press. 2011/2014 (Chapter 5& 6).
2
Transistor Families
3
1. Bipolar Junction Transistor (BJT)
1.1 Simplified Structure and Modes of Operation
BJT is constructed with 3 doped semiconductor regions separated by 2 PN-junctions
3 regions are called emitter (E), base (B), and collector (C).
The base is lightly doped and very narrow compared with the heavily doped emitter
& moderately collector.
It is used as an electrical signal amplifieror an electronic switch.
Fig.: Cross-section of an npnBJT.
1. Bipolar Junction Transistor (BJT)
1.1 Simplified Structure and Modes of Operation
BJT is constructed with 3 doped semiconductor regions separated by 2 PN-junctions
3 regions are called emitter (E), base (B), and collector (C).
The base is lightly doped and very narrow compared with the heavily doped emitter
& moderately collector.
It is used as an electrical signal amplifieror an electronic switch.
Fig.: Cross-section of an npnBJT.
1. Bipolar Junction Transistor (BJT)
1.1 Simplified Structure and Modes of Operation
NPN transistor PNP transistor
4
BJT Modes of Operation
CBJEBJMode
ReverseReverseCutoff
ReverseForwardActive
ForwardForwardSaturation
B
C
E
+
_
I
E
+
I
C
I
B
_
V
EC
PNP transistor
B
C
E
+
_
V
CE
+
_
I
B
I
C
I
E
NPN transistor
1.1 Simplified Structure and Modes of Operation
NPN transistor PNP transistor
4
BJT Modes of Operation
CBJEBJMode
ReverseReverseCutoff
ReverseForwardActive
ForwardForwardSaturation
B
C
E
+
_
I
E
+
I
C
I
B
_
V
EC
PNP transistor
B
C
E
+
_
V
CE
+
_
I
B
I
C
I
E
NPN transistor
5
1. Bipolar Junction Transistor (BJT)
Application -example
Darkness activates the light circuit
Photoresistors are also called
light-dependent resistors
(LDRs).
Before the 1940s, radios used bulky vacuum tubes that
required high voltages. Transistors, however, could run on
small batteries, making portable radios possible. In 1954,
Regency and Texas Instruments introduced the first
transistor radios. At the same time, a Japanese company,
Tsushin Kogyo, was developing a similar product and,
aiming for the American market, rebranded itself as Sony,
using the Latin word "sonus" for sound.
https://www.sony.com/en/SonyInfo/CorporateInfo/History/sonyhistory-b.html
Radio
1. Bipolar Junction Transistor (BJT)
Application -example
Darkness activates the light circuit
Photoresistors are also called
light-dependent resistors
(LDRs).
Before the 1940s, radios used bulky vacuum tubes that
required high voltages. Transistors, however, could run on
small batteries, making portable radios possible. In 1954,
Regency and Texas Instruments introduced the first
transistor radios. At the same time, a Japanese company,
Tsushin Kogyo, was developing a similar product and,
aiming for the American market, rebranded itself as Sony,
using the Latin word "sonus" for sound.
https://www.sony.com/en/SonyInfo/CorporateInfo/History/sonyhistory-b.html
Radio
6
Operation of the npn-Transistor
in the Active Mode
•Active mode is “most important.”
•Two external voltage sourcesare required for biasing to
achieve it.
•Forward bias on emitter-base junction will cause current
to flow.
•This current has two components:
–electronsinjected from emitter into base
–holesinjected from base into emitter.
•It will be shown that first (of the two above) is desirable. This is achieved with heavy doping of emitter,
light doping of base.
•emitter current (i
E
) –is current which flows across EBJ. Flows “out” of emitter lead
•minority carriers–in p-type region.
‒These electrons will be injected from emitterinto base.
‒Opposite direction.
•Because base is thin, concentration of excess minority carriers within it will exhibit constant gradient.
Fig.: Current flow in an npntransistor biased
to operate in the active mode.
Operation of the npn-Transistor
in the Active Mode
•Active mode is “most important.”
•Two external voltage sourcesare required for biasing to
achieve it.
•Forward bias on emitter-base junction will cause current
to flow.
•This current has two components:
–electronsinjected from emitter into base
–holesinjected from base into emitter.
•It will be shown that first (of the two above) is desirable. This is achieved with heavy doping of emitter,
light doping of base.
•emitter current (i
E
) –is current which flows across EBJ. Flows “out” of emitter lead
•minority carriers–in p-type region.
‒These electrons will be injected from emitterinto base.
‒Opposite direction.
•Because base is thin, concentration of excess minority carriers within it will exhibit constant gradient.
Fig.: Current flow in an npntransistor biased
to operate in the active mode.
7
Operation of the npn-Transistor
I
S
: dòngbãohòa
: hệsốkhuếchđạidòng(50
÷
200); (βis a transistor parameter or common-
emitter current gain)
: hệsốkhuếchđạidòng(≤1) ; (
common-base current gain)
/
B E Tv V
C S
C
B
C E
E C B
i I e
i
i
i i
i i i
1 1
Fig.: Current flow in an npntransistor biased to
operate in the active mode.
Operation of the npn-Transistor
I
S
: dòngbãohòa
: hệsốkhuếchđạidòng(50
÷
200); (βis a transistor parameter or common-
emitter current gain)
: hệsốkhuếchđạidòng(≤1) ; (
common-base current gain)
/
B E Tv V
C S
C
B
C E
E C B
i I e
i
i
i i
i i i
1 1
Fig.: Current flow in an npntransistor biased to
operate in the active mode.
8
Operation of the npn-Transistor
Common-Emitter (CE)Common-Base (CB) Common-Collector (CC)
•Three different transistor circuit configurations:
1. Bipolar Junction Transistor (BJT)
V
CB
V
CE
+
_
+
_
I
E
I
B
I
C
V
BE
V
CE
+
_
+
_
I
C
I
B
I
B
V
BE
+
I
C
_
I
E
+
_
V
CB
I
B
Operation of the npn-Transistor
Common-Emitter (CE)Common-Base (CB) Common-Collector (CC)
•Three different transistor circuit configurations:
1. Bipolar Junction Transistor (BJT)
V
CB
V
CE
+
_
+
_
I
E
I
B
I
C
V
BE
V
CE
+
_
+
_
I
C
I
B
I
B
V
BE
+
I
C
_
I
E
+
_
V
CB
I
B
1. Bipolar Junction Transistor (BJT)
9
•BJTis a Current-Controlled Current Source (CCCS) or a Voltage-Controlled Current Source (VCCS).
Small signalequivalent circuit models for npntransistor in active mode
Fig.: 2 slightly different versions of the simplified hybrid-model for the small-signal operation
of the BJT. The equivalent circuit in (a)represents the BJT as a VCCS (a transconductance
amplifier), and that in (b)represents the BJT as a CCCS (a current amplifier).
g
m
= I
C
/V
T
r
= /g
m
9
•BJTis a Current-Controlled Current Source (CCCS) or a Voltage-Controlled Current Source (VCCS).
Small signalequivalent circuit models for npntransistor in active mode
Fig.: 2 slightly different versions of the simplified hybrid-model for the small-signal operation
of the BJT. The equivalent circuit in (a)represents the BJT as a VCCS (a transconductance
amplifier), and that in (b)represents the BJT as a CCCS (a current amplifier).
g
m
= I
C
/V
T
r
= /g
m
10
1. Bipolar Junction Transistor (BJT)
Small signalequivalent circuit models for npntransistor in active mode
Fig.: 2 slightly different versions of what is known as the T model of the BJT. The circuit in (a)is a
VCCS representation and that in (b)is a CCCS representation. These models explicitly show the
emitter resistance r
e
rather than the base resistance r
featured in the hybrid-model.
g
m
= I
C
/V
T
r
e
= V
T
/I
E
= /g
m
1. Bipolar Junction Transistor (BJT)
Small signalequivalent circuit models for npntransistor in active mode
Fig.: 2 slightly different versions of what is known as the T model of the BJT. The circuit in (a)is a
VCCS representation and that in (b)is a CCCS representation. These models explicitly show the
emitter resistance r
e
rather than the base resistance r
featured in the hybrid-model.
g
m
= I
C
/V
T
r
e
= V
T
/I
E
= /g
m
Large signalequivalent circuit models for npntransistor in active mode
The diode ??????
?
has a scale
current ??????
??
=
?
?
and thus
provides a current ??????
?
controlled by ??????
??
Expressing the
current of the
controlled
source as α??????
?
Diode ??????
?
conducts
the base current
??????
??
=
?
?
Expressing ??????
?
as
????????????
?
These models apply to any positive value of ??????
??
=> Large signal models
11
VCCS CCCS
The diode ??????
?
has a scale
current ??????
??
=
?
?
and thus
provides a current ??????
?
controlled by ??????
??
Expressing the
current of the
controlled
source as α??????
?
Diode ??????
?
conducts
the base current
??????
??
=
?
?
Expressing ??????
?
as
????????????
?
These models apply to any positive value of ??????
??
=> Large signal models
11
VCCS CCCS
Example 1
•npn transistor: ??????
?
=10
?59
Aand ??????=100. Terminal Eis grounded, Bis fed with constant-
current source supplying a dc current of 10 ????????????, Cis connected to a 5 V dc supply via a
resistance ??????
?
=3 ??????Ω. Assuming the transistor is in the active mode, find ??????
????????????
and ??????
????????????
?
12
Solution:which model should we choose?
we know ??????
?
=10 ????????????=> choose CCCS (Fig. d in slide #11)
•??????
??
=??????
?
ln
?
?
?
?
=??????
?
ln
?
?
?
?
→??????
??
=25ln
544∗54
72
54
7-1
=690 (????????????)
•??????
??
=??????
??
−??????
?
??????
?
??????
?
=????????????
?
=1 (????????????)
→??????
??
=2 ??????
??????
?
=2??????; ??????
?
=0.69 ??????→CBJ is Reverse.
=> Transistor is indeed operating in the active mode
Large signalequivalent circuit models for npntransistor in active mode
R
C
=3 kW
10 mA
V
CC
= +5 V
_
+
i
B
V
BE
I
B
B
E
C
I
C
D
B
V
CE
+
_
•npn transistor: ??????
?
=10
?59
Aand ??????=100. Terminal Eis grounded, Bis fed with constant-
current source supplying a dc current of 10 ????????????, Cis connected to a 5 V dc supply via a
resistance ??????
?
=3 ??????Ω. Assuming the transistor is in the active mode, find ??????
????????????
and ??????
????????????
?
12
Solution:which model should we choose?
we know ??????
?
=10 ????????????=> choose CCCS (Fig. d in slide #11)
•??????
??
=??????
?
ln
?
?
?
?
=??????
?
ln
?
?
?
?
→??????
??
=25ln
544∗54
72
54
7-1
=690 (????????????)
•??????
??
=??????
??
−??????
?
??????
?
??????
?
=????????????
?
=1 (????????????)
→??????
??
=2 ??????
??????
?
=2??????; ??????
?
=0.69 ??????→CBJ is Reverse.
=> Transistor is indeed operating in the active mode
Large signalequivalent circuit models for npntransistor in active mode
R
C
=3 kW
10 mA
V
CC
= +5 V
_
+
i
B
V
BE
I
B
B
E
C
I
C
D
B
V
CE
+
_
Example 1(continued…)
13
Replace the current source with a
resistance from the base to 5 Vdc supply
Replace the current source of the circuit in example
1 with a resistance (R
B
) connected from the base to
the 5-V dc supply. Find R
B
to result in the same
operating conditions?
Large signalequivalent circuit models for npntransistor in active mode
5 0.69
431
10
CC BE
B
B
V V V V
R k
I A m
W
R
B
R
C
V
CC
= +5 V
_
+
i
B
V
BE
I
B
B
E
C
I
C
D
B
V
CE
+
_
13
Replace the current source with a
resistance from the base to 5 Vdc supply
Replace the current source of the circuit in example
1 with a resistance (R
B
) connected from the base to
the 5-V dc supply. Find R
B
to result in the same
operating conditions?
Large signalequivalent circuit models for npntransistor in active mode
5 0.69
431
10
CC BE
B
B
V V V V
R k
I A m
W
R
B
R
C
V
CC
= +5 V
_
+
i
B
V
BE
I
B
B
E
C
I
C
D
B
V
CE
+
_
Active mode Saturation mode
1. Bipolar Junction Transistor (BJT)
1.1 Simplified Structure and Modes of Operation
•Saturation mode(npn):
EBJ& CBJ areforward biased.
??????
?
=??????
?
??????
?
??
?
?
⁄
−??????
??
??????
?
??
?
?
⁄
⇒??????
??
increases, causing ??????
?
to decrease and reach 0.
??????
?
=??????
?
??????⁄??????
?
??
?
?
⁄
+??????
??
??????
?
??
?
?
⁄
14
Why ??????
??????
decreases in saturation?
A transistor deep in saturationhas ??????
??
???
=??????
??
−??????
??
≈0.2 ??????.
In analyzing a circuit, to determine whether the BJT is in the saturation modeby either of the following 2 tests:
1)Is the CBJ forward biased by more than 0.4 V?
2)Is the ratio i
C
/i
B
lower than β?
1. Bipolar Junction Transistor (BJT)
1.1 Simplified Structure and Modes of Operation
•Saturation mode(npn):
EBJ& CBJ areforward biased.
??????
?
=??????
?
??????
?
??
?
?
⁄
−??????
??
??????
?
??
?
?
⁄
⇒??????
??
increases, causing ??????
?
to decrease and reach 0.
??????
?
=??????
?
??????⁄??????
?
??
?
?
⁄
+??????
??
??????
?
??
?
?
⁄
14
Why ??????
??????
decreases in saturation?
A transistor deep in saturationhas ??????
??
???
=??????
??
−??????
??
≈0.2 ??????.
In analyzing a circuit, to determine whether the BJT is in the saturation modeby either of the following 2 tests:
1)Is the CBJ forward biased by more than 0.4 V?
2)Is the ratio i
C
/i
B
lower than β?
1. Bipolar Junction Transistor (BJT)
1.1 Simplified Structure and Modes of Operation
PNP transistor
15
Fig.(a) & (b): Two
large-signal models
for the pnptransistor
operating in the active
mode.
Fig.: Current flow in a pnptransistor biased to
operate in the active mode.
1.1 Simplified Structure and Modes of Operation
PNP transistor
15
Fig.(a) & (b): Two
large-signal models
for the pnptransistor
operating in the active
mode.
Fig.: Current flow in a pnptransistor biased to
operate in the active mode.
16
General purpose / small-signal transistors
Power transistors
Example of BJTs
General purpose / small-signal transistors
Power transistors
Example of BJTs
17
Example of BJTs
Examples of multiple-transistor packages.
Examples of RF transistor
packages
Example of BJTs
Examples of multiple-transistor packages.
Examples of RF transistor
packages
18
1. Bipolar Junction Transistor (BJT)
1.2. Current-Voltage Characteristics
Two right side-Figures also indicates the reference and actual directions of current flow
throughout the BJT.
Note that currents flow from top to bottom and that voltages are higher at the top and lower at
the bottom.
Fig.: Circuit symbols for BJTs. Fig.: Voltage polarities and current flow in
transistors biased in the active mode.
1. Bipolar Junction Transistor (BJT)
1.2. Current-Voltage Characteristics
Two right side-Figures also indicates the reference and actual directions of current flow
throughout the BJT.
Note that currents flow from top to bottom and that voltages are higher at the top and lower at
the bottom.
Fig.: Circuit symbols for BJTs. Fig.: Voltage polarities and current flow in
transistors biased in the active mode.
19
1. Bipolar Junction Transistor (BJT)
1.2. Current-Voltage Characteristics
npntransistor whose EBJ is forward biased (usually, V
BE
0.7 V) will operate in the active mode as long as
the collector voltage does not fall below that of the base by more than approximately 0.4 V.
pnptransistor will operate in the active mode if the EBJ is forward biased (usually, V
EB
0.7 V) and the
collector voltage is not allowed to rise above that of the base by more than 0.4 V or so.
Fig.: Graphical representation of the conditions for operating the BJT in the active
mode & in the saturation mode.
1. Bipolar Junction Transistor (BJT)
1.2. Current-Voltage Characteristics
npntransistor whose EBJ is forward biased (usually, V
BE
0.7 V) will operate in the active mode as long as
the collector voltage does not fall below that of the base by more than approximately 0.4 V.
pnptransistor will operate in the active mode if the EBJ is forward biased (usually, V
EB
0.7 V) and the
collector voltage is not allowed to rise above that of the base by more than 0.4 V or so.
Fig.: Graphical representation of the conditions for operating the BJT in the active
mode & in the saturation mode.
20
1. Bipolar Junction Transistor (BJT)
1.2. Current-Voltage Characteristics
1. Bipolar Junction Transistor (BJT)
1.2. Current-Voltage Characteristics
Example 2
21
The transistor Q has ??????=100and ??????
??
=0.7 ??????at ??????
?
=1 ????????????.
Design the circuit so that a current of 2 mA flows through C and a
voltage of +5 V appears at C. How to:
Determine the operation mode?
Find ??????
?
, ??????
?
Solution
Since ??????
?
=+5 ?????? => CB reverse biased => BJT is in active mode
??????
?
=
59?9
?
?
=
54?
6??
=5?????? ??????
Since ??????
??
=0.7 ??????at ??????
?
=1 ????????????, the value of ??????
??
at ??????
?
=2 ????????????
is ??????
??
=0.7+??????
?
????????????
6
5
=0.717 (V)
Since the base is at 0V, ??????
?
=−0.717 ??????
??????
?
=
??????
?
∝
=
??????
?
??????
??????+1
=2.02 (????????????)
??????
?
=
??????
?
−(−15)
??????
?
=7.07?????? (??????)
(a)
+15 VR
CR
E
Q
–15 V
21
The transistor Q has ??????=100and ??????
??
=0.7 ??????at ??????
?
=1 ????????????.
Design the circuit so that a current of 2 mA flows through C and a
voltage of +5 V appears at C. How to:
Determine the operation mode?
Find ??????
?
, ??????
?
Solution
Since ??????
?
=+5 ?????? => CB reverse biased => BJT is in active mode
??????
?
=
59?9
?
?
=
54?
6??
=5?????? ??????
Since ??????
??
=0.7 ??????at ??????
?
=1 ????????????, the value of ??????
??
at ??????
?
=2 ????????????
is ??????
??
=0.7+??????
?
????????????
6
5
=0.717 (V)
Since the base is at 0V, ??????
?
=−0.717 ??????
??????
?
=
??????
?
∝
=
??????
?
??????
??????+1
=2.02 (????????????)
??????
?
=
??????
?
−(−15)
??????
?
=7.07?????? (??????)
(a)
+15 VR
CR
E
Q
–15 V
1. Bipolar Junction Transistor (BJT)
1.2 BJTI –V Characteristics
BJT Input Characteristic (??????
?
vs.??????
??
)
BJTTransfer Characteristic (??????
?
vs.??????
??
or ??????
?
vs.??????
?
)
BJTOutput Characteristic (??????
?
vs.??????
??
)
22
BJT Transfer Characteristic:
??????
?
=??????(??????
??
)|
?
??
@?????
Fig.: BJT test circuit (CE)
BJT Input Characteristic
BJT Output Characteristic
exp
BE
C S
T
v
i I
V
0 0.50.7 v
BE
(V)
i
C
1.2 BJTI –V Characteristics
BJT Input Characteristic (??????
?
vs.??????
??
)
BJTTransfer Characteristic (??????
?
vs.??????
??
or ??????
?
vs.??????
?
)
BJTOutput Characteristic (??????
?
vs.??????
??
)
22
BJT Transfer Characteristic:
??????
?
=??????(??????
??
)|
?
??
@?????
Fig.: BJT test circuit (CE)
BJT Input Characteristic
BJT Output Characteristic
exp
BE
C S
T
v
i I
V
0 0.50.7 v
BE
(V)
i
C
1. Bipolar Junction Transistor (BJT)
1.2 BJTI –V Characteristics
23
Dependence of i
C
on the Collector Voltage—The Early Effect
When ??????
??
<0.3 V, ??????
??
<−0.4 V, the CBJ
becomes forward biased => the transistor enters the
saturation region.
When extrapolated, the characteristic lines meet at
a point ??????
??
=−??????
?
, it is called the Early Voltage,
??????
?
~10 ???????????? 100??????.
Fig.: The i
C
vs. v
CE
characteristics of a practical BJT
James M. Early
(1922 –2004) was an AmericanEE
The linear dependence of i
C
on v
CE
can be
At a given value of v
BE
, increasing v
CE
decrease in
the effective base width W.
Known as the base-width modulation effect.
1.2 BJTI –V Characteristics
23
Dependence of i
C
on the Collector Voltage—The Early Effect
When ??????
??
<0.3 V, ??????
??
<−0.4 V, the CBJ
becomes forward biased => the transistor enters the
saturation region.
When extrapolated, the characteristic lines meet at
a point ??????
??
=−??????
?
, it is called the Early Voltage,
??????
?
~10 ???????????? 100??????.
Fig.: The i
C
vs. v
CE
characteristics of a practical BJT
James M. Early
(1922 –2004) was an AmericanEE
The linear dependence of i
C
on v
CE
can be
At a given value of v
BE
, increasing v
CE
decrease in
the effective base width W.
Known as the base-width modulation effect.
24
1. Bipolar Junction Transistor (BJT)
1.2 BJT I –V Characteristics
Dependence of i
C
on the Collector Voltage—The Early Effect
A
o
C
V
r
I
??????
?
?
=??????
?
??????
?
??
?
?
⁄
the collector current with the Early effect neglected
1
BE
C A CE
o
o CE C v const
i V V
r
r v I
Nonzero slope of the i
C
–v
CE
straight lines indicates that the output resistance (r
o
)looking into the
collector is not infinite
Alternatively, we can write
The finite output resistance r
o
can have a significant effect on the gain of transistor
amplifiers.
Fig.: Large-signalequivalent-circuit models of an npnBJT operating in the
active mode in the CE configuration with the output resistance r
o
included
where
1. Bipolar Junction Transistor (BJT)
1.2 BJT I –V Characteristics
Dependence of i
C
on the Collector Voltage—The Early Effect
A
o
C
V
r
I
??????
?
?
=??????
?
??????
?
??
?
?
⁄
the collector current with the Early effect neglected
1
BE
C A CE
o
o CE C v const
i V V
r
r v I
Nonzero slope of the i
C
–v
CE
straight lines indicates that the output resistance (r
o
)looking into the
collector is not infinite
Alternatively, we can write
The finite output resistance r
o
can have a significant effect on the gain of transistor
amplifiers.
Fig.: Large-signalequivalent-circuit models of an npnBJT operating in the
active mode in the CE configuration with the output resistance r
o
included
where
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
To use the BJT for any application like amplification, the 2 junctions CB &CEshould be properly
biased according to the required application.
Quiescent point (or the DC operating point) (Q-point): (??????
?
,??????
??
),(??????
?
,??????
??
): no AC signal
component is present at Q.
Since the current through transistor changes according to temperature, Q is changed according to
temperature, too. So the requirement of the biasing for BJT is the temperature stabilization
for Q.
25
1.3 BJT Circuits at DC (biasing of the BJT)
To use the BJT for any application like amplification, the 2 junctions CB &CEshould be properly
biased according to the required application.
Quiescent point (or the DC operating point) (Q-point): (??????
?
,??????
??
),(??????
?
,??????
??
): no AC signal
component is present at Q.
Since the current through transistor changes according to temperature, Q is changed according to
temperature, too. So the requirement of the biasing for BJT is the temperature stabilization
for Q.
25
26
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
Bias establishes the DC operating point (Q-point) for proper linear operation of an amplifier. If an
amplifier is not biased with correct dc voltages on the input and output, it can go into saturation or
cutoff when an input signal is applied. Fig. shows the effects of proper and improper dc biasing of an
inverting amplifier
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
Bias establishes the DC operating point (Q-point) for proper linear operation of an amplifier. If an
amplifier is not biased with correct dc voltages on the input and output, it can go into saturation or
cutoff when an input signal is applied. Fig. shows the effects of proper and improper dc biasing of an
inverting amplifier
27
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC
(biasing of the BJT)
For the npntransistor in Fig. (b),
the CBJ reverse-bias condition is
ensured by keeping v
CE
≥ 0.3 V.
Since v
BE
=~ 0.7 V, v
BC
< 0.4 V
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC
(biasing of the BJT)
For the npntransistor in Fig. (b),
the CBJ reverse-bias condition is
ensured by keeping v
CE
≥ 0.3 V.
Since v
BE
=~ 0.7 V, v
BC
< 0.4 V
DC Load line and Quiescent point of BJT
28
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
A DC load line drawn on a family of curves. The bottom of the
load line is at ideal cutoff(I
C
= 0 & V
CE
= V
CC
).The top of the
load line is at saturation(I
C
= I
C(sat)
& V
CE
= V
CE(sat)
).
DC Load line
I
C
V
CE
Q
v
BE
=…
v
BE
=…
v
BE
=…
v
BE
=…
v
BE
=…
28
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
A DC load line drawn on a family of curves. The bottom of the
load line is at ideal cutoff(I
C
= 0 & V
CE
= V
CC
).The top of the
load line is at saturation(I
C
= I
C(sat)
& V
CE
= V
CE(sat)
).
DC Load line
I
C
V
CE
Q
v
BE
=…
v
BE
=…
v
BE
=…
v
BE
=…
v
BE
=…
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
29
•Fixed biasing circuit
KVL: ??????
??
=??????
?
??????
?
+??????
??
→??????
?
=
?
??
??
??
?
?
KVL: ??????
??
=??????
?
??????
?
+??????
??
→??????
?
=
?
??
??
??
?
?
??????
??
Thenevin equivalent : ??????
??
=
?
??
?
?.
?
?-
>?
?.
and ??????
?
=??????
?5
//??????
?6
Fig.:2 schemes for biasing the BJT: (a)by
fixing V
BE
; (b)by fixing I
B
. Both result in wide
variations in I
C
and hence in V
CE
and therefore
are considered to be “bad.” Neither scheme is
recommended.
1.3 BJT Circuits at DC (biasing of the BJT)
29
•Fixed biasing circuit
KVL: ??????
??
=??????
?
??????
?
+??????
??
→??????
?
=
?
??
??
??
?
?
KVL: ??????
??
=??????
?
??????
?
+??????
??
→??????
?
=
?
??
??
??
?
?
??????
??
Thenevin equivalent : ??????
??
=
?
??
?
?.
?
?-
>?
?.
and ??????
?
=??????
?5
//??????
?6
Fig.:2 schemes for biasing the BJT: (a)by
fixing V
BE
; (b)by fixing I
B
. Both result in wide
variations in I
C
and hence in V
CE
and therefore
are considered to be “bad.” Neither scheme is
recommended.
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
•Biasing circuit using current feedback resistor R
E
30
Thévevinequivalent: ??????
??
=
?
??
?
.
?
-
>?
.
and ??????
?
=??????
5
//??????
6
KVL: ??????
??
=??????
?
??????
?
+??????
??
+??????
?
??????
?
??????
?
=??????
?
+??????
?
??????
?
=????????????
?
`→??????
?
=1+????????????
?
KVL: ??????
??
=??????
?
??????
?
+??????
??
+??????
?
??????
?
??????
??
>??????
??
???
≈0.2 ??????: Active mode
Current feedback
resistor
Fig.: circuit with the voltage
divider supplying the Breplaced
with its Théveninequivalent.
()
1
BB BE
B
B E
V V
I
R R
()
/ 1
BB BE
E
E B
V V
I
R R
()
/ 1 1/
BB BE
C
B E
V V
I
R R
1.3 BJT Circuits at DC (biasing of the BJT)
•Biasing circuit using current feedback resistor R
E
30
Thévevinequivalent: ??????
??
=
?
??
?
.
?
-
>?
.
and ??????
?
=??????
5
//??????
6
KVL: ??????
??
=??????
?
??????
?
+??????
??
+??????
?
??????
?
??????
?
=??????
?
+??????
?
??????
?
=????????????
?
`→??????
?
=1+????????????
?
KVL: ??????
??
=??????
?
??????
?
+??????
??
+??????
?
??????
?
??????
??
>??????
??
???
≈0.2 ??????: Active mode
Current feedback
resistor
Fig.: circuit with the voltage
divider supplying the Breplaced
with its Théveninequivalent.
()
1
BB BE
B
B E
V V
I
R R
()
/ 1
BB BE
E
E B
V V
I
R R
()
/ 1 1/
BB BE
C
B E
V V
I
R R
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
31
??????
?
is chosen for Q is in the active
region (??????
??
>??????
??
≅0.7 ??????)
KVL: ??????
??
=??????
?
+??????
?
??????
?
+??????
?
??????
?
+??????
??
•Biasing circuit using voltage feedback resistor R
B
Fig.: (a)A common-emitter transistor amplifier
biased by a feedback resistor R
B
.(b) Analysis
of the circuit in (a).
()
1
CC BE
B
B C
V V
I
R R
()
/ 1
CC BE
E
C B
V V
I
R R
()
/ 1 1/
CC BE
C
B C
V V
I
R R
1.3 BJT Circuits at DC (biasing of the BJT)
31
??????
?
is chosen for Q is in the active
region (??????
??
>??????
??
≅0.7 ??????)
KVL: ??????
??
=??????
?
+??????
?
??????
?
+??????
?
??????
?
+??????
??
•Biasing circuit using voltage feedback resistor R
B
Fig.: (a)A common-emitter transistor amplifier
biased by a feedback resistor R
B
.(b) Analysis
of the circuit in (a).
()
1
CC BE
B
B C
V V
I
R R
()
/ 1
CC BE
E
C B
V V
I
R R
()
/ 1 1/
CC BE
C
B C
V V
I
R R
1. Bipolar Junction Transistor (BJT)
1.3 BJT Circuits at DC (biasing of the BJT)
32
???????????????????????? ??????
?
,??????
?
,??????
?
,??????
?
,??????
?
?
??????=100
Ex. 3
1.3 BJT Circuits at DC (biasing of the BJT)
32
???????????????????????? ??????
?
,??????
?
,??????
?
,??????
?
,??????
?
?
??????=100
Ex. 3
1. Bipolar Junction Transistor (BJT)
1.3 Biasing of the BJT
33
??????≥50
???????????????????????? ??????
?
,??????
?
,??????
?
,??????
?
,??????
?
?
Ex. 4
1
st
assumption BJT in
active-mode operation
2
nd
assumption BJT in saturation
mode (V
CEsat
= 0.2 V)
3.3kW
(a)
+10 V
R
C
R
E
Q
+6 V
4.7kW
1.3 Biasing of the BJT
33
??????≥50
???????????????????????? ??????
?
,??????
?
,??????
?
,??????
?
,??????
?
?
Ex. 4
1
st
assumption BJT in
active-mode operation
2
nd
assumption BJT in saturation
mode (V
CEsat
= 0.2 V)
3.3kW
(a)
+10 V
R
C
R
E
Q
+6 V
4.7kW
1. Bipolar Junction Transistor (BJT)
1.3 Biasing of the BJT
34
??????=100
Find ??????
?
,??????
?
,??????
?
,??????
?
,??????
?
,??????
?
?
Ex. 5
Simplifying the (b)circuit
using Thevenin’s theorem
Assume BJT in
active-mode
V
C
-V
B
= 4.03 V, BJT is in the
active mode, as had been assumed.
1.3 Biasing of the BJT
34
??????=100
Find ??????
?
,??????
?
,??????
?
,??????
?
,??????
?
,??????
?
?
Ex. 5
Simplifying the (b)circuit
using Thevenin’s theorem
Assume BJT in
active-mode
V
C
-V
B
= 4.03 V, BJT is in the
active mode, as had been assumed.
1. Bipolar Junction Transistor (BJT)
1.3 Biasing of the BJT
35
??????
5
=??????
5
=100
Ex. 6:
Determinethe voltages at all nodes and
the currents through all branches?
Assume Q
1
is still in the active mode.
So use the results from the previous ex. 1.3.3:
V
B1
= 4.57 V; I
E1
= 1.29 mA; I
B1
= 0.0128 mA;
I
C1
= 1.28 mA
1
st
assumption I
B2
<< I
C1
; find V
C1
, V
E2
(assume Q
2
: active
mode) V
E2
, I
E2
, I
C2
, V
C2
, then I
B2
Obtain more accurate results by iterating one more time with
just calculated value of I
B2
(a)
Q
1
R
B1
R
B2
R
C1
R
E1
R
E2
R
C2
+15V
100kW
50kW
3kW
5kW
2.7kW
Q
2
2kW
I
C1
I
B2
I
E2
I
C2
1.3 Biasing of the BJT
35
??????
5
=??????
5
=100
Ex. 6:
Determinethe voltages at all nodes and
the currents through all branches?
Assume Q
1
is still in the active mode.
So use the results from the previous ex. 1.3.3:
V
B1
= 4.57 V; I
E1
= 1.29 mA; I
B1
= 0.0128 mA;
I
C1
= 1.28 mA
1
st
assumption I
B2
<< I
C1
; find V
C1
, V
E2
(assume Q
2
: active
mode) V
E2
, I
E2
, I
C2
, V
C2
, then I
B2
Obtain more accurate results by iterating one more time with
just calculated value of I
B2
(a)
Q
1
R
B1
R
B2
R
C1
R
E1
R
E2
R
C2
+15V
100kW
50kW
3kW
5kW
2.7kW
Q
2
2kW
I
C1
I
B2
I
E2
I
C2
1. Bipolar Junction Transistor (BJT)
1.3 Biasing of the BJT
36
??????=100
Ex. 7
Evaluate the voltages at all nodes and the
currents through all branches?
Q
1
&Q
2
cannot be
ONat the same time.
Assume Q
2
is ON current
will flow from ground through
the 1 kWinto Eof Q
2
, to Bof
Q
2
will be flowing out of B
through the 10 kWand into the
+5 V supply. This is impossible!
So Q
1
isONand Q
2
is OFF. But
whether Q
1
is active or saturated?(a)
+5 V
Q
2
Q
1
+5V
-5 V
10kW
1kW
1.3 Biasing of the BJT
36
??????=100
Ex. 7
Evaluate the voltages at all nodes and the
currents through all branches?
Q
1
&Q
2
cannot be
ONat the same time.
Assume Q
2
is ON current
will flow from ground through
the 1 kWinto Eof Q
2
, to Bof
Q
2
will be flowing out of B
through the 10 kWand into the
+5 V supply. This is impossible!
So Q
1
isONand Q
2
is OFF. But
whether Q
1
is active or saturated?(a)
+5 V
Q
2
Q
1
+5V
-5 V
10kW
1kW
1. Bipolar Junction Transistor (BJT)
1.4 Applying the BJT in Amplifier Design
37
(a)Basic CE amplifier circuit
v
BE
(t) = V
BE
+ v
be
(t)
Fig.:Transfer characteristic of
the circuit in (a). The amplifier is
biased at a point Q, and a small
voltage signal v
i
is superimposed
on the DC bias voltage V
BE
. The
resulting output signal v
o
appears
superimposed on the DC
collector voltage V
CE
. The
amplitude of v
o
is larger than that
of v
i
by the voltage gain A
v
.
Biasing BJT to Obtain Linear Amplification
V
BE
i
C
V
CC
R
C
v
be
v
BE
v
CE
+
–
+
–
1.4 Applying the BJT in Amplifier Design
37
(a)Basic CE amplifier circuit
v
BE
(t) = V
BE
+ v
be
(t)
Fig.:Transfer characteristic of
the circuit in (a). The amplifier is
biased at a point Q, and a small
voltage signal v
i
is superimposed
on the DC bias voltage V
BE
. The
resulting output signal v
o
appears
superimposed on the DC
collector voltage V
CE
. The
amplitude of v
o
is larger than that
of v
i
by the voltage gain A
v
.
Biasing BJT to Obtain Linear Amplification
V
BE
i
C
V
CC
R
C
v
be
v
BE
v
CE
+
–
+
–
•Analog circuits often operate with small signal levels compared
to the bias currents and voltages in the circuit. The small signal
models allow calculation of circuit gainand terminal impedances
easily.
•Consider the BJT operated in the active region about Q-point
(??????
?
,??????
??
)or (??????
?
,??????
??
).
•A small signal input voltage ??????
?
is applied in series with ??????
??
and
produces a small variation base current ??????
?
and a small variation
in collector current ??????
?
. Total values of base and collector currents
are ??????
?
and ??????
?
, respectively, and thus
??????
?
=??????
?
+??????
?
and ??????
?
=??????
?
+??????
?
??????
??
=??????
??
+??????
??
??????
??
=??????
??
+??????
??
38
1. Bipolar Junction Transistor (BJT)
1.4 Applying the BJT in Amplifier Design
The Small-Signal Voltage Gain
+
V
BE
+
_
V
CC
R
C
+
_
_
i
B
i
C
i
E
v
be
v
BE
v
CE
to the bias currents and voltages in the circuit. The small signal
models allow calculation of circuit gainand terminal impedances
easily.
•Consider the BJT operated in the active region about Q-point
(??????
?
,??????
??
)or (??????
?
,??????
??
).
•A small signal input voltage ??????
?
is applied in series with ??????
??
and
produces a small variation base current ??????
?
and a small variation
in collector current ??????
?
. Total values of base and collector currents
are ??????
?
and ??????
?
, respectively, and thus
??????
?
=??????
?
+??????
?
and ??????
?
=??????
?
+??????
?
??????
??
=??????
??
+??????
??
??????
??
=??????
??
+??????
??
38
1. Bipolar Junction Transistor (BJT)
1.4 Applying the BJT in Amplifier Design
The Small-Signal Voltage Gain
+
V
BE
+
_
V
CC
R
C
+
_
_
i
B
i
C
i
E
v
be
v
BE
v
CE
39
1. Bipolar Junction Transistor (BJT)
1.4 Applying the BJT in Amplifier Design
The Small-Signal Voltage Gain
If the input signal v
be
is small signal at the output v
ce
will be nearly proportional
to v
be
with the constant of proportionality being the slope of the almost-linear
segment of the VTC around Q. This is the voltage gain A
v
of the amplifier, and its
value can be determined by:
BE BE
CE
v
BEv V
dv
A
dv
/
/
BE T
BE T
v V
CE CC C S
V V
C S
v V R I e
I I e
C
v C
T
I
A R
V
1.The gain is negative, which signifies that
the amplifier is inverting; that is, there is
a 180phase shift between the input and
the output.
2.The gain is proportional to the collector
bias current I
C
& to the load resistance R
C
C C CC CE
v
T T
I R V V
A
V V
max
CC
v
T
V
A
V
maximum gain A
v
is obtained by biasing the BJT
at the edge of saturation
+
V
BE
+
_
V
CC
R
C
+
_
_
i
B
i
C
i
E
v
be
v
BE
v
CE
1. Bipolar Junction Transistor (BJT)
1.4 Applying the BJT in Amplifier Design
The Small-Signal Voltage Gain
If the input signal v
be
is small signal at the output v
ce
will be nearly proportional
to v
be
with the constant of proportionality being the slope of the almost-linear
segment of the VTC around Q. This is the voltage gain A
v
of the amplifier, and its
value can be determined by:
BE BE
CE
v
BEv V
dv
A
dv
/
/
BE T
BE T
v V
CE CC C S
V V
C S
v V R I e
I I e
C
v C
T
I
A R
V
1.The gain is negative, which signifies that
the amplifier is inverting; that is, there is
a 180phase shift between the input and
the output.
2.The gain is proportional to the collector
bias current I
C
& to the load resistance R
C
C C CC CE
v
T T
I R V V
A
V V
max
CC
v
T
V
A
V
maximum gain A
v
is obtained by biasing the BJT
at the edge of saturation
+
V
BE
+
_
V
CC
R
C
+
_
_
i
B
i
C
i
E
v
be
v
BE
v
CE
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
40
A graphical interpretation for g
m
is equal tothe
slopeof the i
C
vs.v
BE
characteristic curve at i
C
= I
C
(i.e., at the bias point Q).
Collector Current i
C
&Transconductance g
m
( )/ / /
/
BE be T be T BE T
BE T
C
BE BE be V v V v V V V
C S Sv V
C S
I
v V v
i I e I e e
i I e
/
be T
v V
C C
i I e
1
c
be C
be T C C C be C c
T T
i
v I
v V i I I v I i
V V
mc be
igv 40
C
C
T
m
I
V
g I
where
C C
C
m
BEi I
i
g
v
If
is called transconductance
1.5 Small-Signal Operating Model
40
A graphical interpretation for g
m
is equal tothe
slopeof the i
C
vs.v
BE
characteristic curve at i
C
= I
C
(i.e., at the bias point Q).
Collector Current i
C
&Transconductance g
m
( )/ / /
/
BE be T be T BE T
BE T
C
BE BE be V v V v V V V
C S Sv V
C S
I
v V v
i I e I e e
i I e
/
be T
v V
C C
i I e
1
c
be C
be T C C C be C c
T T
i
v I
v V i I I v I i
V V
mc be
igv 40
C
C
T
m
I
V
g I
where
C C
C
m
BEi I
i
g
v
If
is called transconductance
41
. Bottom Line: Current Gain: i
C
>> i
B
Figure: Graphical determination of the signal components v
be
, i
b
, i
c
, and v
ce
when a signal component
v
i
is superimposed on the dc voltage V
BB
.
Applying a signal v
i
…
…changes the
BE voltage v
be
…
. …which changes the
base current i
b
.
The base current change
shows up here…
. …and a change
in collector current i
c
.
. …with a corresponding
change in CE voltage v
ce
…
BJT Amplification
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
. Bottom Line: Current Gain: i
C
>> i
B
Figure: Graphical determination of the signal components v
be
, i
b
, i
c
, and v
ce
when a signal component
v
i
is superimposed on the dc voltage V
BB
.
Applying a signal v
i
…
…changes the
BE voltage v
be
…
. …which changes the
base current i
b
.
The base current change
shows up here…
. …and a change
in collector current i
c
.
. …with a corresponding
change in CE voltage v
ce
…
BJT Amplification
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
42
Base Current i
B
andInput resistance r
at Base
??????
?
??
?
?
=
?
?
=
?
?
?
?
1
C C C
B be B b
T
i I I
i v I i
V
1
C m
b be be
T
I g
i v v
V
Total base current:
Signal component
C
m
T
I
g
V
The small-signal input resistancebetween baseand emitter,
looking into the base, is denoted by r
π
and is defined as
Also, ??????
is called Dynamic input resistancelooking between the
base-emitter
1.5 Small-Signal Operating Model
42
Base Current i
B
andInput resistance r
at Base
??????
?
??
?
?
=
?
?
=
?
?
?
?
1
C C C
B be B b
T
i I I
i v I i
V
1
C m
b be be
T
I g
i v v
V
Total base current:
Signal component
C
m
T
I
g
V
The small-signal input resistancebetween baseand emitter,
looking into the base, is denoted by r
π
and is defined as
Also, ??????
is called Dynamic input resistancelooking between the
base-emitter
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
43
Emitter Current i
E
andInput resistance r
e
atEmitter
??????
?
≡
?
??
?
?
=
?
?
?
?
=
?
?
≈
5
?
?
•Relationship between ??????
??????
and??????
??????
:
where,
C C c c C E
E E e e be be
T T
i I i i I I
i I i i v v
V V
The total emitter current:
Denote the small-signal resistance between base&
emitterlooking into the emitterby r
e
, it can be
defined as
be b e e
v ir ri
()
/ ( 1)
e ee b
r i i r r
1.5 Small-Signal Operating Model
43
Emitter Current i
E
andInput resistance r
e
atEmitter
??????
?
≡
?
??
?
?
=
?
?
?
?
=
?
?
≈
5
?
?
•Relationship between ??????
??????
and??????
??????
:
where,
C C c c C E
E E e e be be
T T
i I i i I I
i I i i v v
V V
The total emitter current:
Denote the small-signal resistance between base&
emitterlooking into the emitterby r
e
, it can be
defined as
be b e e
v ir ri
()
/ ( 1)
e ee b
r i i r r
44
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Voltage Gain A
v
Total collector voltage v
CE
( ) ( )
CE CC C C CC C c C CC C C c C
CE c C
v V i R V I i R V I R i R
V i R
V
CE
is the dc bias voltage at the collector, and the signal voltage v
ce
is
( )
ce c C m be C m C be
v i R g v R g R v
Thus the voltage gain of this amplifier A
v
is
ce C C
v m C
be T
v I R
A g R
v V
+
V
BE
+
_
V
CC
R
C
+
_
_
i
B
i
C
i
E
v
be
v
BE
v
CE
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Voltage Gain A
v
Total collector voltage v
CE
( ) ( )
CE CC C C CC C c C CC C C c C
CE c C
v V i R V I i R V I R i R
V i R
V
CE
is the dc bias voltage at the collector, and the signal voltage v
ce
is
( )
ce c C m be C m C be
v i R g v R g R v
Thus the voltage gain of this amplifier A
v
is
ce C C
v m C
be T
v I R
A g R
v V
+
V
BE
+
_
V
CC
R
C
+
_
_
i
B
i
C
i
E
v
be
v
BE
v
CE
45
Separating the (ac) Signal and the DCquantities
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Separating the (ac) Signal and the DCquantities
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
46
Hybrid-??????Model
VCCS (a transconductance amplifier) CCCS (a current amplifier).
() ()
1 1
be be be be
e m be m
e
v v v v
i g v g r
r r r r
A slightly different equivalent-circuit model can be obtained by
()()
m be m b m b b
g v g ir g r i i
C
m
T
I
g
V
/ /
T B m
r V I g
Fig.: 2 slightly different versions of the
hybrid-
π
model for the small-signal
operationof the BJT.
i
c
= g
m
v
be
i
b
= v
be
/r
π
+
+
_
R
C
_
i
b
=v
be
/r
i
c
=g
m
v
be
v
be
v
ce
v
be
B
E
i
e
v
be
r
e
=
C
(a)
1.5 Small-Signal Operating Model
46
Hybrid-??????Model
VCCS (a transconductance amplifier) CCCS (a current amplifier).
() ()
1 1
be be be be
e m be m
e
v v v v
i g v g r
r r r r
A slightly different equivalent-circuit model can be obtained by
()()
m be m b m b b
g v g ir g r i i
C
m
T
I
g
V
/ /
T B m
r V I g
Fig.: 2 slightly different versions of the
hybrid-
π
model for the small-signal
operationof the BJT.
i
c
= g
m
v
be
i
b
= v
be
/r
π
+
+
_
R
C
_
i
b
=v
be
/r
i
c
=g
m
v
be
v
be
v
ce
v
be
B
E
i
e
v
be
r
e
=
C
(a)
r
0
appears in parallel with ??????
?
(load resistor of the amplifier)
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
47
Hybrid-??????Model
with resistance ??????
?
(
Just in case of taking into account for Early Effect
)
0
A CE
C
r
V V
I
()
0
0
m C
be
v
rg R
v
g
m
= I
C
/V
T
r
= V
T
/I
B
= /g
m
r
o
= V
A
/I
C
0
appears in parallel with ??????
?
(load resistor of the amplifier)
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
47
Hybrid-??????Model
with resistance ??????
?
(
Just in case of taking into account for Early Effect
)
0
A CE
C
r
V V
I
()
0
0
m C
be
v
rg R
v
g
m
= I
C
/V
T
r
= V
T
/I
B
= /g
m
r
o
= V
A
/I
C
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
48
T-Model(an alternative model)
Fig.: T model of the BJT. The circuit in (a) is
a VCCSrepresentation and that in (b) is a
CCCS representation. These models show the
emitter resistance r
e
rather than the base
resistance r
π
featured in the hybrid-π model.
()()
m be m e e m e e e
g v g ir g r i i
Here, the resistance between base
& emitter, looking into the emitter,
is explicitly shown r
e
() ()
()
1 1 1
1 1
be be be be be be
b m be m e
e e e e e
v v v v v v
i g v g r
r r r r r r
g
m
= I
C
/V
T
r
e
= V
T
/I
E
= /g
m
1.5 Small-Signal Operating Model
48
T-Model(an alternative model)
Fig.: T model of the BJT. The circuit in (a) is
a VCCSrepresentation and that in (b) is a
CCCS representation. These models show the
emitter resistance r
e
rather than the base
resistance r
π
featured in the hybrid-π model.
()()
m be m e e m e e e
g v g ir g r i i
Here, the resistance between base
& emitter, looking into the emitter,
is explicitly shown r
e
() ()
()
1 1 1
1 1
be be be be be be
b m be m e
e e e e e
v v v v v v
i g v g r
r r r r r r
g
m
= I
C
/V
T
r
e
= V
T
/I
E
= /g
m
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
49
•T-Model with resistance ??????
??????
(Accounting for Early Effect)
C
m
T
T
e
E m
A
o
C
I
g
V
V
r
I g
V
r
I
The T models can be added by r
o
to
account for the dependence of i
c
to v
ce
--
(the Early effect) to obtain the equivalent
circuits
1.5 Small-Signal Operating Model
49
•T-Model with resistance ??????
??????
(Accounting for Early Effect)
C
m
T
T
e
E m
A
o
C
I
g
V
V
r
I g
V
r
I
The T models can be added by r
o
to
account for the dependence of i
c
to v
ce
--
(the Early effect) to obtain the equivalent
circuits
50
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Small-Signal Models of the PNP Transistor
Although the above small-signal models were developed for the case of the NPN
transistor, they apply equally well to the PNPtransistor with no change in
polarities.
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Small-Signal Models of the PNP Transistor
Although the above small-signal models were developed for the case of the NPN
transistor, they apply equally well to the PNPtransistor with no change in
polarities.
51
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Application of the Small-Signal Equivalent Circuits
The small-signal BJT circuit models makes the analysis of transistor amplifier circuits a
systematic process. The process consists of the 5following steps:
1.Eliminate the signal source and determine the Q-point of the BJT and in particular
the dc current I
C
,ie.ac voltage sourcesshortand ac current sourcesopen.
Then replacing reactive elements with DC equivalents (C open and L short)
2.Calculate small-signal model parameters: g
m
= I
C
/V
T
, r
π
= /g
m
&r
e
= V
T
/I
E
= /g
m
.
3.Eliminate the DC sources: each DC voltage sourcea short circuit and each DC
current sourceopen circuit.
4.Replace the BJT with one of its small-signal equivalent circuit models. Although
any one of the models can be used, one might be more convenient than the others for
the particular circuit being analyzed.
5.Analyze the resulting circuit to determine the required quantities (e.g., voltage gain,
input resistance).
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
Application of the Small-Signal Equivalent Circuits
The small-signal BJT circuit models makes the analysis of transistor amplifier circuits a
systematic process. The process consists of the 5following steps:
1.Eliminate the signal source and determine the Q-point of the BJT and in particular
the dc current I
C
,ie.ac voltage sourcesshortand ac current sourcesopen.
Then replacing reactive elements with DC equivalents (C open and L short)
2.Calculate small-signal model parameters: g
m
= I
C
/V
T
, r
π
= /g
m
&r
e
= V
T
/I
E
= /g
m
.
3.Eliminate the DC sources: each DC voltage sourcea short circuit and each DC
current sourceopen circuit.
4.Replace the BJT with one of its small-signal equivalent circuit models. Although
any one of the models can be used, one might be more convenient than the others for
the particular circuit being analyzed.
5.Analyze the resulting circuit to determine the required quantities (e.g., voltage gain,
input resistance).
Ex. 8: Analyze the transistor amplifier shown in the
below Figure to determine its voltage gain
?
?
?
?
. Assume
??????=100and neglect the Early effect.
52
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
below Figure to determine its voltage gain
?
?
?
?
. Assume
??????=100and neglect the Early effect.
52
1. Bipolar Junction Transistor (BJT)
1.5 Small-Signal Operating Model
53
Ex. 8: solution
Apply the five-step process outlined above
1
st
step: find the Q point(DC
analysis), as shown in Fig. (b)
2
nd
step: Calculate the values of
the small-signal model parameters
25
10.8 ( )
(2.3/0.99)
2.3
92 (mA/V)
25
100
1.09 (k )
92
T
e
E
C
m
T
m
V
r
I
I
g
V
r
g
W
W
3
rd
step: Replacing V
BB
& V
CC
with short circuits as in Fig. (c)
R
BB
R
C
v
i
+
_
v
o
(c)
Ex. 8: solution
Apply the five-step process outlined above
1
st
step: find the Q point(DC
analysis), as shown in Fig. (b)
2
nd
step: Calculate the values of
the small-signal model parameters
25
10.8 ( )
(2.3/0.99)
2.3
92 (mA/V)
25
100
1.09 (k )
92
T
e
E
C
m
T
m
V
r
I
I
g
V
r
g
W
W
3
rd
step: Replacing V
BB
& V
CC
with short circuits as in Fig. (c)
R
BB
R
C
v
i
+
_
v
o
(c)
54
Ex. 8: solution (continued)
4
th
step: the small-signal analysis, employ either of the
2 hybrid-π, equivalent-circuit models (fig. (d))
(d)
5
th
step: Analysis of the equivalent circuit
in Fig. (d)
1.09
101.09
0.011
be i i
BB
i
r
v v v
r R
v
92 0.011 3 3.04
o m be C
i i
v g v R
v v
3.04 (V/V)
o
v
i
v
A
v
Ex. 8: solution (continued)
4
th
step: the small-signal analysis, employ either of the
2 hybrid-π, equivalent-circuit models (fig. (d))
(d)
5
th
step: Analysis of the equivalent circuit
in Fig. (d)
1.09
101.09
0.011
be i i
BB
i
r
v v v
r R
v
92 0.011 3 3.04
o m be C
i i
v g v R
v v
3.04 (V/V)
o
v
i
v
A
v
55
1. Bipolar Junction Transistor (BJT)
1.5Frequency Response
The high frequency performance of analogue circuits is largely determined by
circuit capacitances:
Internal junction capacitances
External parasitic capacitances
AC equivalent circuit with capacitance:
r
o
+
g
m
V
E
B
V
_
C
C
m
C
r
x
r
B’
1. Bipolar Junction Transistor (BJT)
1.5Frequency Response
The high frequency performance of analogue circuits is largely determined by
circuit capacitances:
Internal junction capacitances
External parasitic capacitances
AC equivalent circuit with capacitance:
r
o
+
g
m
V
E
B
V
_
C
C
m
C
r
x
r
B’
2. Field-Effect Transistor (FET)
2.1 Introduction
•High input impedance (??????Ω).
•Temperature stable better than BJT
•Smaller than BJT
•Less noise compare to BJT
56
BJT
Control current
??????
??????
??????
?
C
B
E
FET
Control voltage
??????
????????????
??????
?
D
G
S
Three Terminal
Drain-D
Gate-G
Source-S
2.1 Introduction
•High input impedance (??????Ω).
•Temperature stable better than BJT
•Smaller than BJT
•Less noise compare to BJT
56
BJT
Control current
??????
??????
??????
?
C
B
E
FET
Control voltage
??????
????????????
??????
?
D
G
S
Three Terminal
Drain-D
Gate-G
Source-S
2. FET
2.1 Introduction
57
Types of Field –Effect Transistors
: Insulated-gate FET
(Junction Field-Effect Transistor)
(Metal-Oxide Semiconductor FET)
2.1 Introduction
57
Types of Field –Effect Transistors
: Insulated-gate FET
(Junction Field-Effect Transistor)
(Metal-Oxide Semiconductor FET)
n-channel JFET
??????
??
=0??????and -??????
?
<??????
??
<0 ??????
??
≤−??????
?
p-channel JFET
2. FET
2.2 JFET: Structure and Operation
58
pinch-off voltage (điệnthếthắt): V
P
??????
??
=0??????and -??????
?
<??????
??
<0 ??????
??
≤−??????
?
p-channel JFET
2. FET
2.2 JFET: Structure and Operation
58
pinch-off voltage (điệnthếthắt): V
P
59
2. FET
2.2 JFET: Structure &
Operation
Fig.: Effects of V
GS
on channel width,
resistance, and drain current (V
GG
= V
GS
).
2. FET
2.2 JFET: Structure &
Operation
Fig.: Effects of V
GS
on channel width,
resistance, and drain current (V
GG
= V
GS
).
2. FET
2.2 JFET: Structure and Operation
•Three different transistor circuit configurations:
60
Common Source (CS) Common Gate (CG) Common Drain (CD)
2.2 JFET: Structure and Operation
•Three different transistor circuit configurations:
60
Common Source (CS) Common Gate (CG) Common Drain (CD)
??????
?
=??????
???
(1−
??????
??
??????
?????
)
6
2. FET
2.3 JFET: I-V Characteristics
•Transfer Characteristic: ??????
?
=??????(??????
??
)|
?
??
@???
•Output Characteristic: ??????
?
=??????(??????
??
)|
?
??
@?????
61
Forward Transcondutanceg
m
??????
?
=
∆?
?
∆?
??
??????
?
=??????
?4
1−
??????
??
??????
??(???)
??????
?4
=
2??????
???
??????
??(???)
Fig.: JFET transfer characteristic curve (n-channel);
g
m
varies depending on the bias point (V
GS
)
?
=??????
???
(1−
??????
??
??????
?????
)
6
2. FET
2.3 JFET: I-V Characteristics
•Transfer Characteristic: ??????
?
=??????(??????
??
)|
?
??
@???
•Output Characteristic: ??????
?
=??????(??????
??
)|
?
??
@?????
61
Forward Transcondutanceg
m
??????
?
=
∆?
?
∆?
??
??????
?
=??????
?4
1−
??????
??
??????
??(???)
??????
?4
=
2??????
???
??????
??(???)
Fig.: JFET transfer characteristic curve (n-channel);
g
m
varies depending on the bias point (V
GS
)
2. FET
2.3 JFET: I-V Characteristics
62
Saturation region
Breakdown
region
Linear region
(Ohmic)
??????
????????????
(Pinch-off voltage)
•Output Characteristic
Linear/Ohmic/Triode Region
Saturation Region
Breakdown region
(b) Drain characteristic
2.3 JFET: I-V Characteristics
62
Saturation region
Breakdown
region
Linear region
(Ohmic)
??????
????????????
(Pinch-off voltage)
•Output Characteristic
Linear/Ohmic/Triode Region
Saturation Region
Breakdown region
(b) Drain characteristic
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
63
•Family of output Characteristics
Cutoff voltage (V
GS(off)
) and Pinch-off Voltage (V
P
)?
2.3 JFET: I-V Characteristics
63
•Family of output Characteristics
Cutoff voltage (V
GS(off)
) and Pinch-off Voltage (V
P
)?
Example9:
•For JFETwith ??????
??(???)
=−4 ??????and ??????
???
=12 ????????????. Determine the
minimum value of ??????
??
required to put the device in the constant-
current area of operation.
64
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
•For JFETwith ??????
??(???)
=−4 ??????and ??????
???
=12 ????????????. Determine the
minimum value of ??????
??
required to put the device in the constant-
current area of operation.
64
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
Example9-Solution
•??????
??(???)
=−4 ??????→ ??????
?
=4 ??????
•Minimum value of ??????
??
for JFETto be in its saturation region:
??????
??
=??????
?
=4 ??????
•In the constant-current area with ??????
??
=0:
??????
?
=??????
???
=12 ????????????
•Drop across the drain resistor:
??????
?
?
=??????
?
??????
?
=12 ????????????×560 W=6.72 ??????
•Apply the KVL: ??????
??
=??????
??
+??????
?
?
=4+6.72=10.7 (??????)
65
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
•??????
??(???)
=−4 ??????→ ??????
?
=4 ??????
•Minimum value of ??????
??
for JFETto be in its saturation region:
??????
??
=??????
?
=4 ??????
•In the constant-current area with ??????
??
=0:
??????
?
=??????
???
=12 ????????????
•Drop across the drain resistor:
??????
?
?
=??????
?
??????
?
=12 ????????????×560 W=6.72 ??????
•Apply the KVL: ??????
??
=??????
??
+??????
?
?
=4+6.72=10.7 (??????)
65
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
Example 10:
A particular p-channel JFEThas ??????
?????
=4 ??????. What is ??????
?
when ??????
??
=6 ???????
66
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
A particular p-channel JFEThas ??????
?????
=4 ??????. What is ??????
?
when ??????
??
=6 ???????
66
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
Example10-Solution
•P-channel JFETrequired a positive gate-source voltage. More positive voltage,
less drain current.
•??????
??
=4 ??????, then ??????
?
=0.
•=> Further Increase ??????
??
(??????
??
=6??????), keep JFETcutoff (??????
?
=0)
67
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
•P-channel JFETrequired a positive gate-source voltage. More positive voltage,
less drain current.
•??????
??
=4 ??????, then ??????
?
=0.
•=> Further Increase ??????
??
(??????
??
=6??????), keep JFETcutoff (??????
?
=0)
67
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
68
The transfer characteristic curve can also be
developed from the drain characteristic
curves by plotting values of I
D
for the
values of V
GS
taken from the family of
drain curves at pinch-off,
n-channel JFET
transfer characteristic
curve
The JFET drain current
characteristic curves
??????
?
=??????
???
(1−
??????
??
??????
?????
)
6
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
N-channel JFET
The transfer characteristic curve can also be
developed from the drain characteristic
curves by plotting values of I
D
for the
values of V
GS
taken from the family of
drain curves at pinch-off,
n-channel JFET
transfer characteristic
curve
The JFET drain current
characteristic curves
??????
?
=??????
???
(1−
??????
??
??????
?????
)
6
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
N-channel JFET
Example11:
•N-channel JFET2N5459has ??????
???
=9????????????and ??????
??(???)
=−8??????(Maximum). Determine
the drain current for ??????
??
=0??????;−1??????;−4?????? ?
69
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
•N-channel JFET2N5459has ??????
???
=9????????????and ??????
??(???)
=−8??????(Maximum). Determine
the drain current for ??????
??
=0??????;−1??????;−4?????? ?
69
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
Example11-Solution
•??????
??
=0??????, ??????
?
=??????
???
=9????????????
Use equation: ??????
?
=??????
???
(1−
?
??
?
??
)
6
to calculate drain current I
D
•??????
??
=−1, ??????
?
=6.89????????????
•??????
??
=−4, ??????
?
=2.25????????????
70
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
•??????
??
=0??????, ??????
?
=??????
???
=9????????????
Use equation: ??????
?
=??????
???
(1−
?
??
?
??
)
6
to calculate drain current I
D
•??????
??
=−1, ??????
?
=6.89????????????
•??????
??
=−4, ??????
?
=2.25????????????
70
2. Field-Effect Transistor
2.3 JFET: I-V Characteristics
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
71
•Fixed Bias:
??????
?
=0→??????
??
=??????
??
??????
?
=??????
???
(1−
?
??
?
??
)
6
??????
??
=??????
??
−??????
?
??????
?•Self-Bias:
??????
?
??????
?
+??????
??
+??????
?
??????
?
=0
→??????
??
=−??????
?
??????
?
(Note: ??????
?
=0and ??????
?
=??????
?
)
2.4 JFET: Biasing circuits
71
•Fixed Bias:
??????
?
=0→??????
??
=??????
??
??????
?
=??????
???
(1−
?
??
?
??
)
6
??????
??
=??????
??
−??????
?
??????
?•Self-Bias:
??????
?
??????
?
+??????
??
+??????
?
??????
?
=0
→??????
??
=−??????
?
??????
?
(Note: ??????
?
=0and ??????
?
=??????
?
)
Example12:
•For n-channel JFETin Figure, internal
parameter values such as ??????
?
,??????
??(???)
and
??????
???
are such that a drain current (??????
?
) of
approximately 5 mA is produced.
Find ??????
??
and ??????
??
?
72
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
•For n-channel JFETin Figure, internal
parameter values such as ??????
?
,??????
??(???)
and
??????
???
are such that a drain current (??????
?
) of
approximately 5 mA is produced.
Find ??????
??
and ??????
??
?
72
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
Example 12 -Solution
•??????
?
=??????
?
??????
?
=5 ????????????×220 W=1.1 ??????
•??????
?
=??????
??
−??????
?
??????
?
=15−5 ????????????×1 ??????W=10 ??????
•=> ??????
??
=??????
?
−??????
?
=10 ??????−1.1 ??????=8.9 ??????
•Since ??????
?
=0 ??????⇒ ??????
??
=??????
?
−??????
?
=−1.1 ??????
73
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
•??????
?
=??????
?
??????
?
=5 ????????????×220 W=1.1 ??????
•??????
?
=??????
??
−??????
?
??????
?
=15−5 ????????????×1 ??????W=10 ??????
•=> ??????
??
=??????
?
−??????
?
=10 ??????−1.1 ??????=8.9 ??????
•Since ??????
?
=0 ??????⇒ ??????
??
=??????
?
−??????
?
=−1.1 ??????
73
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
Example 13:
•Determine ??????
?
required to self-
bias a n-channel JFETthat has
transfer characteristic curve as
in Figure at ??????
??
=−5 ??????
74
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
•Determine ??????
?
required to self-
bias a n-channel JFETthat has
transfer characteristic curve as
in Figure at ??????
??
=−5 ??????
74
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
Example13-Solution
•From Figure, ??????
?
=6.25 ????????????at ??????
??
=−5 ??????.
??????
?
=
?
??
?
?
=
9 ?
:.69 ??
=800 W
75
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
•From Figure, ??????
?
=6.25 ????????????at ??????
??
=−5 ??????.
??????
?
=
?
??
?
?
=
9 ?
:.69 ??
=800 W
75
2. Field-Effect Transistor
2.4 JFET: Biasing circuits
2. Field-Effect Transistor
76
Types of Field –Effect Transistors
: Insulated-gate FET
(Junction Field-Effect Transistor)
(Metal-Oxide Semiconductor FET)
76
Types of Field –Effect Transistors
: Insulated-gate FET
(Junction Field-Effect Transistor)
(Metal-Oxide Semiconductor FET)
2. FET
2.5 MOSFET: Structure and Operation
77
`
Fig.: Physical structure of the enhancement-type NMOS transistor
3D view
2D view
2.5 MOSFET: Structure and Operation
77
`
Fig.: Physical structure of the enhancement-type NMOS transistor
3D view
2D view
78
Creating a Channel for Current Flow
2. FET
2.5 MOSFET: Structure and Operation
Fig.: The enhancement-type NMOS
transistor with v
GS
> 0.
Operation with Zero Gate VoltageIf v
GS
= 0 V:
MOSFET acts like 2 back-
to-back diodes exist in series between D
& Sprevent current conduction
from drain to source when a voltage v
DS
is applied. Channel between D& Shas a
very high resistance (~ 10
12
W).
If v
GS
> 0 V: underneath Garea, holes are pushed downward depletion
region; also, attracts electrons from the S& Dregions into the channel
region created n regionconnecting the S& Dregions (named as
induced regionor n-channel or inversion layer).
The voltage across the
oxide is uniform
Creating a Channel for Current Flow
2. FET
2.5 MOSFET: Structure and Operation
Fig.: The enhancement-type NMOS
transistor with v
GS
> 0.
Operation with Zero Gate VoltageIf v
GS
= 0 V:
MOSFET acts like 2 back-
to-back diodes exist in series between D
& Sprevent current conduction
from drain to source when a voltage v
DS
is applied. Channel between D& Shas a
very high resistance (~ 10
12
W).
If v
GS
> 0 V: underneath Garea, holes are pushed downward depletion
region; also, attracts electrons from the S& Dregions into the channel
region created n regionconnecting the S& Dregions (named as
induced regionor n-channel or inversion layer).
The voltage across the
oxide is uniform
79
Creating a Channel for Current Flow??????
??
: Oxide capacitance per unit gate area [F/??????
6
]
??????
?
: Mobility of electrons at surface of channel [??????
6
/V.s]
??????
?
[0.31 V]: threshold voltage of ??????
??
to form a conducting
channel.
(Sufficient number of mobile electrons accumulate in the
channel region).
??????
??
??????
??
−??????
?
: effective voltage or overdrive voltage, is the
quantity that determines the charge in the channel.
2. FET
2.5 MOSFET: Structure and Operation
Applying a Small v
DS
> 0
Then, if v
DS
> 0 there is current flows (e
-
) in this channel.
Case of v
DS
is small (i.e., 50 mV or so). current in the channel, i
D
,
will be from DS.
Fig.:An NMOS transistor with v
GS
> V
t
and with a small v
DS
applied.
Calculation of the value of i
D
.
()
D n ox OV DS n ox GS t DS
W W
i C v v C v V v
L L
m m
Creating a Channel for Current Flow??????
??
: Oxide capacitance per unit gate area [F/??????
6
]
??????
?
: Mobility of electrons at surface of channel [??????
6
/V.s]
??????
?
[0.31 V]: threshold voltage of ??????
??
to form a conducting
channel.
(Sufficient number of mobile electrons accumulate in the
channel region).
??????
??
??????
??
−??????
?
: effective voltage or overdrive voltage, is the
quantity that determines the charge in the channel.
2. FET
2.5 MOSFET: Structure and Operation
Applying a Small v
DS
> 0
Then, if v
DS
> 0 there is current flows (e
-
) in this channel.
Case of v
DS
is small (i.e., 50 mV or so). current in the channel, i
D
,
will be from DS.
Fig.:An NMOS transistor with v
GS
> V
t
and with a small v
DS
applied.
Calculation of the value of i
D
.
()
D n ox OV DS n ox GS t DS
W W
i C v v C v V v
L L
m m
80
2. FET
2.5 MOSFET: Structure and Operation
Calculation of the value of i
D
()
D n ox OV DS n ox GS t DS
W W
i C v v C v V v
L L
m m
g
DS
The conductance of the channel
Process transconductance parameter
n n ox
k Cm
MOSFET transconductance parameter
( )( )( )
/ /
n n n ox
k k W L C W Lm
C
ox
: called the oxide capacitance (units of F/m
2
),
12 11
0
3.9 3.9 8.854 10 3.45 10 ( / )
ox
ox
ox
ox
C
t
F m
(only for the permittivity of the SiO
2
)
t
ox
:oxide thickness (m) is determined by the process technology used to fabricate the MOSFET
(A/V
2
) (the subscript n denotes n channel)
(A/V
2
)
With v
DS
is small, the MOSFET behaves as a linear resistancer
DS
whose value is controlled by v
GS
,
() ()
1 1 1
( / ) ( / )( )
DS
DS n ox OV n ox GS t
r
g C W L v C W L v Vm m
Applying a Small v
DS
> 0
2. FET
2.5 MOSFET: Structure and Operation
Calculation of the value of i
D
()
D n ox OV DS n ox GS t DS
W W
i C v v C v V v
L L
m m
g
DS
The conductance of the channel
Process transconductance parameter
n n ox
k Cm
MOSFET transconductance parameter
( )( )( )
/ /
n n n ox
k k W L C W Lm
C
ox
: called the oxide capacitance (units of F/m
2
),
12 11
0
3.9 3.9 8.854 10 3.45 10 ( / )
ox
ox
ox
ox
C
t
F m
(only for the permittivity of the SiO
2
)
t
ox
:oxide thickness (m) is determined by the process technology used to fabricate the MOSFET
(A/V
2
) (the subscript n denotes n channel)
(A/V
2
)
With v
DS
is small, the MOSFET behaves as a linear resistancer
DS
whose value is controlled by v
GS
,
() ()
1 1 1
( / ) ( / )( )
DS
DS n ox OV n ox GS t
r
g C W L v C W L v Vm m
Applying a Small v
DS
> 0
81
2. FET
2.5 MOSFET: Structure and Operation
() ()
1 1 1
( / ) ( / )( )
DS
DS n ox OV n ox GS t
r
g C W L v C W L v Vm m
Fig.:The i
D
versus v
DS
characteristics when
v
DS
, is kept small. The device operates as a
linear resistance whose value is controlled
by v
GS
.
Applying a Small v
DS
> 0
MOSFET works as a voltage-controlled resistance, i
D
versus v
DS
for various values of v
GS
. The resistance is infinite for v
GS
≤ V
t
and
decreases as v
GS
is increased above V
t
.
For the MOSFET to conduct created/induced a channel. Then,
increasing v
GS
above the threshold voltage V
t
enhances the channel,
called:enhancement-mode operation and enhancement-type
MOSFET.
Fig.: 3 equivalent circuit symbol for the n-
channel enhancement-type MOSFET
G
D
S
G
D
S
BG
D
S
BG
D
S
2. FET
2.5 MOSFET: Structure and Operation
() ()
1 1 1
( / ) ( / )( )
DS
DS n ox OV n ox GS t
r
g C W L v C W L v Vm m
Fig.:The i
D
versus v
DS
characteristics when
v
DS
, is kept small. The device operates as a
linear resistance whose value is controlled
by v
GS
.
Applying a Small v
DS
> 0
MOSFET works as a voltage-controlled resistance, i
D
versus v
DS
for various values of v
GS
. The resistance is infinite for v
GS
≤ V
t
and
decreases as v
GS
is increased above V
t
.
For the MOSFET to conduct created/induced a channel. Then,
increasing v
GS
above the threshold voltage V
t
enhances the channel,
called:enhancement-mode operation and enhancement-type
MOSFET.
Fig.: 3 equivalent circuit symbol for the n-
channel enhancement-type MOSFET
G
D
S
G
D
S
BG
D
S
BG
D
S
82
2. FET
2.5 MOSFET: Structure and Operation
Operation as v
DS
is increased
Assume MOSFET be operated at a constant V
OV
.
v
DS
appears across the length of the channel. That is, as we
travel along the channel from SD, the v
DS
increases from
0 v
DS
.
Since the channel depth depends on v
DS
the channel is no
longer of uniform depth as shown in the Figures.
Fig.: (a) MOSFET with v
GS
= V
t
+ V
OV
, v
DS
causes the voltage drop along
the channel to vary linearly, with an average value of (½)v
DS
at the
midpoint. Since v
GD
> V
t
, the channel still exists at D end. (b) The channel
shape corresponding to the situation in (a). While the depth of the channel
at the S end is still proportional to V
OV
, that at the D end is proportional to
(V
OV
−v
DS
).
2. FET
2.5 MOSFET: Structure and Operation
Operation as v
DS
is increased
Assume MOSFET be operated at a constant V
OV
.
v
DS
appears across the length of the channel. That is, as we
travel along the channel from SD, the v
DS
increases from
0 v
DS
.
Since the channel depth depends on v
DS
the channel is no
longer of uniform depth as shown in the Figures.
Fig.: (a) MOSFET with v
GS
= V
t
+ V
OV
, v
DS
causes the voltage drop along
the channel to vary linearly, with an average value of (½)v
DS
at the
midpoint. Since v
GD
> V
t
, the channel still exists at D end. (b) The channel
shape corresponding to the situation in (a). While the depth of the channel
at the S end is still proportional to V
OV
, that at the D end is proportional to
(V
OV
−v
DS
).
83
Fig.: i
D
versus v
DS
for an E-NMOS transistor operated
with v
GS
= V
t
+V
OV
> V
t
.
2. FET
2.5 MOSFET: Structure and Operation
Operation as v
DS
is increased
As v
DS
↑, the channel becomes more tapered and its
resistance ↑ correspondingly.
The equation of drain current i
D
is calculated as (in
triode region):
1
2
D n OV DS DS
W
i k V v v
L
()
21
2
D n GS t DS DS
W
i k v V v v
L
or
Triode = Linear = ohmic
Fig.: i
D
versus v
DS
for an E-NMOS transistor operated
with v
GS
= V
t
+V
OV
> V
t
.
2. FET
2.5 MOSFET: Structure and Operation
Operation as v
DS
is increased
As v
DS
↑, the channel becomes more tapered and its
resistance ↑ correspondingly.
The equation of drain current i
D
is calculated as (in
triode region):
1
2
D n OV DS DS
W
i k V v v
L
()
21
2
D n GS t DS DS
W
i k v V v v
L
or
Triode = Linear = ohmic
84
2. FET
2.5 MOSFET: Structure and Operation
Operation for v
DS
≥ V
OV
: Channel Pinch-Off and Drain Current Saturation i
D
When v
DS
= V
OV
and v
GD
= V
t
the zero depthof the channel @ Dend, means channel pinch-off. Let
v
DS
↑ beyond this value (i.e., v
DS
> V
OV
): the current i
D
remains constant (thus saturates):
21
2
D n OV
W
i k V
L
The MOSFET is entered the saturation region/mode
v
DS
at which saturation occursis: V
DSsat
= V
OV
= V
GS
− V
t
Note:i
D
in saturationcan be rewritten as the constant
overdrive voltage v
OV
(= v
GS
-V
t
):
21
2
D n OV
W
i k v
L
()
21
2
D n GS t
W
i k v V
L
or
2. FET
2.5 MOSFET: Structure and Operation
Operation for v
DS
≥ V
OV
: Channel Pinch-Off and Drain Current Saturation i
D
When v
DS
= V
OV
and v
GD
= V
t
the zero depthof the channel @ Dend, means channel pinch-off. Let
v
DS
↑ beyond this value (i.e., v
DS
> V
OV
): the current i
D
remains constant (thus saturates):
21
2
D n OV
W
i k V
L
The MOSFET is entered the saturation region/mode
v
DS
at which saturation occursis: V
DSsat
= V
OV
= V
GS
− V
t
Note:i
D
in saturationcan be rewritten as the constant
overdrive voltage v
OV
(= v
GS
-V
t
):
21
2
D n OV
W
i k v
L
()
21
2
D n GS t
W
i k v V
L
or
85
2. FET
2.5 MOSFET: Structure and
Operation
Table 1:Regions of Operation
of the Enhancement NMOS
Transistor
For practicing, read by
yourself the Example #5.1 in
the p. 243 of the text-book
of S&S6
th
Ed.
2. FET
2.5 MOSFET: Structure and
Operation
Table 1:Regions of Operation
of the Enhancement NMOS
Transistor
For practicing, read by
yourself the Example #5.1 in
the p. 243 of the text-book
of S&S6
th
Ed.
86
2. FET
2.5 MOSFET: Structure and Operation
The p-Channel MOSFET
Fig.: (a) Physical structure of the PMOS
transistor. Note that all semiconductor regions
are reversed in polarity compares to the NMOS
transistor.
(b) A negative voltage v
SG
of magnitude greater
than |V
tp
|induces a p channel, and a negative
v
DS
causes a current i
D
to flow from SD.
To avoid dealing with negative signs
GS tp
v V
2. FET
2.5 MOSFET: Structure and Operation
The p-Channel MOSFET
Fig.: (a) Physical structure of the PMOS
transistor. Note that all semiconductor regions
are reversed in polarity compares to the NMOS
transistor.
(b) A negative voltage v
SG
of magnitude greater
than |V
tp
|induces a p channel, and a negative
v
DS
causes a current i
D
to flow from SD.
To avoid dealing with negative signs
GS tp
v V
87
2. FET
2.5 MOSFET: Structure and
Operation
The p-Channel MOSFET
Table 2:Regions of Operation
of the Enhancement PMOS
Transistor
2. FET
2.5 MOSFET: Structure and
Operation
The p-Channel MOSFET
Table 2:Regions of Operation
of the Enhancement PMOS
Transistor
88
2. FET
2.5 MOSFET: Structure and Operation
Complementary MOS or CMOS
The fabrication of both NMOS & PMOS transistors on the same chip that creates complementary MOS,
or CMOS,
Fig.: Cross section of a CMOS integrated circuit.
2. FET
2.5 MOSFET: Structure and Operation
Complementary MOS or CMOS
The fabrication of both NMOS & PMOS transistors on the same chip that creates complementary MOS,
or CMOS,
Fig.: Cross section of a CMOS integrated circuit.
89
2. FET
2.6 EMOSFET: I-V Characteristics
Fig.: The i
D
−v
DS
characteristics for an enhancement-type NMOS
transistor
V
OV
= V
GS
− V
t
•i
D
-v
GS
Characteristic:
Fig.: CSNMOS transistor configuration
2. FET
2.6 EMOSFET: I-V Characteristics
Fig.: The i
D
−v
DS
characteristics for an enhancement-type NMOS
transistor
V
OV
= V
GS
− V
t
•i
D
-v
GS
Characteristic:
Fig.: CSNMOS transistor configuration
90
2. FET
2.6 EMOSFET: I-V Characteristics
•i
D
-v
GS
Characteristic:
Since the MOSFET is used to design an
amplifier, it is operated in the saturation
region in saturation, i
D
is constant
determined by v
GS
(or v
OV
). The n-MOSFET
operates as a constant-current source.
21
2
D n OV
W
i k v
L
()
21
2
D n GS tn
W
i k v V
L
or
Fig.: The i
D
–v
GS
characteristic of an NMOS
transistor operating in the saturation region.
The i
D
(v
OV
)characteristic can be obtained by
simply relabeling the horizontal axis, that is,
shifting the origin to the point v
GS
= V
tn
.
2. FET
2.6 EMOSFET: I-V Characteristics
•i
D
-v
GS
Characteristic:
Since the MOSFET is used to design an
amplifier, it is operated in the saturation
region in saturation, i
D
is constant
determined by v
GS
(or v
OV
). The n-MOSFET
operates as a constant-current source.
21
2
D n OV
W
i k v
L
()
21
2
D n GS tn
W
i k v V
L
or
Fig.: The i
D
–v
GS
characteristic of an NMOS
transistor operating in the saturation region.
The i
D
(v
OV
)characteristic can be obtained by
simply relabeling the horizontal axis, that is,
shifting the origin to the point v
GS
= V
tn
.
91
2. FET
2.6 EMOSFET: I-V Characteristics
•i
D
-v
GS
Characteristic:
Fig.: Large-signal, equivalent-circuit model of an n-channel
MOSFET operating in the saturation region
MOSFET in the saturation region as a
voltage-controlled current source is
illustrated by the equivalent-circuit
representation shown in Fig. The circuit
in Fig. is known as a large-signal
equivalent circuit.
For practicing, read by yourself the
Example #5.2 in the p. 269 of the text-
book of S&S6
th
Ed.
2. FET
2.6 EMOSFET: I-V Characteristics
•i
D
-v
GS
Characteristic:
Fig.: Large-signal, equivalent-circuit model of an n-channel
MOSFET operating in the saturation region
MOSFET in the saturation region as a
voltage-controlled current source is
illustrated by the equivalent-circuit
representation shown in Fig. The circuit
in Fig. is known as a large-signal
equivalent circuit.
For practicing, read by yourself the
Example #5.2 in the p. 269 of the text-
book of S&S6
th
Ed.
92
2. FET
2.6 EMOSFET: I-V Characteristics
NMOS i-vcharacteristics i
D
= f(v
GS
, v
DS
)
* Plot for V
t,n
= 1 V and μ
n
C
ox
(W/L) = 2.0 mA/V
2
2. FET
2.6 EMOSFET: I-V Characteristics
NMOS i-vcharacteristics i
D
= f(v
GS
, v
DS
)
* Plot for V
t,n
= 1 V and μ
n
C
ox
(W/L) = 2.0 mA/V
2
Example14:
93
1
??????
??
=??????
?
??????
??
??????
?
=
1
??????
??
??????
??
??????
?
= 2 (mA/V
2
)
v
DS
= 0.5 = V
OV
so NMOSFET is in saturation region. Therefore:
??????
?
=
1
2
??????
?
??????
??
6
I
D
= 25 mA
An n-channel MOSFET operating with V
OV
= 0.5 V exhibits a linear resistance
r
DS
= 1 kWwhen v
DS
is very small. What is the value of the device
transconductance parameter k
n
? What is the value of the current I
D
obtained
when v
DS
is increased to 0.5 V? and to 1 V?
2. FET
2.6 EMOSFET: I-V Characteristics
Solution:
93
1
??????
??
=??????
?
??????
??
??????
?
=
1
??????
??
??????
??
??????
?
= 2 (mA/V
2
)
v
DS
= 0.5 = V
OV
so NMOSFET is in saturation region. Therefore:
??????
?
=
1
2
??????
?
??????
??
6
I
D
= 25 mA
An n-channel MOSFET operating with V
OV
= 0.5 V exhibits a linear resistance
r
DS
= 1 kWwhen v
DS
is very small. What is the value of the device
transconductance parameter k
n
? What is the value of the current I
D
obtained
when v
DS
is increased to 0.5 V? and to 1 V?
2. FET
2.6 EMOSFET: I-V Characteristics
Solution:
94
2. FET
2.6 EMOSFET: I-V Characteristics
Finite Output Resistance in Saturation
In practice, v
DS
beyond v
OV
does
affect the channel somewhat.
Specifically, as v
DS
, the channel
pinch-off point is moved slightly
away from the D, toward the S.
Note: with depletion-layer widening, the
channel length is in effect reduced, from
L to L − L, a phenomenon known as
channel-length modulation.
Fig.: Increasing v
DS
beyond v
DSsat
causes the
channel pinch-off point to move slightly away from
the drain, thus reducing the effective channel length
(by L).
2. FET
2.6 EMOSFET: I-V Characteristics
Finite Output Resistance in Saturation
In practice, v
DS
beyond v
OV
does
affect the channel somewhat.
Specifically, as v
DS
, the channel
pinch-off point is moved slightly
away from the D, toward the S.
Note: with depletion-layer widening, the
channel length is in effect reduced, from
L to L − L, a phenomenon known as
channel-length modulation.
Fig.: Increasing v
DS
beyond v
DSsat
causes the
channel pinch-off point to move slightly away from
the drain, thus reducing the effective channel length
(by L).
2. FET
2.6 EMOSFET: I-V Characteristics
Finite Output Resistance in Saturation
Due to this effect, the saturation drain current i
D
is:
()()
21 W
1
2
D n GS tn DS
i k v V v
L
λ is a device parameter (V
−1
)
Fig.: Effect of v
DS
on i
D
in the saturation
region. The n-MOSFET parameter V
A
is
proportional to the channel length L.
1
A
V
Straight-line i
D
–v
DS
characteristics are extrapolated, they
intercept the v
DS
axis at the point, v
DS
= −V
A
,
(Early voltage)
For a given v
GS
, a change v
DS
change i
D
the output resistance r
o
of the current source
representing i
D
in saturation is no longer infinite.
1
.
GS
D
o
DSv const
i
r
v
2.6 EMOSFET: I-V Characteristics
Finite Output Resistance in Saturation
Due to this effect, the saturation drain current i
D
is:
()()
21 W
1
2
D n GS tn DS
i k v V v
L
λ is a device parameter (V
−1
)
Fig.: Effect of v
DS
on i
D
in the saturation
region. The n-MOSFET parameter V
A
is
proportional to the channel length L.
1
A
V
Straight-line i
D
–v
DS
characteristics are extrapolated, they
intercept the v
DS
axis at the point, v
DS
= −V
A
,
(Early voltage)
For a given v
GS
, a change v
DS
change i
D
the output resistance r
o
of the current source
representing i
D
in saturation is no longer infinite.
1
.
GS
D
o
DSv const
i
r
v
Fig. shows the large-signal,
equivalent-circuit model of the n-
channelMOSFET incorporating r
o
96
2. FET
2.6 EMOSFET: I-V Characteristics
Finite Output Resistance in Saturation
()
1
2 1
2
n A
o GS tn
D D
k VW
r V V
L I I
Thus the output resistance:
where ??????
?
?
is the drain current without channel-length modulation
()
21
2
D n GS tn
W
I k V V
L
G
D
S
G
D
S
BG
D
S
BG
D
S
equivalent-circuit model of the n-
channelMOSFET incorporating r
o
96
2. FET
2.6 EMOSFET: I-V Characteristics
Finite Output Resistance in Saturation
()
1
2 1
2
n A
o GS tn
D D
k VW
r V V
L I I
Thus the output resistance:
where ??????
?
?
is the drain current without channel-length modulation
()
21
2
D n GS tn
W
I k V V
L
G
D
S
G
D
S
BG
D
S
BG
D
S
97
2. FET
2.6 EMOSFET: I-V Characteristics
Characteristics of the p-ChannelMOSFET
PMOS devices also suffer from the channel-
length modulation effect. Thus PMOSin the
saturation-region expression for i
D
as follows
()
()
()
2 21 W 1 W
1 1
2 2
SD
D p SG tp SD p SG tp
A
v
i k v V v k v V
L L V
Fig.: the large-signal,
equivalent-circuit model of the
p-channel MOSFET
incorporating r
o
Fig.:The circuit symbol for the p-channel
enhancement-type MOSFET
Fig.:The p-MOSFET with voltages applied
and the directions of current flow indicated.
GG
D
S
BG
D
S
BG
D
S
D
S
2. FET
2.6 EMOSFET: I-V Characteristics
Characteristics of the p-ChannelMOSFET
PMOS devices also suffer from the channel-
length modulation effect. Thus PMOSin the
saturation-region expression for i
D
as follows
()
()
()
2 21 W 1 W
1 1
2 2
SD
D p SG tp SD p SG tp
A
v
i k v V v k v V
L L V
Fig.: the large-signal,
equivalent-circuit model of the
p-channel MOSFET
incorporating r
o
Fig.:The circuit symbol for the p-channel
enhancement-type MOSFET
Fig.:The p-MOSFET with voltages applied
and the directions of current flow indicated.
GG
D
S
BG
D
S
BG
D
S
D
S
98
2. FET
2.7 Frequency Response
The high frequency performance of MOS circuits is largely determined by
circuit capacitances:
Oxide capacitance inherent in the device response
Internal junction capacitances
External parasitic capacitances
AC equivalent circuit with capacitance:
r
o
+ g
m
V
gs
S
G
V
gs
_
C
db
C
gs
C
gd
C
sb
g
mb
V
bs
+
V
bs
_
D
B
Fig. (a) High-frequency, equivalent-circuit model for
the MOSFET
2. FET
2.7 Frequency Response
The high frequency performance of MOS circuits is largely determined by
circuit capacitances:
Oxide capacitance inherent in the device response
Internal junction capacitances
External parasitic capacitances
AC equivalent circuit with capacitance:
r
o
+ g
m
V
gs
S
G
V
gs
_
C
db
C
gs
C
gd
C
sb
g
mb
V
bs
+
V
bs
_
D
B
Fig. (a) High-frequency, equivalent-circuit model for
the MOSFET
99
2. FET –Key Points
NMOS PMOS, swap polarities in the characteristics
Threshold voltage V
tn
, below which the device is off (for NMOS case)
Acts as a voltage controlled current source or resistor:
1. Saturated region, i.e. V
DS
> V
GS
-V
t
()
21
2
D n GS nt
W
i k v V
L
()
21
2
D n GS t DS DS
W
i k v V v v
L
n n ox
k Cm
( )( )( )
/ /
n n n ox
k k W L C W Lm
W is the channel width
L is the channel length
μ
n
is the electron mobility
C
ox
is the oxide capacitance /m
2
In modern processes, μ
n
C
ox
4μ
p
C
ox
→ NMOS are better devices
2. Triode region, i.e. V
DS
< V
GS
-V
t
2. FET –Key Points
NMOS PMOS, swap polarities in the characteristics
Threshold voltage V
tn
, below which the device is off (for NMOS case)
Acts as a voltage controlled current source or resistor:
1. Saturated region, i.e. V
DS
> V
GS
-V
t
()
21
2
D n GS nt
W
i k v V
L
()
21
2
D n GS t DS DS
W
i k v V v v
L
n n ox
k Cm
( )( )( )
/ /
n n n ox
k k W L C W Lm
W is the channel width
L is the channel length
μ
n
is the electron mobility
C
ox
is the oxide capacitance /m
2
In modern processes, μ
n
C
ox
4μ
p
C
ox
→ NMOS are better devices
2. Triode region, i.e. V
DS
< V
GS
-V
t
100
2. FET
MOSFET –Key Points
() ()
1 1 1
( / ) ( / )( )
DS
DS n ox OV n ox GS t
r
g C W L v C W L v Vm m
3. Linear operation in the deep triode region(V
DS
~ small & V
GS
>V
tn
):
Small signal, low frequency, (AC) equivalent circuit:
GS GS
d d
m
gs gs
v V
i i
g
v v
The MOSFET is biased at
a DC operating point.
But, in the saturation region, g
m
will be calculated by:
()
12 2
m n D n D
W
g k I k I
L
1
1
1
AD
o
DS D D
VI
r
V I I
()
21
2
D n ox GS tn
W
I C V V
L
m
() ()
2
m n ox GS tn
W
g C V V
L
m
2. FET
MOSFET –Key Points
() ()
1 1 1
( / ) ( / )( )
DS
DS n ox OV n ox GS t
r
g C W L v C W L v Vm m
3. Linear operation in the deep triode region(V
DS
~ small & V
GS
>V
tn
):
Small signal, low frequency, (AC) equivalent circuit:
GS GS
d d
m
gs gs
v V
i i
g
v v
The MOSFET is biased at
a DC operating point.
But, in the saturation region, g
m
will be calculated by:
()
12 2
m n D n D
W
g k I k I
L
1
1
1
AD
o
DS D D
VI
r
V I I
()
21
2
D n ox GS tn
W
I C V V
L
m
() ()
2
m n ox GS tn
W
g C V V
L
m
101
2. FET: Handling Precautions
All MOS devices are subject to damage from electrostatic
discharge (ESD). Because the gate of a MOSFET is insulated from
the channel, the input resistance is extremely high (ideally infinite).
Excess static charge can be accumulated because the input
capacitance combines with the very high input resistance and can
result in damage to the device. To avoid damage from ESD, certain
precautions should be taken when handling MOSFETs:
1)Carefully remove MOSFET devices from their packaging.
They are shipped in conductive foam or special foil
conductive bags. Usually they are shipped with a wire ring
around the leads, which is removed just prior to installing the
MOSFET in a circuit.
2)All instruments and metal benches used in assembly or test should be connected to earth ground.
3)The assembler’s or handler’s wrist should be connected to a commercial grounding strap, which has a high-
value series resistor for safety. The resistor prevents accidental contact with voltage from becoming lethal.
4)Never remove a MOS device from the circuit while the power is on.
5)Do not apply signals to a MOS device while the dc power supply is off.
2. FET: Handling Precautions
All MOS devices are subject to damage from electrostatic
discharge (ESD). Because the gate of a MOSFET is insulated from
the channel, the input resistance is extremely high (ideally infinite).
Excess static charge can be accumulated because the input
capacitance combines with the very high input resistance and can
result in damage to the device. To avoid damage from ESD, certain
precautions should be taken when handling MOSFETs:
1)Carefully remove MOSFET devices from their packaging.
They are shipped in conductive foam or special foil
conductive bags. Usually they are shipped with a wire ring
around the leads, which is removed just prior to installing the
MOSFET in a circuit.
2)All instruments and metal benches used in assembly or test should be connected to earth ground.
3)The assembler’s or handler’s wrist should be connected to a commercial grounding strap, which has a high-
value series resistor for safety. The resistor prevents accidental contact with voltage from becoming lethal.
4)Never remove a MOS device from the circuit while the power is on.
5)Do not apply signals to a MOS device while the dc power supply is off.
102
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Overdrive voltage: V
OV
= V
GS
–V
tn
for NMOS;and |V
OV
| = |V
SG
− V
tp
| for PMOS.
To Solve MOS Circuit: (with Large Signal Model)
1.Hypothesis: assume one of the modes of operation for the MOSFET
2.Solve: Use the equations for the selected mode to solve the circuit
3.Check: at the end perform the check for the selected mode to verify the hypothesis
4.Redo: if the hypothesis check fails, try another hypothesis and start over.
Controlled part:
Circuit connected to
GS sets v
GS
(or V
OV
)
Controlled part:
i
D
& v
DS
are set by
transistor state (&
outside circuit)
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Overdrive voltage: V
OV
= V
GS
–V
tn
for NMOS;and |V
OV
| = |V
SG
− V
tp
| for PMOS.
To Solve MOS Circuit: (with Large Signal Model)
1.Hypothesis: assume one of the modes of operation for the MOSFET
2.Solve: Use the equations for the selected mode to solve the circuit
3.Check: at the end perform the check for the selected mode to verify the hypothesis
4.Redo: if the hypothesis check fails, try another hypothesis and start over.
Controlled part:
Circuit connected to
GS sets v
GS
(or V
OV
)
Controlled part:
i
D
& v
DS
are set by
transistor state (&
outside circuit)
103
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example15:
Design the circuit of Fig.: Obtain the values of R
D
and
R
S
so that the transistor operates at I
D
= 0.4 mA and
V
D
= +0.5 V. The NMOS transistor has V
t
= 0.7 V,
μ
n
C
ox
= 100 μA/V
2
, L = 1 μm, and W = 32 μm.
Assume that λ = 0.
V
DD
=+2.5V
V
D
R
S
I
D
V
SS
= -2.5V
R
D
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example15:
Design the circuit of Fig.: Obtain the values of R
D
and
R
S
so that the transistor operates at I
D
= 0.4 mA and
V
D
= +0.5 V. The NMOS transistor has V
t
= 0.7 V,
μ
n
C
ox
= 100 μA/V
2
, L = 1 μm, and W = 32 μm.
Assume that λ = 0.
V
DD
=+2.5V
V
D
R
S
I
D
V
SS
= -2.5V
R
D
104
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example15:Sol.
2.5 0.5
5 ( )
0.4
DD D
D
D
V V
R k
I
W
V
D
= 0.5 V > V
G
= 0 the NMOS transistor is operating
in the saturation region, So we use the saturation-region
expression of i
D
to determine the required value of V
OV
,
2 21 1 32
400 100 0.5
2 2 1
0.7 0.5 1.2 ( )
D n ox OV OV OV
GS t OV
W
I C V V V V
L
V V V V
m
1.2 ( 2.5)
3.25 ( )
0.4
S SS
S
D
V V
R k
I
W
V
DD
=+2.5V
V
D
R
S
I
D
V
SS
= -2.5V
R
D
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example15:Sol.
2.5 0.5
5 ( )
0.4
DD D
D
D
V V
R k
I
W
V
D
= 0.5 V > V
G
= 0 the NMOS transistor is operating
in the saturation region, So we use the saturation-region
expression of i
D
to determine the required value of V
OV
,
2 21 1 32
400 100 0.5
2 2 1
0.7 0.5 1.2 ( )
D n ox OV OV OV
GS t OV
W
I C V V V V
L
V V V V
m
1.2 ( 2.5)
3.25 ( )
0.4
S SS
S
D
V V
R k
I
W
V
DD
=+2.5V
V
D
R
S
I
D
V
SS
= -2.5V
R
D
105
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example16:
Find the i−v relationship of the resulting two-terminal device in
terms of the MOSFET parameters ??????
?
= ??????
?
?
(W/L) and V
tn
. Neglect
channel-length modulation (i.e., λ = 0).
Sol.:
Since v
D
= v
G
NMOS isin the saturation mode:
()
21
2
D n GS tn
W
i k v V
L
Now, i= i
D
and v = v
GS
,
() ()
2 21 1
2 2
n tn n tn
W
i k v V k v V
L
V
D
I
D
R
D
V
DD
= +3V
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example16:
Find the i−v relationship of the resulting two-terminal device in
terms of the MOSFET parameters ??????
?
= ??????
?
?
(W/L) and V
tn
. Neglect
channel-length modulation (i.e., λ = 0).
Sol.:
Since v
D
= v
G
NMOS isin the saturation mode:
()
21
2
D n GS tn
W
i k v V
L
Now, i= i
D
and v = v
GS
,
() ()
2 21 1
2 2
n tn n tn
W
i k v V k v V
L
V
D
I
D
R
D
V
DD
= +3V
106
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example17:
Design the circuit in Fig. to have a V
D
= 0.1 V. Calculate the
effective resistance r
DS
between D & S leads at this operating
point? Let V
tn
= 1 V and ??????
?
?
(W/L)=1mA/ V
2
.
Sol.:
Since the V
D
= 0.1 V < V
G
= 5 V and V
tn
= 1 V, MOSFET is operating
in the triode region. Thus the current I
D
is
()
21 1
1 (5 1) 0.1 0.01 0.395( )
2 2
D n GS tn DS DS
W
i k v V v v mA
L
5 0.1
12.4 ( )
0.395
DD D
D
D
V V
R k
I
W
0.1
253( )
0.395
DS
DS
D
V
r
I
W
or
1 1
250( )
1 (5 1)
DS
n OV
r
kV
W
V
D
=+0.1V
I
D
R
D
V
DD
= +5V
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example17:
Design the circuit in Fig. to have a V
D
= 0.1 V. Calculate the
effective resistance r
DS
between D & S leads at this operating
point? Let V
tn
= 1 V and ??????
?
?
(W/L)=1mA/ V
2
.
Sol.:
Since the V
D
= 0.1 V < V
G
= 5 V and V
tn
= 1 V, MOSFET is operating
in the triode region. Thus the current I
D
is
()
21 1
1 (5 1) 0.1 0.01 0.395( )
2 2
D n GS tn DS DS
W
i k v V v v mA
L
5 0.1
12.4 ( )
0.395
DD D
D
D
V V
R k
I
W
0.1
253( )
0.395
DS
DS
D
V
r
I
W
or
1 1
250( )
1 (5 1)
DS
n OV
r
kV
W
V
D
=+0.1V
I
D
R
D
V
DD
= +5V
107
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example18:
Analyze the circuit in Fig. (a) to find the voltages at all nodes and
the currents through all branches. Let V
tn
= 1 V and
??????
?
?
(W/L)=1 mA/V
2
. Neglect the channel-length modulation effect.
2
2 1
10
10 5( )
10 10
G
G DD
G G
R
V V V
R R
NMOS is ON
AssumeNMOS is in saturation mode, solve the problemNOT valid!
So NMOS is in triode mode:
V
GS
= 5 − 6I
D
()
2
2 21 1
1 (5 6 1) 18 25 8 0
2 2
D n GS tn D D D
W
I k V V I I I
L
I
D
: 0.89 mA & 0.5 mA
I
D
= 0.5 mA; V
S
= 0.5 ×6 = +3 (V); V
GS
= 5 − 3 = 2 (V); V
D
= 10 − 6 ×0.5 = +7 (V )
Sol.:
10MW
R
G2
R
D
V
D
R
G1
R
S
V
G
V
S
V
DD
= +10V
10MW
6kW
6kW
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example18:
Analyze the circuit in Fig. (a) to find the voltages at all nodes and
the currents through all branches. Let V
tn
= 1 V and
??????
?
?
(W/L)=1 mA/V
2
. Neglect the channel-length modulation effect.
2
2 1
10
10 5( )
10 10
G
G DD
G G
R
V V V
R R
NMOS is ON
AssumeNMOS is in saturation mode, solve the problemNOT valid!
So NMOS is in triode mode:
V
GS
= 5 − 6I
D
()
2
2 21 1
1 (5 6 1) 18 25 8 0
2 2
D n GS tn D D D
W
I k V V I I I
L
I
D
: 0.89 mA & 0.5 mA
I
D
= 0.5 mA; V
S
= 0.5 ×6 = +3 (V); V
GS
= 5 − 3 = 2 (V); V
D
= 10 − 6 ×0.5 = +7 (V )
Sol.:
10MW
R
G2
R
D
V
D
R
G1
R
S
V
G
V
S
V
DD
= +10V
10MW
6kW
6kW
108
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example19:
Design the circuit of Fig. so that the PMOS operates in saturation
with I
D
= 0.5 mA and V
D
= +3 V. Let the PMOS have V
tp
= −1 V
and ??????
?
?
(W/L)=1 mA/V
2
. Assume λ = 0. What is the largest value
that R
D
can have while maintaining saturation-region operation?
Sol.:
2 21 1
0.5 1 1
2 2
1 1 2 ( )
D p OV OV OV
GS tp OV
W
I k v v V V
L
V V V V
Since the V
S
= +5 V, V
G
= +3 V A possible selection is R
G1
= 2 MWand R
G2
= 3 MW.
R
D
= V
D
/ I
D
= 3/0.5= 6(kW)
Saturation-mode will be maintained up to the point that V
D
exceeds V
G
by V
tp
:
V
dmax
= 3 + 1 = 4 (V)
Thus R
D
= 4/0.5 = 8 (kW)
I
D
=+0.5mA
R
G2
V
D
=+3V
R
G1
R
D
V
G
V
DD
= +5V
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example19:
Design the circuit of Fig. so that the PMOS operates in saturation
with I
D
= 0.5 mA and V
D
= +3 V. Let the PMOS have V
tp
= −1 V
and ??????
?
?
(W/L)=1 mA/V
2
. Assume λ = 0. What is the largest value
that R
D
can have while maintaining saturation-region operation?
Sol.:
2 21 1
0.5 1 1
2 2
1 1 2 ( )
D p OV OV OV
GS tp OV
W
I k v v V V
L
V V V V
Since the V
S
= +5 V, V
G
= +3 V A possible selection is R
G1
= 2 MWand R
G2
= 3 MW.
R
D
= V
D
/ I
D
= 3/0.5= 6(kW)
Saturation-mode will be maintained up to the point that V
D
exceeds V
G
by V
tp
:
V
dmax
= 3 + 1 = 4 (V)
Thus R
D
= 4/0.5 = 8 (kW)
I
D
=+0.5mA
R
G2
V
D
=+3V
R
G1
R
D
V
G
V
DD
= +5V
109
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example20:
The NMOS and PMOS transistors in the circuit of Fig. (a) are matched,
with ??????
?
?
(W/L)
n
= ??????
?
?
(W/L)
p
= 1mA/V
2
and V
tn
= −V
tp
= 1 V.
Assuming λ = 0 for both devices, find the drain currents i
DN
and i
DP
, as
well as the voltage v
O
, for v
I
= 0 V, +2.5 V, and −2.5 V.
Sol.:
v
I
= 0 V as shown in Fig. (b) Q
N
& Q
P
are perfectly matched and having the same
values of V
GS
= 2.5 V circuit is symmetrical,
(v
O
= 0 V). both Q
N
& Q
P
are operating with
|V
DG
| = 0 in saturation.
21
1 (2.5 1) 1.125( )
2
DP DN
I I mA
-2.5V
(a)
I
DP
M
P
10kW
v
I
M
N
+2.5V
v
O
I
DN
-2.5V
(b)
I
DP
M
P
10kW
0 V
M
N
+2.5V
v
O
I
DN
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Example20:
The NMOS and PMOS transistors in the circuit of Fig. (a) are matched,
with ??????
?
?
(W/L)
n
= ??????
?
?
(W/L)
p
= 1mA/V
2
and V
tn
= −V
tp
= 1 V.
Assuming λ = 0 for both devices, find the drain currents i
DN
and i
DP
, as
well as the voltage v
O
, for v
I
= 0 V, +2.5 V, and −2.5 V.
Sol.:
v
I
= 0 V as shown in Fig. (b) Q
N
& Q
P
are perfectly matched and having the same
values of V
GS
= 2.5 V circuit is symmetrical,
(v
O
= 0 V). both Q
N
& Q
P
are operating with
|V
DG
| = 0 in saturation.
21
1 (2.5 1) 1.125( )
2
DP DN
I I mA
-2.5V
(a)
I
DP
M
P
10kW
v
I
M
N
+2.5V
v
O
I
DN
-2.5V
(b)
I
DP
M
P
10kW
0 V
M
N
+2.5V
v
O
I
DN
110
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Sol. 20:
v
I
= +2.5 V
Q
P
is OFF Fig. (c)
v
O
will be negative, and thus v
GD
will be greater than V
tn
, causing Q
N
to
operate in the triode region. For simplicity we shall assume that v
DS
is
small and thus
( / ) ( ) 1[2.5 ( 2.5) 1][ ( 2.5)]
DN n n GS tn DS O
I k W L V V V v
0
( )
10
O
DN
v
I mA
k
W
I
DN
= 0.244 mA and v
O
= −2.44 V
Here,V
DS
= −2.44 − (−2.5)= 0.06 (V), which is small as assumed
Case of v
I
= +2.5 VFig. (d)
Q
N
will be off. Thus I
DN
= 0, Q
P
will be operating in the triode region
with I
DP
= 0.244 mA and v
O
= +2.44 V.
-2.5V
(c)
10kW
M
N
v
O
I
DN
+2.5V
-2.5V
(d)
I
DP
M
P
10kW
+2.5V
v
O
I
DP
2. FET
2.7 EMOSFET: MOSFET Circuits at DC
Sol. 20:
v
I
= +2.5 V
Q
P
is OFF Fig. (c)
v
O
will be negative, and thus v
GD
will be greater than V
tn
, causing Q
N
to
operate in the triode region. For simplicity we shall assume that v
DS
is
small and thus
( / ) ( ) 1[2.5 ( 2.5) 1][ ( 2.5)]
DN n n GS tn DS O
I k W L V V V v
0
( )
10
O
DN
v
I mA
k
W
I
DN
= 0.244 mA and v
O
= −2.44 V
Here,V
DS
= −2.44 − (−2.5)= 0.06 (V), which is small as assumed
Case of v
I
= +2.5 VFig. (d)
Q
N
will be off. Thus I
DN
= 0, Q
P
will be operating in the triode region
with I
DP
= 0.244 mA and v
O
= +2.44 V.
-2.5V
(c)
10kW
M
N
v
O
I
DN
+2.5V
-2.5V
(d)
I
DP
M
P
10kW
+2.5V
v
O
I
DP
111
2. FET
2.8 Applying the MOSFET in Amplifier Design
Obtaining a Voltage Amplifier
The simple amplifier circuit shown in Fig.
v
GS
: input voltage, R
D
(load resistance) converts i
D
to a voltage (i
D
R
D
).
KVL: v
o
= v
DS
= V
DD
− R
D
i
D
(1)
Voltage Transfer Characteristic (VTC): represented by
a plot of output voltage (v
DS
) versus input voltage (v
GS
).
The segment of greatest slope (potentially the largest
amplifier gain) is that labeled AB, corresponds to operation in
the saturation region. Hence the current in this region
2
) (
1
2
2)(
D n GS t
i k v V
2
)
1
(1)&(2) ( )
2
(3
DS DD n D GS t
v V k R v V
Equ. (3) is a nonlinear. To get linear (or almost-linear)
amplification, we can bias the MOSFET…
input
output
2. FET
2.8 Applying the MOSFET in Amplifier Design
Obtaining a Voltage Amplifier
The simple amplifier circuit shown in Fig.
v
GS
: input voltage, R
D
(load resistance) converts i
D
to a voltage (i
D
R
D
).
KVL: v
o
= v
DS
= V
DD
− R
D
i
D
(1)
Voltage Transfer Characteristic (VTC): represented by
a plot of output voltage (v
DS
) versus input voltage (v
GS
).
The segment of greatest slope (potentially the largest
amplifier gain) is that labeled AB, corresponds to operation in
the saturation region. Hence the current in this region
2
) (
1
2
2)(
D n GS t
i k v V
2
)
1
(1)&(2) ( )
2
(3
DS DD n D GS t
v V k R v V
Equ. (3) is a nonlinear. To get linear (or almost-linear)
amplification, we can bias the MOSFET…
input
output
112
2. FET
2.8 Applying the MOSFET in Amplifier Design
Obtaining a Voltage Amplifier
4) To the right of B, v
DS
< V
OV
= v
GS
− V
t
and
NMOS enters triode.
Point Bis called the “Edge of Saturation”
3) As v
GS
increases:
V
OV
= v
GS
− V
t
and i
D
become larger;
v
DS
= V
DD
− R
D
i
D
becomes smaller.
@ B, v
DS
= V
OV
1) For v
GS
< V
t
, NMOS is in
cutoff: i
D
= 0 &
v
DS
= V
DD
− R
D
i
D
= V
DD
2) Just to the right of point A:
V
OV
= v
GS
− V
t
is small, so i
D
is
small.
v
DS
= V
DD
− R
D
i
D
is close to V
DD
Thus, v
DS
> V
OV
and NMOS is in
saturation.
2. FET
2.8 Applying the MOSFET in Amplifier Design
Obtaining a Voltage Amplifier
4) To the right of B, v
DS
< V
OV
= v
GS
− V
t
and
NMOS enters triode.
Point Bis called the “Edge of Saturation”
3) As v
GS
increases:
V
OV
= v
GS
− V
t
and i
D
become larger;
v
DS
= V
DD
− R
D
i
D
becomes smaller.
@ B, v
DS
= V
OV
1) For v
GS
< V
t
, NMOS is in
cutoff: i
D
= 0 &
v
DS
= V
DD
− R
D
i
D
= V
DD
2) Just to the right of point A:
V
OV
= v
GS
− V
t
is small, so i
D
is
small.
v
DS
= V
DD
− R
D
i
D
is close to V
DD
Thus, v
DS
> V
OV
and NMOS is in
saturation.
113
2. FET
2.8 Applying the MOSFET in Amplifier Design
Biasing the MOSFET to Obtain Linear Amplification
Approximatethe transfer function
with a tangent line @ point Q. Slop
@ Q = voltage gain (A
v
)
①A DC voltage V
GS
is selected to obtain operation at a point Q on the segment AB of the VTC.
②ac signal
v
gs
(t), is added in
series with V
GS
①
②
v
GS
(t) = V
GS
+ v
gs
(t)
2. FET
2.8 Applying the MOSFET in Amplifier Design
Biasing the MOSFET to Obtain Linear Amplification
Approximatethe transfer function
with a tangent line @ point Q. Slop
@ Q = voltage gain (A
v
)
①A DC voltage V
GS
is selected to obtain operation at a point Q on the segment AB of the VTC.
②ac signal
v
gs
(t), is added in
series with V
GS
①
②
v
GS
(t) = V
GS
+ v
gs
(t)
114
2. FET
2.8 Applying the MOSFET in Amplifier Design
Biasing the MOSFET to Obtain Linear Amplification
Response (v
o
= v
DS
) is also
made of a constant part (V
DS
)
and a signal response part
(v
ds
).
Constant part of the response,
V
DS
, is ONLY related to V
GS
.
i.e., if v
gs
= 0, v
ds
= 0
The shape of the time varying
portion of the response (v
ds
) is
similar to v
gs
. i.e., v
ds
is
proportionalto the input
signal, v
gs
2. FET
2.8 Applying the MOSFET in Amplifier Design
Biasing the MOSFET to Obtain Linear Amplification
Response (v
o
= v
DS
) is also
made of a constant part (V
DS
)
and a signal response part
(v
ds
).
Constant part of the response,
V
DS
, is ONLY related to V
GS
.
i.e., if v
gs
= 0, v
ds
= 0
The shape of the time varying
portion of the response (v
ds
) is
similar to v
gs
. i.e., v
ds
is
proportionalto the input
signal, v
gs
115
2. FET
2.8 Applying the MOSFET in Amplifier Design
Biasing the MOSFET to Obtain Linear Amplification
v
GS
= V
GS
+ v
gs
v
DS
V
DS
+ v
ds
i
D
I
D
+ i
d
Constant:
Bias
Signal &
response
Non-linear
relationship among
these parameters
Approximately
Linear
relationship among
these parameters
Although the overall response is non-linear, the
transfer function (VTC) for the signal is linear!
Note:
Responseof the circuit (and its elements) to the
signal is different than its response to the Bias
(or to Bias + signal):
Signaliv characteristics of elements are
different, i.e. relationships among v
gs
, v
ds
, i
d
is different from relationships among v
GS
,
v
DS
, i
D
.
Signal transfer function of the circuit is
different from the transfer function for total
input (Bias + signal).
2. FET
2.8 Applying the MOSFET in Amplifier Design
Biasing the MOSFET to Obtain Linear Amplification
v
GS
= V
GS
+ v
gs
v
DS
V
DS
+ v
ds
i
D
I
D
+ i
d
Constant:
Bias
Signal &
response
Non-linear
relationship among
these parameters
Approximately
Linear
relationship among
these parameters
Although the overall response is non-linear, the
transfer function (VTC) for the signal is linear!
Note:
Responseof the circuit (and its elements) to the
signal is different than its response to the Bias
(or to Bias + signal):
Signaliv characteristics of elements are
different, i.e. relationships among v
gs
, v
ds
, i
d
is different from relationships among v
GS
,
v
DS
, i
D
.
Signal transfer function of the circuit is
different from the transfer function for total
input (Bias + signal).
116
2. FET
2.8 Applying the MOSFET in Amplifier Design
The Small-Signal Voltage Gain
Voltage gain of the amplifier
( )
GS GS
DS
v v n GS t D n OV D
GSv V
dv
A A k V V R kV R
dv
V
OV
The gain A
v
is negative the amplifier is inverting; means that: 180phase shift
between the input and the output.
The gain is proportional to the load resistance R
D
, to the transistor transconductance k
n
parameter, and to the overdrive voltage V
OV
.
Case the DC current @ bias point is
21
2
D n OV
I kV max
/2 /2
D D DD
v v
OV OV
I R V
A A
V V
Read yourself the example 5.9 @ p. 272 of S & S text-book 6
th
Ed.
2. FET
2.8 Applying the MOSFET in Amplifier Design
The Small-Signal Voltage Gain
Voltage gain of the amplifier
( )
GS GS
DS
v v n GS t D n OV D
GSv V
dv
A A k V V R kV R
dv
V
OV
The gain A
v
is negative the amplifier is inverting; means that: 180phase shift
between the input and the output.
The gain is proportional to the load resistance R
D
, to the transistor transconductance k
n
parameter, and to the overdrive voltage V
OV
.
Case the DC current @ bias point is
21
2
D n OV
I kV max
/2 /2
D D DD
v v
OV OV
I R V
A A
V V
Read yourself the example 5.9 @ p. 272 of S & S text-book 6
th
Ed.
117
2. FET
2.8 Applying the MOSFET in Amplifier Design
Determining the VTC by Graphical Analysis
1
DD
D DS
D D
V
i v
R R
The load line:
2. FET
2.8 Applying the MOSFET in Amplifier Design
Determining the VTC by Graphical Analysis
1
DD
D DS
D D
V
i v
R R
The load line:
118
2. FET
2.9 Small-Signal Operation and Models
The DC Bias Point
2 21 1
( )
2 2
D n GS t n OV
i k v V kV
Set the signalv
gs
= 0and assumeno channel-length modulation; thus
and V
DS
= V
DD
–R
D
I
D
; must have V
DS
> V
OV
to let NMOS in saturation-regionoperation
v
GS
, v
DS
, i
D
(v
GS
= V
GS
+ v
gs
,…)
V
GS
, V
DS
, I
D
R
D
: V
R
, I
R
2. FET
2.9 Small-Signal Operation and Models
The DC Bias Point
2 21 1
( )
2 2
D n GS t n OV
i k v V kV
Set the signalv
gs
= 0and assumeno channel-length modulation; thus
and V
DS
= V
DD
–R
D
I
D
; must have V
DS
> V
OV
to let NMOS in saturation-regionoperation
v
GS
, v
DS
, i
D
(v
GS
= V
GS
+ v
gs
,…)
V
GS
, V
DS
, I
D
R
D
: V
R
, I
R
119
2. FET
2.9 Small-Signal Operation and Models
The Signal Current in the Drain Terminal
Now with the input signal v
gs
applied. The total instantaneous GS
voltage will be v
GS
= V
GS
+ v
gs
2 2 21 1 1
(V ) (V ) (V V)
2 2 2
D n GS gs t n GS t n GS t gs n gs
i k v V k V k v k v
v
gs
should be kept small
21
( ) 2
2
n gs n GS t gs gs OV
k v k V V v v V
i
D
I
D
+ i
d
≡ i
d
( )
d
m n GS t n OV
gs
i
g k V V kV
v
Let is the MOSFET transconductance
2 21 1
Case of MOSFET work @ ( )
2 2
D n GS t n OV
I k V V kV
2
D
OV
n
I
V
k
)2 3
2 2
(
D D
m n D
GS t OV
I I
g k I
V V V
3 equations to obtain g
m
2. FET
2.9 Small-Signal Operation and Models
The Signal Current in the Drain Terminal
Now with the input signal v
gs
applied. The total instantaneous GS
voltage will be v
GS
= V
GS
+ v
gs
2 2 21 1 1
(V ) (V ) (V V)
2 2 2
D n GS gs t n GS t n GS t gs n gs
i k v V k V k v k v
v
gs
should be kept small
21
( ) 2
2
n gs n GS t gs gs OV
k v k V V v v V
i
D
I
D
+ i
d
≡ i
d
( )
d
m n GS t n OV
gs
i
g k V V kV
v
Let is the MOSFET transconductance
2 21 1
Case of MOSFET work @ ( )
2 2
D n GS t n OV
I k V V kV
2
D
OV
n
I
V
k
)2 3
2 2
(
D D
m n D
GS t OV
I I
g k I
V V V
3 equations to obtain g
m
120
2. FET
2.9 Small-Signal Operation and Models
The Signal Current in the Drain Terminal
Fig.shows a graphical interpretation of the
small-signal operation of the MOSFET amplifier.
Notethat g
m
is equal to the slope of the i
D
vs. v
GS
characteristicat the bias point
()()
2
1
GS GS
D D
m n GS TN DS
GS GS tnv V
i I
g k V V V
v V V
()()
21 W
1
2
D n GS tn DS
i k v V v
L
2. FET
2.9 Small-Signal Operation and Models
The Signal Current in the Drain Terminal
Fig.shows a graphical interpretation of the
small-signal operation of the MOSFET amplifier.
Notethat g
m
is equal to the slope of the i
D
vs. v
GS
characteristicat the bias point
()()
2
1
GS GS
D D
m n GS TN DS
GS GS tnv V
i I
g k V V V
v V V
()()
21 W
1
2
D n GS tn DS
i k v V v
L
121
2. FET
2.9 Small-Signal Operation and Models
() ()
2
n ox G tnm S
W
g C V V
L
m
()
2 1
2
n ox Dm
n D
W
g I
L
C
k I
m
(3)
2 2
D D
GS t O
m
V
g
I I
V V V
V
GS
- V
t
g
m
I
D
g
m
V
GS
- V
t
g
m
W/L constant W/L constant I
D
constant
MOSFET operating in saturation produces a current in response to its gate-source overdrive voltage.
The transconductance is a figure of merit that indicates how well a device converts a voltage to
current.
??????
?
≡
????????????
?
????????????
??
d
?
??8????????
2. FET
2.9 Small-Signal Operation and Models
() ()
2
n ox G tnm S
W
g C V V
L
m
()
2 1
2
n ox Dm
n D
W
g I
L
C
k I
m
(3)
2 2
D D
GS t O
m
V
g
I I
V V V
V
GS
- V
t
g
m
I
D
g
m
V
GS
- V
t
g
m
W/L constant W/L constant I
D
constant
MOSFET operating in saturation produces a current in response to its gate-source overdrive voltage.
The transconductance is a figure of merit that indicates how well a device converts a voltage to
current.
??????
?
≡
????????????
?
????????????
??
d
?
??8????????
122
2. FET
2.9 Small-Signal Operation and Models
The Small Signal Voltage Gain
v
DS
= v
D
= V
DD
–R
D
i
D
= V
DD
–R
D
(I
D
+ i
d
) = V
DS
–R
d
i
d
≡ V
D
+ v
d
Thus the signal component of the drain voltage (note that
DC power supply is set to zero) is
v
ds
= v
d
= –i
d
R
D
=−??????
?
?
?
?
??????
??
??????
?
??????
??
=–g
m
v
gs
R
D
indicates that the voltage gain is given by
W
ds d
v n OV D m D
gs gs
v v
A k V R g R
v v L
v
GS
+
-
v
DS
i
D
R
D
V
DD
v
gs
(t)
V
GS
+
-
2. FET
2.9 Small-Signal Operation and Models
The Small Signal Voltage Gain
v
DS
= v
D
= V
DD
–R
D
i
D
= V
DD
–R
D
(I
D
+ i
d
) = V
DS
–R
d
i
d
≡ V
D
+ v
d
Thus the signal component of the drain voltage (note that
DC power supply is set to zero) is
v
ds
= v
d
= –i
d
R
D
=−??????
?
?
?
?
??????
??
??????
?
??????
??
=–g
m
v
gs
R
D
indicates that the voltage gain is given by
W
ds d
v n OV D m D
gs gs
v v
A k V R g R
v v L
v
GS
+
-
v
DS
i
D
R
D
V
DD
v
gs
(t)
V
GS
+
-
123
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
Transconductance(g
m
): describes how i
d
change with v
gs
()
( ) 1 2 2
GS GS
d d
m n GS t DS n D n D
gs gs
v V
i i W W
g k V V V k I k I
v v L L
Output resistance (r
o
):
1
1
1
AD
DS D D
VI
V I I
Drain current i
d
varies with v
DS
due to channel length modulation
Finite r
o
to model the linear dependence of i
D
on v
DS
The effect can be neglected if r
o
is sufficiently large
(a) Without r
o
(b) With r
o
Fig. (a) & (b) representhybrid model a.k.a. small-signal
model or a small-signal equivalent circuit.
??????
?
=??????
?
?5
=
????????????
?
????????????
??
?
??8?????
?5
=??????
??????
?
2
??????
??
−??????
??
6
?5
G
D
S
G
D
S
BG
D
S
BG
D
S
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
Transconductance(g
m
): describes how i
d
change with v
gs
()
( ) 1 2 2
GS GS
d d
m n GS t DS n D n D
gs gs
v V
i i W W
g k V V V k I k I
v v L L
Output resistance (r
o
):
1
1
1
AD
DS D D
VI
V I I
Drain current i
d
varies with v
DS
due to channel length modulation
Finite r
o
to model the linear dependence of i
D
on v
DS
The effect can be neglected if r
o
is sufficiently large
(a) Without r
o
(b) With r
o
Fig. (a) & (b) representhybrid model a.k.a. small-signal
model or a small-signal equivalent circuit.
??????
?
=??????
?
?5
=
????????????
?
????????????
??
?
??8?????
?5
=??????
??????
?
2
??????
??
−??????
??
6
?5
G
D
S
G
D
S
BG
D
S
BG
D
S
124
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
T-model
Fig.: Development of the T equivalent-circuit
model for the MOSFET. For simplicity, r
o
has
been omitted; however, it may be added between
D and S in the T model of (d).
Simple circuit transformation is
possible to develop an alternative
equivalent-circuit model for the
MOSFET.
(c)(d)
Fig. (d) shows that the resistance between gate
and source looking into the source is 1/g
m
.
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
T-model
Fig.: Development of the T equivalent-circuit
model for the MOSFET. For simplicity, r
o
has
been omitted; however, it may be added between
D and S in the T model of (d).
Simple circuit transformation is
possible to develop an alternative
equivalent-circuit model for the
MOSFET.
(c)(d)
Fig. (d) shows that the resistance between gate
and source looking into the source is 1/g
m
.
125
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
T-model (NMOS transistor:)
Fig.: (a) The T model of the NMOS with the drain-to-
source resistance r
o
. (b) An alternative representation of
the T model
i
g
= 0, i
d
= g
m
v
gs
, and
i
s
= v
gs
/(1/g
m
)= g
m
v
gs
,
All the same as in the original
model in Fig. (a).
2
2
d D
m n ox OV n ox D
gs OV
i IW W
g C V C I
v L L V
m m
1
A
o
D D
V
r
I I
Transconductance:
Output resistance:
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
T-model (NMOS transistor:)
Fig.: (a) The T model of the NMOS with the drain-to-
source resistance r
o
. (b) An alternative representation of
the T model
i
g
= 0, i
d
= g
m
v
gs
, and
i
s
= v
gs
/(1/g
m
)= g
m
v
gs
,
All the same as in the original
model in Fig. (a).
2
2
d D
m n ox OV n ox D
gs OV
i IW W
g C V C I
v L L V
m m
1
A
o
D D
V
r
I I
Transconductance:
Output resistance:
126
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
SMALL-SIGNAL MODEL FOR THE PMOS TRANSISTOR
The small-signal model
for the PMOS transistor
is identical tothat of the
NMOSdevice
Figure:
(a) NMOS and PMOS
transistors. (b) The small-
signal models are identical.
For a PMOStransistor
V
SG
= V
GG
–v
gg
i
D
= I
D
-i
d
2. FET
2.9 Small-Signal Operation and Models
Small-Signal Equivalent-Circuit Models
SMALL-SIGNAL MODEL FOR THE PMOS TRANSISTOR
The small-signal model
for the PMOS transistor
is identical tothat of the
NMOSdevice
Figure:
(a) NMOS and PMOS
transistors. (b) The small-
signal models are identical.
For a PMOStransistor
V
SG
= V
GG
–v
gg
i
D
= I
D
-i
d
127
PMOS small signal model is identical to NMOS
Figure: Small signal equivalentcircuit of a p-channelMOSFETshowing
(a) the conventional voltage polarities and current directions and (b) the
case when the voltage polarities and current directions are reversed.
Becomes exactly
same as NMOS
small signal model!
2. FET
2.9 Small-Signal Operation and Models
PMOS small signal model is identical to NMOS
Figure: Small signal equivalentcircuit of a p-channelMOSFETshowing
(a) the conventional voltage polarities and current directions and (b) the
case when the voltage polarities and current directions are reversed.
Becomes exactly
same as NMOS
small signal model!
2. FET
2.9 Small-Signal Operation and Models
128
PMOS small signal model is identical to NMOS
We will use NMOS circuit model for both!
For both NMOS and PMOS, while i
D
≥ 0 and I
D
≥ 0, signal quantities:
i
d
, v
gs
, and v
ds
, can be negative!
PMOS*
NMOS
It means: except for using |V
GS
|, |V
t
|, |V
OV
|, and |V
A
| and replacing k
n
with k
p
.
2. FET
2.9 Small-Signal Operation and Models
PMOS small signal model is identical to NMOS
We will use NMOS circuit model for both!
For both NMOS and PMOS, while i
D
≥ 0 and I
D
≥ 0, signal quantities:
i
d
, v
gs
, and v
ds
, can be negative!
PMOS*
NMOS
It means: except for using |V
GS
|, |V
t
|, |V
OV
|, and |V
A
| and replacing k
n
with k
p
.
2. FET
2.9 Small-Signal Operation and Models
129
2. FET
2.10 Biasing in MOS Amplifier Circuits
DC bias for MOSFET amplifier
The amplifiers are operating at a proper dc bias point.
Linear signal amplification is provided based on small-signal circuit operation.
The DC bias circuit is to ensure the MOSFET in saturation with a proper
collector current I
D
.
Biasing by fixing gate-to-source voltage V
GS
Fix the dc voltage V
GS
to specify the saturation current of the MOSFET:
??????
?
=
5
6
??????
?
??????
??
−??????
?
6
=
5
6
m
?
??????
??
?
?
??????
?
−??????
?
6
I
D
current deviates from the desirable value due to variations in the device
parameters V
t
and µ
n
. It is not a good approach to biasing a MOSFET.
Biasing by fixing gate voltage and connecting a source resistance R
s
The bias condition is specified by: ??????
?
=??????
??
+
5
6
??????
?
??????
??
−??????
?
6
??????
?
and
??????
?
=
5
6
??????
?
??????
??
−??????
?
6
Drain current has better tolerance to variations in the device parameters
2. FET
2.10 Biasing in MOS Amplifier Circuits
DC bias for MOSFET amplifier
The amplifiers are operating at a proper dc bias point.
Linear signal amplification is provided based on small-signal circuit operation.
The DC bias circuit is to ensure the MOSFET in saturation with a proper
collector current I
D
.
Biasing by fixing gate-to-source voltage V
GS
Fix the dc voltage V
GS
to specify the saturation current of the MOSFET:
??????
?
=
5
6
??????
?
??????
??
−??????
?
6
=
5
6
m
?
??????
??
?
?
??????
?
−??????
?
6
I
D
current deviates from the desirable value due to variations in the device
parameters V
t
and µ
n
. It is not a good approach to biasing a MOSFET.
Biasing by fixing gate voltage and connecting a source resistance R
s
The bias condition is specified by: ??????
?
=??????
??
+
5
6
??????
?
??????
??
−??????
?
6
??????
?
and
??????
?
=
5
6
??????
?
??????
??
−??????
?
6
Drain current has better tolerance to variations in the device parameters
130
2. FET
2.11 Biasing in MOS Amplifier Circuits
Biasing using a drain-to-gate feedback resistor(Fig. 1)
A single power supply is needed.
LargeR
G
ensures the MOSFET in saturation (V
GS
= V
DS
)
MOSFET operating point:
?
??
??
??
?
?
=
5
6
??????
?
??????
??
−??????
?
6
The value of the feedback resistor R
G
affects the small-signal gain.Biasing using a constant-current source(Fig (a) &(b))
The MOSFET can be biased with a constant current source I.
R
D
is chosen to operate the MOSFET in saturation mode.
The current source is typically a current mirror.
Current mirror circuit:
MOSFETs Q
1
and Q
2
are in saturation.
The reference current I
REF
= I= I
D
??????
??
−??????
??
??????
?
=
1
2
??????
?
??????
??
−??????
?
6
; ??????
???
=
1
2
??????
?
??????
??
−??????
?
6
When applying to the amplifier circuit, the voltage V
D2
has to
be high enough to ensure Q
2
in saturation
Fig. 1: Biasing the MOSFET
using a large drain-to-gate
feedback resistance, R
G
.
Fig. (a) Biasing the MOSFET using a constant-current source I.
(b) Implementation of the current source I using a current mirror.
2. FET
2.11 Biasing in MOS Amplifier Circuits
Biasing using a drain-to-gate feedback resistor(Fig. 1)
A single power supply is needed.
LargeR
G
ensures the MOSFET in saturation (V
GS
= V
DS
)
MOSFET operating point:
?
??
??
??
?
?
=
5
6
??????
?
??????
??
−??????
?
6
The value of the feedback resistor R
G
affects the small-signal gain.Biasing using a constant-current source(Fig (a) &(b))
The MOSFET can be biased with a constant current source I.
R
D
is chosen to operate the MOSFET in saturation mode.
The current source is typically a current mirror.
Current mirror circuit:
MOSFETs Q
1
and Q
2
are in saturation.
The reference current I
REF
= I= I
D
??????
??
−??????
??
??????
?
=
1
2
??????
?
??????
??
−??????
?
6
; ??????
???
=
1
2
??????
?
??????
??
−??????
?
6
When applying to the amplifier circuit, the voltage V
D2
has to
be high enough to ensure Q
2
in saturation
Fig. 1: Biasing the MOSFET
using a large drain-to-gate
feedback resistance, R
G
.
Fig. (a) Biasing the MOSFET using a constant-current source I.
(b) Implementation of the current source I using a current mirror.
131
Rough Comparison
BJTs
Close device matching → low offset voltages
Low voltage noise
Useful for multipliers / mixers
ꭔLimited by base current
MOSFET
Input dielectrically isolated
High density integration
Widely used for digital → ease of fabrication → cost
ꭔHigher voltage noise
JFET
Good noise performance → JFET input stages
ꭔDepletion mode → gate voltage → connectivity issues
ꭔGate-channel diode → ensure always reverse biased
Rough Comparison
BJTs
Close device matching → low offset voltages
Low voltage noise
Useful for multipliers / mixers
ꭔLimited by base current
MOSFET
Input dielectrically isolated
High density integration
Widely used for digital → ease of fabrication → cost
ꭔHigher voltage noise
JFET
Good noise performance → JFET input stages
ꭔDepletion mode → gate voltage → connectivity issues
ꭔGate-channel diode → ensure always reverse biased
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