8051_microcontroller_unit4 Presentation.pdf

8051 Microcontroller Presentation

1. CPURAMROM
I/O
Port
Timer
Serial
COM
Port
8051 BasicComponent
•4K bytes internalROM
•128 bytes internalRAM
•Four 8-bit I/O ports (P0 -P3).
•Two 16-bittimers/counters
•One serialinterface
A single chip
Microcontroller

2. OSC
ExternalInterrupts
BlockDiagram
P0P2P1P3
Addr/Data
TXDRXD
Serial
Bus
Control
Interrupt
Control
4 I/OPorts
Timer
0Timer1
128bytes
RAM
4k
ROM

3. Other 8051features
•Only 1 On chip oscillator (externalcrystal)
•6 interrupt sources (2 external ,3internal,Reset)
•64K external code (program) memory(onlyread)PSEN
•64K external data memory(can be read and write) byRD,WR
•Code memory is selectable by EA (internal orexternal)
•We may have External memory as data andcode

4. EmbeddedSystem
(8051Application)
•What is Embedded System?
–An embedded system is closely
integrated with the mainsystem
–It may not interact directly with the
environment
–For example –A microcomputer in acar
ignitioncontrol
An embedded product uses a microprocessor or microcontroller to do onetask
only
There is only one application software that is typically burnt intoROM

5. Examples of EmbeddedSystems
•Keyboard
•Printer
•video game player
•MP3 musicplayers
•Embedded memories to keep configurationinformation
•Mobile phone units
•Domestic (home)appliances
•Dataswitches
•Automotivecontrols

6. Three criteria in Choosing aMicrocontroller
•meeting the computing needs of the task efficiently andcost
effectively
–speed, the amount of ROM and RAM, the number of I/O ports and
timers, size, packaging, powerconsumption
–easy toupgrade
–cost perunit
•availability of software developmenttools
–assemblers, debuggers, C compilers, emulator, simulator, technical
support
•wide availability and reliable sources of themicrocontrollers

7. Comparison of the 8051 FamilyMembers
•ROMtype
–8031 noROM
–80xx maskROM
–87xxEPROM
–89xx FlashEEPROM
•89xx
–8951
–8952
–8953
–8955
–898252
–891051
–892051
•Example(AT89C51,AT89LV51,AT89S51)
–AT=ATMEL(Manufacture)
–C = CMOStechnology
–LV= LowPower(3.0v)

8. WD: Watch Dog Timer
AC: AnalogComparator
ISP: In SystemProgramable
Comparison of the 8051 FamilyMembers
89XX ROM RAM Timer IntSource IOpin Other
8951 4k 128 2 6 32 -
8952 8k 256 3 8 32 -
8953 12k 256 3 9 32 WD
8955 20k 256 3 8 32 WD
898252 8k 256 3 9 32 ISP
891051 1k 64 1 3 16 AC
892051 2k 128 2 6 16 AC

9. 8051 Internal Block Diagram

10. 8051
Schematic
Pinout

11. 8051
FootPrint
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA/VPP
ALE/PROG
PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
(INT1)P3.3
1 40
P1.1
2 39
P1.2
3 38
4 37
P1.4
5 36
P1.5
6 35
P1.6
7 34
P1.7
8
8051
33
RST
9 32
(RXD)P3.0 10 31
(8031)
(TXD)P3.1
11 30
(INT0)P3.2 12
(8751) 29
13
(8951)
28
(T0)P3.4
14 27
(T1)P3.5
15 26
(WR)P3.6
16 25
(RD)P3.7
17 24
XTAL2
18 23
XTAL1
19 22
20 21
P1.0
P1.3
GND

12. IMPORTANT PINS (IO Ports)
•One of the most useful features of the 8051 is that it contains
four I/O ports (P0 -P3)
•Port 0 （pins32-39）：P0（P0.0～P0.7）
–8-bit R/W -General PurposeI/O
–Or acts as a multiplexed low byte address and data bus for externalmemorydesign
•Port 1（pins1-8）：P1（P1.0～P1.7）
–Only 8-bit R/W -General PurposeI/O
•Port 2 （pins21-28）：P2（P2.0～P2.7）
–8-bit R/W -General PurposeI/O
–Or high byte of the address bus for external memorydesign
•Port 3 （pins10-17）：P3（P3.0～P3.7）
–General PurposeI/O
–if not using any of the internal peripherals (timers) or externalinterrupts.
•Each port can be used as input or output(bi-direction)

13. Port 3 AlternateFunctions

14. 8051 Port 3 Bit Latches and I/O Buffers

15. Hardware Structure of I/OPin
Readlatch
InternalCPU
bus
Write tolatch
P1.X
pin
Readpin
DQ
CLKQ
P1.X
TB2
Vcc
Load(L1)
M1
TB1

16. HardwareStructure of I/OPin
•Each pin of I/Oports
–Internallyconnected to CPUbus
–A D latch store the value of thispin
•Write to latch＝1：write data into the Dlatch
–2 Tri-statebuffer：
•TB1: controlled by “Readpin”
–Read pin＝1：really read the data present at thepin
•TB2: controlled by “Readlatch”
–Read latch＝1：read value from internallatch
–A transistor M1gate
•Gate=0:open
•Gate=1:close

17. Writing“1”toOutputPinP1.X
Readlatch
InternalCPU
bus
Write tolatch
P1.X
pin
Readpin
Vcc
Load(L1)
M1
DQ
P1.X
ClkQ

18. Writing “0” to Output PinP1.X
Readlatch
1. write a 0 to thepin
InternalCPU
bus 0
Vcc
Load(L1)2. output pinis
ground
P1.X
pin
Write tolatch
DQ
P1.X
ClkQ M1
1
Readpin

19. Reading “High” at Input Pin

20. Reading “Low” at InputPin

21. Port 0 with Pull-UpResistors
Vcc
10K
DS5000
8751
8951
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
0
P
o
rt

22. IMPORTANT PINS
•PSEN (out): Program Store Enable, the read signal for external
program memory (activelow).
•ALE (out): Address Latch Enable, to latch address outputs at Port0
andPort2
•EA (in): External Access Enable, active low to access external
program memory locations 0 to4K
•RXD,TXD: UART pins for serial I/O on Port3
•XTAL1&XTAL2:Crystal inputs for internaloscillator.

23. Pins of8051
•Vcc（pin40）：
–Vcc provides supply voltage to thechip.
–The voltage source is+5V.
•GND（pin20）：ground
•XTAL1 and XTAL2（pins19,18）：
–These 2 pins provide externalclock.
–Way 1：using a quartz crystaloscillator
–Way 2：using a TTLoscillator
–Example 4-1 shows the relationship between XTALand
the machinecycle.

24. C2
30pF
C1
30pF
XTAL Connection to8051
•Using a quartz crystaloscillator
•We can observe the frequency on theXTAL2
pin.
XTAL2
XTAL1
GND

25. XTAL Connection to an External ClockSource
•Using a TTLoscillator
•XTAL2 isunconnected.
NC
EXTERNAL
OSCILLATOR
SIGNAL
XTAL2
XTAL1
GND

26. Machinecycle
•Find the machine cyclefor
•(a) XTAL = 11.0592MHz
•(b) XTAL = 16MHz.
•Solution:
•(a) 11.0592 MHz / 12 = 921.6kHz;
• machine cycle = 1 / 921.6 kHz = 1.085s
•(b) 16 MHz / 12 = 1.333MHz;
• machine cycle = 1 / 1.333 MHz = 0.75s

27. Pins of8051
•RST（pin9）：reset
–input pin and active high（normallylow）.
•The high pulse must be high at least 2 machinecycles.
–power-onreset.
•Upon applying a high pulse to RST, themicrocontroller
will reset and all values in registers will belost.
•Reset values of some 8051registers
–power-on resetcircuit

28. 31
10uF
30pF
9
8.2K
X2
RST
EA/VPP
X1
Vcc
Power-OnRESET

29. RESET Value of Some 8051Registers:


30. Pins of8051
•/EA（pin 31）：externalaccess
–There is no on-chip ROM in 8031 and 8032.
–The /EA pin is connected to GND to indicate the code isstored
externally.
–/PSEN ＆ALE are used for externalROM.
–For 8051, /EA pin is connected toVcc.
–“/” means activelow.
•/PSEN（pin 29）：program storeenable
–This is an output pin and is connected to the OE pin of the ROM.

31. Pins of8051
•ALE（pin 30）：address latchenable
–It is an output pin and is activehigh.
–8051port0providesbothaddressanddata.
–TheALEpinisusedforde-multiplexingtheaddress
anddatabyconnectingtotheGpinofthe74LS373
latch.

32. Address Multiplexing for ExternalMemory
Multiplexing
the address
(low-byte)
and data
bus

33. Address Multiplexing for ExternalMemory
Accessing
external
code
memory

34. Accessing 1K External DataMemory
Interface
to 1K
RAM

35. D
EA
P2.0
P2.7
D0
D7
A8
A15
External codememory
G74LS373
8051
ROM
OE
CS
A0
A7
WR
RD
PSEN
ALE
P0.0
P0.7

36. G74LS373
D0
D7
A8
A15
WR
RD
CS
A0
A7
P2.0
P2.7
EA
WR
RD
PSEN
ALE
P0.0
P0.7
D
External datamemory
RAM
8051

37. Overlapping External Code and DataSpaces

38. Overlapping External Code and DataSpaces

39. Overlapping External Code and DataSpaces
Allows the RAM tobe
written as data memory,and
read as data memory as well as codememory.
This allows a program tobe
downloaded from outside into the RAM as data,and
executed from RAM ascode.

40. MemoryStructure

41. On-ChipMemory
InternalRAM

42. Registers

43. Bit AddressableMemory

44. Special FunctionRegisters
DATAregisters
CONTROLregisters
Timers
Serialports
Interruptsystem
Analog to Digitalconverter
Digital to Analogconverter
Etc.
Addresses 80h –FFh
Direct Addressing used to
accessSPRs

45. Bit AddressableRAM
Summary
of the8051
on-chip
data
memory
(RAM)

46. Bit AddressableRAM
Summary
of the8051
on-chip
data
memory
(Special
Function
Registers)

47. SFR MemoryMap

48. RegisterBanks
Active bank selected by PSW [RS1,RS0]bit
Permits fast “context switching” in interrupt
service routines(ISR).

50. 8051 CPURegisters
A (Accumulator)
B
PSW(Program StatusWord)
SP (StackPointer)
PC(ProgramCounter)
DPTR (DataPointer)
Used inassembler
instructions

51. A
B
R0
R1
R2
R3
R4
R5
R6
R7
Registers
DPTR
PC
Some 8051 16-bitRegister
Some 8-bit Registers of the8051
DPLDPH
PC

52. The8051
AssemblyLanguage

53. Overview
•Data transferinstructions
•Addressingmodes
•Data processing (arithmetic andlogic)
•Program flowinstructions

54. Data TransferInstructions
•MOVdest,source dest source
•Stackinstructions
PUSH byte ;increment stackpointer,
;move byte onstack
POPbyte ;move from stack to byte,
;decrement stack pointer
•Exchangeinstructions
XCH a, byte
XCHD a,byte
;exchange accumulator and byte
;exchange low nibbles of
;accumulator and byte

55. AddressingModes
Immediate Mode –specify data by itsvalue
mov A,#0
mov R4,#11h
mov B,#11
;put 0 in theaccumulator
;A =00000000
;put 11hex in the R4 register
;R4 =00010001
;put 11 decimal in bregister
;B =00001011
movDPTR,#7521h ;put 7521 hex in DPTR
;DPTR =0111010100100001

56. AddressingModes
Immediate Mode –continue
MOVDPTR,#7521h
MOVDPL,#21H
MOV DPH,#75
COUNT EQU30
~
~
mov R4,#COUNT
MOVDPTR,#MYDATA
~
~
0RG 200H
MYDATA:DB“INDIA”

57. 8051 TIMERS

58. Programming 8051 timers

59. TMOD Register

60. Clock source for
timer

61. Modes of operation

62. Time period of timer
examples

63. Example
Find the value for TMOD if we want to program timer 0 in mode 2,
use 8051 XTAL for the clock source, and use instructions to start
and stop thetimer.
Solution:
timer1 timer0
TMOD= 00000010Timer 1 is notused.
Timer 0, mode2,
C/T = 0 to use XTAL clock source(timer)
gate = 0 to use internal(software)
start and stopmethod.

64. Timermodes

65. TCON Register(1/2)
•Timer control register:TMOD
–Upper nibble for timer/counter, lower nibble forinterrupts
•TR (run controlbit)
–TR0 for Timer/counter 0; TR1 for Timer/counter1.
–TR is set by programmer to turn timer/counteron/off.
•TR=0: off(stop)
•TR=1: on(start)

66. TCON Register(2/2)
•TF (timer flag, controlflag)
–TF0 for timer/counter 0; TF1 for timer/counter1.
–TF is like a carry. Originally, TF=0. When TH-TL roll over to 0000 from
FFFFH, the TF is set to1.
•TF=0 : notreach
•TF=1: reach
•If we enable interrupt, TF=1 will triggerISR.

67. Equivalent Instructions for the Timer ControlRegister
For timer0
SETBTR0 = SETB TCON.4
CLRTR0 = CLRTCON.4
SETBTF0 = SETB TCON.5
CLRTF0 = CLRTCON.5
For timer1
SETBTR1 = SETB TCON.6
CLRTR1 = CLRTCON.6
SETBTF1 = SETB TCON.7
CLRTF1 = CLRTCON.7
TCON: Timer/Counter ControlRegister
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

68. Timer Mode1
•In following, we all use timer 0 as anexample.
•16-bit timer (TH0 andTL0)
•TH0-TL0 is incremented continuously when TR0 is set to 1. And the 8051 stops to
increment TH0-TL0 when TR0 iscleared.
•The timer works with the internal system clock. In other words, the timer counts up
each machinecycle.
•When the timer (TH0-TL0) reaches its maximum of FFFFH, it rolls over to 0000,and
TF0 israised.
•Programmer should check TF0 and stop the timer0.

69. Steps of Mode 1(1/3)
1.Choose mode 1 timer0
–MOVTMOD,#01H
2.Set the original value to TH0 andTL0.
–
–
MOVTH0,#FFH
MOVTL0,#FCH
3.You had better to clear the flag to monitor:TF0=0.
–CLRTF0
4.Start thetimer.
–SETBTR0

70. TF
Steps of Mode 1(2/3)
5. The 8051 starts to count up by incrementing theTH0-TL0.
–TH0-TL0=FFCH,FFFDH,FFFEH,FFFFH,0000H
Starttimer
Stoptimer
FFFC FFFD FFFE FFFF
TF =0
TF =0 TF =0
TF =0
0000
TF =1
Monitor TF untilTF=1
TR0=1
TH0 TL0 TR0=0

71. Steps of Mode 1(3/3)
6.When TH0-TL0 rolls over from FFFFH to 0000, the 8051
setTF0=1.
TH0-TL0= FFFEH, FFFFH, 0000H (NowTF0=1)
7.Keep monitoring the timer flag (TF) to see if it israised.
AGAIN:JNB TF0,AGAIN
8.Clear TR0 to stop theprocess.
CLRTR0
9.Clear the TF flag for the nextround.
CLRTF0

72. Timer Delay Calculation for XTAL =
11.0592MHz
(a) inhex
•(FFFF –YYXX + 1) ×1.085s
•where YYXX are TH, TL initial valuesrespectively.
•Notice that values YYXX are inhex.
(b) indecimal
•Convert YYXX values of the TH, TL register to decimal to
get a NNNNN decimalnumber
•then (65536 –NNNNN) ×1.085s

73. Example
•square wave of 50% duty onP1.5
•Timer 0 isused
;each loop is a halfclock
;Timer 0,mode1(16-bit)
;Timer value =FFF2H
MOV TMOD,#01
HERE: MOVTL0,#0F2H
MOVTH0,#0FFH
CPL P1.5
ACALL DELAY
SJMPHERE
P1.5
50%
wholeclock
50%

74. FFF2 FFF3 FFFFFFF4
Example
;generate delay using timer 0
DELAY:
SETBTR0 ;start the timer 0
AGAIN:JNBTF0,AGAIN
CLRTR0 ;stop timer0
CLRTF0 ;clear timer 0flag
RET
TF0 =0 TF0 =0 TF0 =0 TF0 =0
0000
TF0 =1

75. Example
•This program generates a square wave on pin P1.5 Using timer1
•Find the frequency.(dont include the overhead of instructiondelay)
•XTAL = 11.0592MHz
MOV
AGAIN:MOV
MOV
TMOD,#10H
TL1,#34H
TH1,#76H
;timer 1, mode1
;timervalue=7634H
SETBTR1 ;start
BACK:JNBTF1,BACK
CLRTR1 ;stop
CPLP1.5 ;next halfclock
CLRTF1 ;clear timer flag 1
SJMPAGAIN ;reloadtimer1

76. Example
Solution:
FFFFH–7634H+ 1= 89CCH= 35276clockcount
Half period = 35276 ×1.085 s = 38.274 ms
Whole period = 2 ×38.274 ms = 76.548ms
Frequency = 1/ 76.548 ms = 13.064Hz.
Note
Mode 1 is not auto reload then the program must reload the TH1, TL1 register
every timer overflow if we want to have a continuouswave.

77. Find TimerValues
•Assume that XTAL = 11.0592 MHz.
•And we know desireddelay
•how to find the values for the TH,TL?
1.Divide the delay by 1.085 s and getn.
2.Perform 65536–n
3.Convert the result of Step 2 to hex (yyxx)
4.Set TH = yy and TL =xx.

78. Example
•Assuming XTAL = 11.0592MHz,
•write a program to generate a square wave of 50 Hz frequency on pin
P2.3.
Solution:
1.The period of the square wave = 1 / 50 Hz = 20ms.
2.The high or low portion of the square wave = 10 ms.
3.10 ms / 1.085 s =9216
4.65536 –9216 = 56320 in decimal = DC00H inhex.
5.TL1 = 00H and TH1 =DCH.

79. Example
MOVTMOD,#10H ;timer 1, mode1
AGAIN:MOV
MOV
TL1,#00
TH1,#0DCH
;Timervalue=DC00H
SETBTR1 ;start
BACK:JNBTF1,BACK
CLRTR1 ;stop
CPLP2.3
CLRTF1 ;cleartimerflag1
SJMPAGAIN ;reload timersince
;mode 1 isnot
;auto-reload

80. TimerMode0
•Mode 0 is exactly like mode 1 except that it is a 13-bit
timer instead of16-bit.
–8-bitTH0
–5-bitTL0
•The counter can hold values between 0000 to 1FFF in
TH0-TL0.
–2
13
-1=2000H-1=1FFFH
•We set the initial values TH0-TL0 to countup.
•When the timer reaches its maximum of 1FFFH, it rolls
over to 0000, and TF0 israised.

81. Timer Mode2
•8-bittimer.
–It allows only values of 00 to FFH to be loaded intoTH0.
•Auto-reloading
•TL0 is incremented continuously whenTR0=1.

82. Steps of Mode2
1.Chose mode 2 timer0
MOVTMOD,#02H
2.Set the original value toTH0.
MOVTH0,#38H
3.Clear the flag toTF0=0.
CLRTF0
4.After TH0 is loaded with the 8-bit value, the 8051 gives a copy ofit
toTL0.
TL0=TH0=38H
5.Start thetimer.
SETBTR0

83. Steps of Mode2
6.The 8051 starts to count up by incrementing theTL0.
–TL0= 38H, 39H,3AH,....
7.When TL0 rolls over from FFH to 00, the 8051 set TF0=1. Also,TL0
is reloaded automatically with the value kept by theTH0.
–TL0= FEH, FFH, 00H (NowTF0=1)
–The 8051 auto reloadTL0=TH0=38H.
–ClrTF0
–Go to Step 6 (i.e., TL0 is incrementingcontinuously).
•
•
Note that we must clear TF0 when TL0 rolls over. Thus, wecan
monitor TF0 in nextprocess.
Clear TR0 to stop theprocess.
–ClrTR0

84. Timer 1 Mode 2 with internalInput
overflowflag
TR1
TF goes high whenFF 0
reload
TL1
TH1
TF1
÷12
C/T =0
XTAL
oscillator

85. Counter
•These timers can also be used ascounters
counting events happening outside the8051.
•When the timer is used as a counter, it is apulse
outside of the 8051 that increments the TH,TL.
•When C/T=1, the counter counts up as pulsesare
fedfrom
–T0: timer 0 input (Pin 14,P3.4)
–T1: timer 1 input (Pin 15,P3.5)

86. Port 3 Pins Used For Timers 0 and1
Pin PortPin Function Description
14 P3.4 T0 Timer/Counter 0 externalinput
15 P3.5 T1 Timer/Counter 1 externalinput
GATE C/T=1 M1 M0 GATE C/T=1 M1 M0
Timer1 Timer0
(MSB) (LSB)

87. Timer/Counterselection

88. Counter Mode1
•16-bit counter (TH0 andTL0)
•TH0-TL0 is incremented when TR0 is set to 1 and an externalpulse
(in T0)occurs.
•When the counter (TH0-TL0) reaches its maximum of FFFFH, it rolls
over to 0000, and TF0 israised.
•Programmers should monitor TF0 continuously and stop the
counter0.
•Programmers can set the initial value of TH0-TL0 and let TF0=1 as an
indicator to show a special condition. (ex: 100 people havecome).

89. Timer0 with External Input
(Mode1)
Timer 0
external
inputPin
3.4
C/T =1
TR0
TF0 goes high when
FFFF0
overflow
flag
TF0TH0 TL0

90. Counter Mode2
•8-bitcounter.
–It allows only values of 00 to FFH to be loadedinto
TH0.
•Auto-reloading
TL0 is incremented if TR0=1 and external pulse
occurs.

91. Example
Assuming that clock pulses are fed into pin T1, write a program for
counter 1 in mode 2 to count the pulses and display the state of the
TL 1 count onP2.
MOVTMOD,#01100000B ;mode 2, counter 1
MOVTH1,#0
SETBP3.5
AGAIN:SETBTR1
;make T1 inputport
;start
BACK:MOV
MOV
A,TL1
P2,A ;display inP2
JNBTF1,Back
CLRTR1
CLRTF1
;overflow
;stop
;makeTF=0
SJMPAGAIN ;keep doingit

92. Example
•Timer 1 as an event counter fed into pin3.5.
•“SETB P3.5” make P3.5 an input port by making ithigh
P2 is connected to 8LEDs
and input T1 topulse.
8051
to
LEDs
P3.5
T1
P2

93. 1 Hzclock
T0
P3.4
P1
Example
Assume that a 1-Hz frequency pulse is connected to input pin 3.4.
Write a program to display counter 0 on an LCD. Set the initial
value of TH0 to-60.
Solution:
Note that on the first round, it starts from 0 and counts 256 events, since on
RESET, TL0=0. To solve this problem, load TH0 with -60 at the beginningof
theprogram. 8051
to
LCD

94. Example
ACALLLCD_SET_UP ;initialize the LCD
MOVTMOD,#00000110B ;Counter 0,mode2
MOVTH0,#-60
;make T0 asinput
;starts thecounter
;every 60events
;convert inR2,R3,R4
;display onLCD
;loop ifTF0=0
;stop
SETB P3.4
AGAIN:SETB TR0
BACK:MOVA,TL0
ACALL CONV
ACALLDISPLY
JNBTF0,BACK
CLRTR0
CLRTF0
SJMPAGAIN

95. GATE=1 inTMOD
•All discuss so far has assumed thatGATE=0.
–The timer is stared with instructions “SETB TR0”and
“SETB TR1” for timers 0 and 1,respectively.
•If GATE=1, we can use hardware to control the startand
stop of thetimers.
–INT0 (P3.2, pin 12) starts and stops timer0
–INT1 (P3.3, pin 13) starts and stops timer1
–This allows us to start or stop the timer externally atany
time via a simpleswitch.

96. GATE (externalcontrol)
•Timer 0 must be turned on by “SETBTR0”
•If GATE=1 count upif
–INT0 input ishigh
–TR0=1
•If GATE=0 count upif
–TR0=1

97. Timer Special FunctionResgister

98. 8051 PORTS

100. TRI-STATE BUFFER
A tri-state buffer has a single input and single output and the enable control
input.
By activating the enable, data at the input is transferred to the output.
The enable can be an active-low or active-high.

101. P1-P3 Structure and operation
Since all the ports of 8051 are bidirectional they all have the following three
components in their structure:
1.D Latch
2.Output Driver
3.Input Buffer
Ports P1, P2 and P3 have same structure except with extra circuitry to allow
their dual functions.
8051 ports have both the latch and the buffer. Now the question is, in reading
the status of the input pin or we are reading the status of the latch.
Therefore, when reading the ports there are two possibilities:
1)Reading the input pin
2)Reading the latch

102. 8051 port 1 structure

103. Reading the input pin
To make any bits of any port of 8051 as input port, we first must write a
1(logic high) to that bit. The following sequences of events
1.By writing 1 to the port bit it is written to the latch and the D latch has
“high” on its Q. Therefore Q=1 and Q(bar)=0.
2.Since Q(bar)=0 and is connected to the transistor M1 gate, the M1
transistor is off.
3.When the M1 transistor is off, it blocks any path to the ground for any
signal connected to the input pin and the input signal is directed to the
tri-state TB1.
4.When reading the input port in instructions such as “MOV A,P1” we are
really reading the data present at that pin. In other words, it is bringing
into the CPU the status of the external pin.

104. 5. This instruction activates the read pin of TB1(tri-state buffer 1) and lets the
data at the pins flow into the CPU’s internal Bus.
Reading “High” at Input Pin

105. Reading “Low” at the Input pin

106. Writing “0” to the port
What happens if we write a “0” to a port that was configured as an input
port?
If we write a 0(Low) to the port bits, then Q=0, and Q(bar)=1, the M1
transistor is “on”.
If M1 is “on”, it provides the path to the ground for both L1 and the input pin.
There fore, any attempt to read the input pin will always get the “low” ground
signal regardless of the status of the input pin.
This can also lead damage to the port.
contd…

107. Avoid damaging the port

108. Avoid damaging the port
When connecting a switch to an input port of 8051 we must be very careful.
This is due to the fact that the wrong connection can damage the port.
If a switch with Vccand ground is connected directly to the pin and the M1
transistor is “on” it will sink current from both internal load L1 and
external Vcc.
This can be too much current for M1 and will blow the transistor and as a
result, damage the port bit.
contd….

110. Buffering input switch with direct Vcc
1.One way is to have a 10K-ohm resistor on the Vccpath to limit current
flow through the M1 transistor.
2.The second method is to use a switch with ground only, and no Vcc. In
this method, we read a low when the switch is pressed and we read a
high when it is released.
3.Another way is to connect any input switch to tri-state buffer before it is
fed to the 8051 pin.

111. Instructions Reading the Status of Input Port
Mnemonics Examples
MOV A,PX MOV A,P1
JNB PX.Y JNB P1.2,TARGET
JB PX.Y JB P1.3,TARGET
MOV C,PX.Y MOV C,P1.4
CJNE A,PX,…. CJNE A,P1,TARGET

112. Reading Latch
Since in the reading port, some instructions read the port and some
instructions read the latch, we next consider the case of reading the port
where it reads internal port latch
“ANL P1,A” is an example of an instruction that reads the latch instead of the
input pin. Sequence of operations taking place when an instruction such
as “ANL P1,A” is executed.
1.The read latch activates the tri-state buffer of TB2 and brings the data
from Q latch into CPU.
2.The data is ANDedwith the contents of register A.
3.The result is rewritten to the latch

113. Reading the latch

114. Read-Modify-Write instructions
Mnemonics Example
ANL ANL P1,A
ORL ORL P2,A
XRL XRL P1,A
JBC JBC P1.1,TARGET
CPL CPL P1.2
INC INC P1
DEC DEC P2
DJNZ DJNZ P1,TARGET
MOV PX.Y,C MOVP0.2,C
CLR PX.Y CLR P2.3
SETB PX.Y SETB P0.5

115. P0 STRUCTURE
A major difference between P0 and other ports is that P0 has no internal pull-
up resistors.( The reason is to allow it to multiplex address and data.)
Since P0 has no internal pull-up resistors, it is simply an open-drain(open
drain in MOS is same as open collector in TTL)
Now by writing a “1” to the bit latch, the M1 transistor is “off” and that
causes the pin to float.
That is the reason why when P0 is used for simple data I/O we must connect
it to external pull-up resistors.
It must be noticed that when P0 is used for address/data multiplexing and it is
connected to the 74LS373 to latch address, there is no need for external
pull-up resistors.

116. P0 Structure

117. P0 with external Pull-up resistors

118. Stack Memory in 8051

119. Stack memory

120. Accessing Stack Memory

121. Pushing onto stack

122. Example

123. Retrieving from stack

124. Limit of Stack

125. Example

126. Serial
Communication

127. Serial Vs Parallel Data Transfer

128. Methods of serial communication

129. Basics of serialcommunication

130. Data framing

131. Start and stopbits
When there is no transfer the signal is high
Transmission begins with a start (low) bit
LSBfirst
Finally 1 stop bit(high)
Data transfer rate (baud rate) is stated in bps
bps: bit persecond

132. Data Transfer Rate

133. RS 232 Standards

134. RxD and TxD pins in the8051
•TxD pin 11 of the 8051(P3.1)
•RxD pin 10 of the 8051(P3.0)
SBUFregister
MOVSBUF,#’D
’
;load SBUF=44H, ASCII
for‘D’
MOVSBUF,A ;copy accumulator into
SBUF
MOVA,SBUF ;copy SBUF into
accumulator

135. MAX232

136. 8051 Serial Communication

137. Serial port blockdiagram

138. 8051 Baud Rates

139. Serial control (SCON)Register

140. Mode ofoperation
SM0SM1MODEoperationtransmitrate
000 shift
register
fixed(xtal/12)
011 8 bit
UART
variable(timer1)
102 9 bit
UART
fixed (xtal/32 or
xtal/64)
113 9 bit
UART
variable(timer1)

141. Mode ofoperation
•Mode 0 :
–Serial data enters and exits throughRxD
–TxD outputs the shiftclock.
–8 bits are transmitted/received(LSBfirst)
–The baud rate is fixed a 1/12 the oscillatorfrequency.
•Application
–Portexpansion
clk
Shift
register data
8051
TXD
RXD

142. Mode ofoperation
•Mode1
–Ten bits are transmitted (through TxD) or received (throughRxD)
–A start bit (0), 8 data bits (LSB first), and a stop bit(1)
–On receive, the stop bit goes into RB8 inSCON
–the baud rate is determined by the Timer 1 overflow rate.
–Timer1 clock is 1/32 machine cycle (MC=1/12 XTAL)
–Timer clock can be programmed as 1/16 of machinecycle
–Transmission is initiated by any instruction that uses SBUF as a destinationregister.

143. Mode ofoperation

144. Mode ofoperation
•Mode 2:
– Eleven bits are transmitted (through TxD), received (throughRxD)
• A start bit(0)
• 8 data bits (LSBfirst)
• A programmable 9th databit
•
and a stop bit(1)
– On transmit, the 9th bit (TB8) can be assigned 0 or1.
– On receive, the 9the data bit goes into RB8 inSCON.
– the 9
th
can be paritybit
– The baud rate is programmable to 1/32 or 1/64 the oscillator frequency in Mode 2 by SMOD bit in PCONregist
•Mode3
– Same as mode2
– But may have a variable baud rate generated from Timer1.

145. What isSMOD
Bit 7 of PCONregister
If SMOD=1 double baudrate
PCON is not bitaddressable
How to setSMOD
Mov a, pcon
Setb acc.7
Movpcon,a

146. Power control
register

147. Powercontrol
•A standard for applications wherepower
consumption iscritical
•two power reducingmodes
–Idle
–Powerdown

148. Idlemode
•An instruction that sets PCON.0 causes Idlemode
–Last instruction executed before going into the Idlemode
–the internal CPU clock is gatedoff
–Interrupt, Timer, and Serial Port functions actnormally.
–All of registers , ports and internal RAM maintain their data duringIdle
–ALE and PSEN hold at logic highlevels
•Any interrupt
–will cause PCON.0 to be cleared by HW (terminate Idlemode)
–then executeISR
–with RETI return and execute next instruction after Idleinstruction.
•RST signal clears the IDL bitdirectly

149. Power-DownMode
•An instruction that sets PCON.1 causes power dowmmode
•Last instruction executed before going into the powerdown
mode
•the on-chip oscillator isstopped.
•all functions are stopped,the contents of the on-chip RAM and
Special Function Registers aremaintained.
•The ALE and PSEN output are heldlow
•The reset that terminates PowerDown

150. Main:
Power controlexample
Org0000h
Ljmpmain
Org0003h
;power downmode
;Idlemode
Orlpcon,#02h
Reti
Org0030h
……
……
……
Orlpcon,#01h
end

151. …
mov a,#2
mov b,#16
mul ab
mov R0, a
mov R1,b
mov a,#12
mov b,#20
mulab
adda,R0
movR0,a
mova,R1
addca,b
movR1,a
end
Interrupts
interrupt
return
Program
Execution
ISR:in
c
mo
v
r7
a,r
7
jn
z
NEX
T
cp
l
P1.
6
NEXT
:
reti

152. InterruptSources
•Original 8051 has 5 sources ofinterrupts
–Timer 0overflow
–Timer 1overflow
–External Interrupt0
–External Interrupt1
–Serial Port events (buffer full, buffer empty,etc)
•Enhanced version has 22sources
–Moretimers,programmablecounterarray,ADC,moreexternal
interrupts, another serial port(UART)

153. InterruptProcess
If interrupt event occurs AND interrupt flag for that event is
enabled, AND interrupts are enabled,then:
1.Current PC is pushed onstack.
2.Program execution continues at the interruptvector
addressfor thatinterrupt.
3.When a RETI instruction is encountered, the PC is popped
from the stack and program execution resumes where itleft
off.

154. InterruptPriorities
•What if two interrupt sources interrupt at the
sametime?
•The interrupt with the highest PRIORITY gets
serviced first.
•All interrupts have a default priorityorder.
•Priority can also be set to “high” or“low”.

155. Interrupt SFR –InterruptEnable

157. TCONRegister
IE1: Set by CPU when H-L transition detected on external interrupt 1. Cleared when
processed.
IT1: Interrupt 1 type control. Set/cleared by software to specify falling edge/low-level
triggered.
Similarly IE0 andIT0.
42

158. InterruptPriorities
----PT
2
PSPT
1
PX
1
PT
0
PX
0
•Default priority: INT0 > TF0 > INT1 > TF1 > RI +TI
•To alter priority set IPregister
•PT2: Priority of timer 2interrupt
•PS: Priority for serial port interrupt, and soon.
•“MOV IP, #00000100B” sets INT1 to have the highestpriority
•“MOV IP, #00001100B” sets priorities as INT1 > TF1 > INT0>
TF0 > RI +TI
43

161. InterruptVectors
Each interrupt has a specific place in code memory whereprogram
execution (interrupt service routine)begins.
Reset: 0000
h
External
Interrupt
0:0003
h
Timer 0
overflow:
000B
h
External
Interrupt
1:0013
h
Timer 1
overflow:
001B
h
Serial: 0023
h
Timer 2 overflow(8052+)002bh
Note: that thereare
only 8 memory
locations between
vectors.

162. InterruptVectors
To avoid overlapping Interrupt Service routines, it is common to put
JUMP instructions at the vector address. This is similar to thereset
vector.
org000B
ljmp
EX7ISR
org
0x100
...
;a
t
; at EX7
vector
Mainprogram
; MainprogramMain:
...
EX7IS
R:
... ; Interrupt
service
routin
e
... ;Can go after
main
progra
m
reti ; and
subroutines.

163. Example Interrupt Service
Routine
Pin3.3(INT1)isconnectedtoapulsegenerator.Writeaprograminwhich
thefallingedgeofthepulsewillsendahightoP1.3,connectedtoa
LED.
org0000h
ljmpmain
; ISR for hardware interrupt INT1
org 0013h
setb p1.3
mov r3,#255
back: djnz r3,back
clr P1.3
reti
; Main program for initialization
org 30h
main: setbtcon.2 ; make INT1 edge triggered
here:
movie,#10000100B ; enableint1
sjmp here