8251 Universal Synchronous Asynchronous T.pdf

ShakeelHashmi7 14 views 9 slides Jul 07, 2024
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About This Presentation

8251 USART


Slide Content

Block Diagram
8251 has five sections:
Read/Write control logic
Data bus buffer
Modem control
Transmitter (including its
control) and
receiver (including its control)

What is the function of the Status Word Register of 8251?
Ans.The function of the status word register is to check or examine the preparedness of 8251 with regard
to transmission or reception of data.

Read/ Write Control logic
Itcontainsthreebufferregisters:
databufferregister
controlregister
statusregister
Thesixinputsignalsare:CS,C/D,WR,RD,RESETandCLK.
Theparticular8251isselectedonCSsignalgoinglow.Thispinisusuallyconnectedtoadecoded
addressbus.C/Dstandsforcontrol/datapin.Whenthispinishigh,eitherthecontrolregisterorstatus
registerisselectedandwhenlow,databusbufferisselected.

Thecontrolregisterand
thestatusregisterare
distinguishedbyWRand
RDsignals,
respectively.
Thefigurebelowshows
howthethreeregisters:
databufferregister,
controlregister
andstatusregisterare
accessedbymaking
respectively.

Transmitter Section
Thetransmittersectionconsistsofthree
blocks—transmitterbufferregister,output
registerandthetransmittercontrollogic
block.TheCPUdeposits(whenTXRDY=1,
meaningthatthetransmitterbufferregisteris
empty)dataintothetransmitterbuffer
register,whichissubsequentlyputintothe
outputregister(whenTXE=1,meaningthat
theoutputbufferisempty).Intheoutput
register,theeightbitdataisconvertedinto
serialformandcomesoutviaTXDpin.The
serialdatabitsareprecededbySTARTbit
andsucceededbySTOPbit,whichare
knownasframingbits.Butthishappensonly
if
transmitterisenabledandtheCTSislow.
TXCsignalisthetransmitterclocksignal
whichcontrolsthebitrateontheTXDline
(outputline).Thisclockfrequencycanbe1,
16or64timesthebaud.

Receiver Section
Thereceiversectionconsistsofthreeblocks—
receiverbufferregister,inputregisterandthe
receivercontrollogicblock.Serialdatafrom
outsideworldisdeliveredtotheinputregister
viaRXDline,whichissubsequentlyputinto
parallelformandplacedinthereceiverbuffer
register.Whenthisregisterisfull,theRXRDY
(receiverready)linebecomeshigh.Thislineis
thenusedeithertointerrupttheMPUorto
indicateitsownstatus.MPUthenacceptsthe
datafromtheregister.
RXClinestandsforreceiverclock.Thisclock
signalcontrolstherateatwhichbitsarereceived
bytheinputregister.Theclockcanbesetto1,
16or64timesthebaudintheasynchronous
mode.

HowdoestheCPUknowthatthetransmitterbufferisempty?
Ans.TheCPUknowsaboutthesameby
zexaminingtheTXRDYlineofthetransmitter.
zexaminingD0bitofthestatusword.
10.WhentheTxDlinegoesintotheMARKING(HIGH)state?Ans.Itbecomeshighinthefollowing
cases:
zaRESETisreceivedby8251.
ztransmitterisempty.
ztransmitterisnotenabled.
zCTSisoff.
Howthetransmitterisenabled?
Ans.ThetransmitterisenabledbysettingbitD0ofthecommand
instructionword.

Whymodems(modulators-demodulators)areusedincaseofdigitaltransmissionofdata?
Ans.Theterm‘modem’standsformodulator—demodulator.Inacommunicationenvironment,twomodems
areused—oneatthetransmittingendsideandoneatthereceivingendside.Modemsaregenerallycalled
DCE(DataCommunicationEquipment).
Highfrequencydigitalsignalsrequireaverywidetransmissionchannelbandwidthwhichmakesthesystem
verycostly.However,existingtelephonelinefacilities(whichcarryanalogsignalsintherangeof40Hzto4
KHz)canbeusedtotransmitsuchhighfrequencydigitalsignals.Amodemconvertsadigitalsignalinto
audiotonefrequencies(atthetransmittingendside)andreconvertsthisaudiofrequenciesintoh.f.digital
signals(atthereceivingendside)—anditutilisesFrequencyShiftKeying(FSK)forthispurpose.Thusa
modemconvertsalogical‘1’to1200Hzand‘0’to2200Hzaudiofrequency.Thesesignalsarethen
transmittedoveratelephonelineovera‘carrier’.Theinverseoperationisdoneatthereceivingendside.

Draw the block diagram of a DTE-DCE interface in a communication environment.
Digital data is delivered at the
DTE (may be 8251) in parallel
form, which is then converted into
serial form and sent to DCE via
RS-232 cable. The DCE (a
modem) output is an audio signal
carried through a telephone line.
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