AHL50 ABL52 LA-C701P REV 1.0.pdf
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About This Presentation
Schematic A4 Asus Laptop
Slide Content
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Intel ULV Processor with DDRIIIL
Broadwell M/B Schematics Document
Compal Confidential
Date : 2015/01/31
Version 0.3
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Cover Page
B
161
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Cover Page
B
161
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Cover Page
B
161
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Intel ULV Processor with DDRIIIL
Broadwell M/B Schematics Document
Compal Confidential
Date : 2015/01/31
Version 0.3
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Cover Page
B
161
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Cover Page
B
161
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Cover Page
B
161
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Model Name : Broadwell
File Name : AHL50 / ABL52 LA-C701P
Compal Confidential
Ultra Light & Thin
(BDW ULT)
DDR3L 1600MHz 1.35V
Dual Channel
DDR3L-SO-DIMM X 2
SATA 3.0
USB3.0 port USB2.0 port Camera
Port 0 Port 1
USB2.0
Port 3
USB3.0
Port 0
Broadwell
SPI
ENE KB9022
Int.KBD
Touch Pad Lid switch
SPI ROM 8M
Port 0 Port 1
HDMI Conn
HDMI
DDPB port
2.5" SATA HDD ODD
Port 2
FAN
LAN 8166EH
1168P BGA
PCI-E
WLAN(MiniPCIe slot)
P31
SMBUS
USB2.0 Port
eDPx1
eDP to LVDS Transmitter RTD2132N
LVDS panel
Card reader RTS5141
Lane 5
PS2
HDA
Combo Jack
HDA Aduio codec ALC3227
AMD EXO-Pro M330 18W
PCI-Ex4
VRAM DDR3 X4
PCI-E USB2.0
Port 3
(Reserved)
Lane 7-Lane10
Lane 11
Port 3
Internal SPK
24MHz
LPC 33MHz
PCIe 1.0:2.5Gb/s PCIe 2.0:5Gb/s
GEN1 1.5Gb/s GEN2 3Gb/s GEN3 6Gb/s
2.7Gb/s
PCIe 2.0:5Gb/s PCIe 3.0:8Gb/s
297MHz
PCIe 1.0:2.5Gb/s PCIe 2.0:5Gb/s
480Mb/s5Gb/s
1MHz
480Mb/s
50MHz
P41~P42 P36~P40
P18
P19
P20
P24
P22
P15~16
P29 P29 P30 P30 P34 P31
P23
P25
P7
WLAN
Port 4
DDIx2
CRT Conn
P21
P21
TPM
P27
SLB 9665
Touch Screen
Port 5
P19 P19
P26
Port 6
DP to VGA Transmitter RTD2168
P37
Thermal sensor NCT7718
eDPx1 2.7Gb/s
eDP panel
FHD
P26
P33
On small board
eDP@eDP@
LVDS@
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Block Diagrams
Custom
261
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Block Diagrams
Custom
261
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Block Diagrams
Custom
261
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Model Name : Broadwell
File Name : AHL50 / ABL52 LA-C701P
Compal Confidential
Ultra Light & Thin
(BDW ULT)
DDR3L 1600MHz 1.35V
Dual Channel
DDR3L-SO-DIMM X 2
SATA 3.0
USB3.0 port USB2.0 port Camera
Port 0 Port 1
USB2.0
Port 3
USB3.0
Port 0
Broadwell
SPI
ENE KB9022
Int.KBD
Touch Pad Lid switch
SPI ROM 8M
Port 0 Port 1
HDMI Conn
HDMI
DDPB port
2.5" SATA HDD ODD
Port 2
FAN
LAN 8166EH
1168P BGA
PCI-E
WLAN(MiniPCIe slot)
P31
SMBUS
USB2.0 Port
eDPx1
eDP to LVDS Transmitter RTD2132N
LVDS panel
Card reader RTS5141
Lane 5
PS2
HDA
Combo Jack
HDA Aduio codec ALC3227
AMD EXO-Pro M330 18W
PCI-Ex4
VRAM DDR3 X4
PCI-E USB2.0
Port 3
(Reserved)
Lane 7-Lane10
Lane 11
Port 3
Internal SPK
24MHz
LPC 33MHz
PCIe 1.0:2.5Gb/s PCIe 2.0:5Gb/s
GEN1 1.5Gb/s GEN2 3Gb/s GEN3 6Gb/s
2.7Gb/s
PCIe 2.0:5Gb/s PCIe 3.0:8Gb/s
297MHz
PCIe 1.0:2.5Gb/s PCIe 2.0:5Gb/s
480Mb/s5Gb/s
1MHz
480Mb/s
50MHz
P41~P42 P36~P40
P18
P19
P20
P24
P22
P15~16
P29 P29 P30 P30 P34 P31
P23
P25
P7
WLAN
Port 4
DDIx2
CRT Conn
P21
P21
TPM
P27
SLB 9665
Touch Screen
Port 5
P19 P19
P26
Port 6
DP to VGA Transmitter RTD2168
P37
Thermal sensor NCT7718
eDPx1 2.7Gb/s
eDP panel
FHD
P26
P33
On small board
eDP@eDP@
LVDS@
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Block Diagrams
Custom
261
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Block Diagrams
Custom
261
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
Block Diagrams
Custom
261
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
R=2.2K
+3VALW_EC
EC_SMB_CK1 EC_SMB_DA1
BAT
SMBCLK SMBDATA
2N7002
R=2.2K
+3V_PCH
R=10K+3VS
PCH_SMBCLK PCH_SMBDATA
SO-DIMM 0 SO-DIMM 1
SML0CLK SML0DATA
R=1K
+3V_PCH
2N7002
R=2.2K
+3V_PCH
R=2.2K+3VS
Charger
SML1CLK SML1DATA
EC_SMB_CK2 EC_SMB_DA2
R=100
EC_SMB_CK2 EC_SMB_DA2
CPU
EC
AP2 AH1 AN1 AK1 AU3 AH3
77 7879 80
UK1:+3VALW_EC
UCPU1
@ is NO SMT part (empty)
PM_SLP_S5#/PM_SLP_S4# X
X
X
X
+3V_PCHVINPower rail
SUSP#
XSource (CPU)
X SUSP#
+0.6V_0.675VS
X
X
PM_SLP_S3#
+3VALW_EC +3VALW
SUSP#
+5VS
X
SUSP#
VR12.5_VR_ONX
EC_ON
+1.05VS+3VL +3VS
PCH_PWR_EN
+RTCVCC +5VALW
X
B+
SYSON
PM_SLP_S3#
+VCC_CORE
PM_SLP_S3#X
X
+1.5VS+VL
EC_ON
BATT+
SUSP#
X
XX
PM_SLP_S3#X
Control (EC) EC_ON
+1.35V_VDDQ
RF@ : RF team request, must add. EMI@ : EMI team request, must add. ESD@ : ESD team request, must add. LVDS@ : Support LVDS panel. @EMI@,@ESD@,@RF@ : Reserve , don't pop.
DIS@ : for AMD EXO
<USB2.0 port>
USB2.0 port
DESTINATION
0 1
USB 2.0/3.0(left side) USB 2.0(right side)
UMA Dis
USB 2.0/3.0(left side)
USB 2.0(left side) WLAN/BT
2 3
Camera
4 5 6 7
Touch screen
X
USB 2.0(left side) USB 2.0(right side) WLAN/BT Camera
X
eDP to LVDS bridge RTD2132R
+3VS_RT
Touch screen
GCLK@ : Support GCLK GCLKUMA@ : UMA GCLKDIS@: DIS
eDP@ : Support eDP panel
2N7002
+3VS_VGA
R=2.2K
GPU
XDP Thermal Sensor for GPU
Card reader Card reader
DP to VGA RTD2168
+3VS_CRT
USB3.0
0
<PCI-E,SATA,USB3.0>
USB3.0
Dis
DESTINATION
Lane#
1
USB3.0
UMA HDDDESTINATION
Dis
SATA
01
Lane#
UMA ODD
ODDHDD
Dis
PCIE
0
WLAN
Lane#
DESTINATION UMA
LAN
12
LAN
WLAN
3
Dis
PEG
0
Lane#
DESTINATION UMA
1
GPU
32
2
PR2 PR2
RC72 RC73
QC2
RC78 RC79
QC6
VGA_SMB_CK3 VGA_SMB_DA3
DIS@ Q2416
DIS@ R327 R328
+3VS_VGA
CIICSCL1 CIICSDA1
R=0R=0
RTD2168_SMB_SCL RTD2168_SMB_SDA
@ 0 ohm
@ 0 ohm
Touch Pad
TP_SMBCLK TP_SMBDATA
+3V_PCH 2N7002
R=2.2K+3VS
QC7
Dis
Lane#
PCIE REQ
UMADESTINATION
0123
GPU
LAN
LAN
WLAN
WLAN
45
PU
PU
PU
PU
X
X
X
XTAL@ : for HSW SMT in DB phase only TP@ : TP SMBus
Board ID control
15K ohm
RK4
SI
DB
MV
PV
RK4UMA15"
0 ohm
43K ohm
27K ohm
DIS
12k ohm
56k ohm
33k ohm
20k ohm
SPI@ : SPI ROM request
UMA@ : for UMA only 8111@ : for LAN giga 8166@ : for LAN 10/100
83 84
2N7002
Thermal Sensor for CPU
EC_SMB_CK3 EC_SMB_DA3
R=10K
R=2.2K
+3VS_VGA
+3VS
Thermal Sensor
CPU internal : PECI protocal PCH internal : 0x90 GPU internal : 0x82 CPU external : 0x98 GPU external : 0x98
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Notes List
Custom
361
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Notes List
Custom
361
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Notes List
Custom
361
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
B B
C C
D D
E E
1
1
2
2
3
3
4
4
R=2.2K
+3VALW_EC
EC_SMB_CK1 EC_SMB_DA1
BAT
SMBCLK SMBDATA
2N7002
R=2.2K
+3V_PCH
R=10K+3VS
PCH_SMBCLK PCH_SMBDATA
SO-DIMM 0 SO-DIMM 1
SML0CLK SML0DATA
R=1K
+3V_PCH
2N7002
R=2.2K
+3V_PCH
R=2.2K+3VS
Charger
SML1CLK SML1DATA
EC_SMB_CK2 EC_SMB_DA2
R=100
EC_SMB_CK2 EC_SMB_DA2
CPU
EC
AP2 AH1 AN1 AK1 AU3 AH3
77 7879 80
UK1:+3VALW_EC
UCPU1
@ is NO SMT part (empty)
PM_SLP_S5#/PM_SLP_S4# X
X
X
X
+3V_PCHVINPower rail
SUSP#
XSource (CPU)
X SUSP#
+0.6V_0.675VS
X
X
PM_SLP_S3#
+3VALW_EC +3VALW
SUSP#
+5VS
X
SUSP#
VR12.5_VR_ONX
EC_ON
+1.05VS+3VL +3VS
PCH_PWR_EN
+RTCVCC +5VALW
X
B+
SYSON
PM_SLP_S3#
+VCC_CORE
PM_SLP_S3#X
X
+1.5VS+VL
EC_ON
BATT+
SUSP#
X
XX
PM_SLP_S3#X
Control (EC) EC_ON
+1.35V_VDDQ
RF@ : RF team request, must add. EMI@ : EMI team request, must add. ESD@ : ESD team request, must add. LVDS@ : Support LVDS panel. @EMI@,@ESD@,@RF@ : Reserve , don't pop.
DIS@ : for AMD EXO
<USB2.0 port>
USB2.0 port
DESTINATION
0 1
USB 2.0/3.0(left side) USB 2.0(right side)
UMA Dis
USB 2.0/3.0(left side)
USB 2.0(left side) WLAN/BT
2 3
Camera
4 5 6 7
Touch screen
X
USB 2.0(left side) USB 2.0(right side) WLAN/BT Camera
X
eDP to LVDS bridge RTD2132R
+3VS_RT
Touch screen
GCLK@ : Support GCLK GCLKUMA@ : UMA GCLKDIS@: DIS
eDP@ : Support eDP panel
2N7002
+3VS_VGA
R=2.2K
GPU
XDP Thermal Sensor for GPU
Card reader Card reader
DP to VGA RTD2168
+3VS_CRT
USB3.0
0
<PCI-E,SATA,USB3.0>
USB3.0
Dis
DESTINATION
Lane#
1
USB3.0
UMA HDDDESTINATION
Dis
SATA
01
Lane#
UMA ODD
ODDHDD
Dis
PCIE
0
WLAN
Lane#
DESTINATION UMA
LAN
12
LAN
WLAN
3
Dis
PEG
0
Lane#
DESTINATION UMA
1
GPU
32
2
PR2 PR2
RC72 RC73
QC2
RC78 RC79
QC6
VGA_SMB_CK3 VGA_SMB_DA3
DIS@ Q2416
DIS@ R327 R328
+3VS_VGA
CIICSCL1 CIICSDA1
R=0R=0
RTD2168_SMB_SCL RTD2168_SMB_SDA
@ 0 ohm
@ 0 ohm
Touch Pad
TP_SMBCLK TP_SMBDATA
+3V_PCH 2N7002
R=2.2K+3VS
QC7
Dis
Lane#
PCIE REQ
UMADESTINATION
0123
GPU
LAN
LAN
WLAN
WLAN
45
PU
PU
PU
PU
X
X
X
XTAL@ : for HSW SMT in DB phase only TP@ : TP SMBus
Board ID control
15K ohm
RK4
SI
DB
MV
PV
RK4UMA15"
0 ohm
43K ohm
27K ohm
DIS
12k ohm
56k ohm
33k ohm
20k ohm
SPI@ : SPI ROM request
UMA@ : for UMA only 8111@ : for LAN giga 8166@ : for LAN 10/100
83 84
2N7002
Thermal Sensor for CPU
EC_SMB_CK3 EC_SMB_DA3
R=10K
R=2.2K
+3VS_VGA
+3VS
Thermal Sensor
CPU internal : PECI protocal PCH internal : 0x90 GPU internal : 0x82 CPU external : 0x98 GPU external : 0x98
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Notes List
Custom
361
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Notes List
Custom
361
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Notes List
Custom
361
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LA-8661PCompal Electronics, Inc.
<HDMI>
<eDP>
DDR3 COMPENSATION SIGNALS Layout notes DG V0.5 Trace width=12~15 mil Max length=500mil
L
COMPENSATION PU FOR eDP
<eDP>
Layout notes DG V0.9 PEG_COMP Trace width=20mil and spacing=25mil Max length=100mil
L
<DP TO CRT>
remove BKL_PWM_CPU 20141113
DB phase For XDP 20151112
DB phase : add eDP Lan1 for FHD 20141117
SI : pop CC88
SI : pop CC99
SI : pop C295
DDR3_DRAMRST#
XDP_TCK XDP_TDO_CPU XDP_TRST#_CPU XDP_TMS_CPU XDP_TDI_CPUXDP_PRDY# XDP_PREQ#
PROC_DETECT#
XDP_TRST#_CPU
XDP_OBS3_R XDP_OBS5_RXDP_OBS2_R XDP_OBS4_R XDP_OBS6_R XDP_OBS7_R
DDR3_DRAMRST#
XDP_TDI_CPU XDP_PREQ#
SM_RCOMP2SM_RCOMP0 SM_RCOMP1
DDR_PG_CNTL
EDP_COMP
EDP_COMP
PROCHOT#
DDR_PG_CNTL
H_PROCHOT#_R
H_CPUPWRGD_R
SM_RCOMP1 SM_RCOMP2 SM_RCOMP0
H_CPUPWRGD_R
+1.05VS_VCCST
<11,6,9>
+1.35V_VDDQ
<11,15,16,17,34,49>
+3V_PCH
<10,11,12,24,36,6,7,9>
+VCCIOA_OUT
<11>
+VCCIO_OUT
<11,6>
PCH_DPC_P1
<21>
PCH_DPC_N1
<21>
PCH_DPC_P0
<21>
PCH_DPC_N0
<21>
XDP_TDI_CPU <6> XDP_TDO_CPU <6> XDP_TMS_CPU <6>
XDP_TRST#_CPU <6>
PCH_DPB_N3
<20>
PCH_DPB_P3
<20>
XDP_TCK <6>
+1.05VS_PG
<11,6>
DDR3_DRAMRST# <15,16>
PCH_DPB_N0
<20>
PCH_DPB_P0
<20>
PCH_DPB_N2
<20>
PCH_DPB_P2
<20>
PCH_DPB_N1
<20>
PCH_DPB_P1
<20>
EDP_CPU_LANE_N0_C <18> EDP_CPU_LANE_P0_C <18> EDP_CPU_AUX#_C <18> EDP_CPU_AUX_C <18>
SM_PG_CTRL
<15,49>
H_PECI
<25>
PROCHOT#
<25>
H_CPUPWRGD_R
<6>
XDP_PRDY# <6> XDP_PREQ# <6>
XDP_OBS0_R <6> XDP_OBS1_R <6>
EDP_CPU_LANE_N1_C <18> EDP_CPU_LANE_P1_C <18>
+1.05VS_VCCST +1.35V_VDDQ +3V_PCH +VCCIOA_OUT +VCCIO_OUT
+1.35V_VDDQ
+1.05VS_VCCST
+VCCIOA_OUT
+1.35V_VDDQ
+VCCIO_OUT
+3V_PCH
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDI,MSIC,XDP
C
461
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDI,MSIC,XDP
C
461
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDI,MSIC,XDP
C
461
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
BDW_ULT_DDR3L(Interleaved)
EDP
DDI
1 OF 19
UCPU1A BDW-ULT-DDR3L-IL_BGA1168
SA011306191
BDW_ULT_DDR3L(Interleaved)
EDP
DDI
1 OF 19
UCPU1A BDW-ULT-DDR3L-IL_BGA1168
SA011306191
DDI1_TXN0
C54
DDI1_TXP0
C55
DDI1_TXN1
B58
DDI1_TXP1
C58
DDI1_TXN2
B55
DDI1_TXP2
A55
DDI1_TXN3
A57
EDP_T XP0
B46
EDP_T XN0
C45
EDP_T XN1
A47
EDP_T XP1
B47
EDP_T XN2
C47
EDP_T XP2
C46
EDP_T XN3
A49
EDP_T XP3
B49
EDP_AUXP
B45
EDP_AUXN
A45
DDI1_TXP3
B57
DDI2_TXP1
B54
DDI2_TXP0
C50
DDI2_TXN0
C51
DDI2_TXN1
C53
DDI2_TXN2
C49
DDI2_TXP2
B50
DDI2_TXN3
A53
DDI2_TXP3
B53
EDP_RCOMP
D20
EDP_DISP_UT IL
A43
RC308 470_0402_5% RC308 470_0402_5%
1 2
RC19
120_0402_1%
RC19
120_0402_1%
1
2
UC10
74AUP1G07GW_TSSOP5
SA00004BV00UC10
74AUP1G07GW_TSSOP5
SA00004BV00
GND
3
A
2
NC
1
VCC
5
Y
4
RC13 51_0402_1%
@
RC13 51_0402_1%
@
1
2
T51
PAD
@
T51
PAD
@
CC88 0.1U_0402_16V7K
ESD@
CC88 0.1U_0402_16V7K
ESD@
1 2
C295
10P_0402_50V8J
ESD@
C295
10P_0402_50V8J
ESD@
1 2
RC7
1K_0402_1%
@
RC7
1K_0402_1%
@
1
2
RC3
24.9_0402_1%
RC3
24.9_0402_1%
1
2
T57 PAD
@
T57 PAD
@
T55 PAD
@
T55 PAD
@
CC99 0.1U_0402_16V7K
ESD@
CC99 0.1U_0402_16V7K
ESD@
1 2
DDR3L
BDW_ULT_DDR3L(Interleaved)
MISC
THERMAL
PWR
JTAG
2 OF 19
UCPU1B BDW- ULT- DDR3L- I L_BG A1168
SA011306191
DDR3L
BDW_ULT_DDR3L(Interleaved)
MISC
THERMAL
PWR
JTAG
2 OF 19
UCPU1B BDW- ULT- DDR3L- I L_BG A1168
SA011306191
BPM#4
K59
BPM#5
H63
BPM#6
K60
SM_RCOMP0
AU60
BPM#7
J61
BPM#3
H62
BPM#1
H60
BPM#2
H61
BPM#0
J60
PROC_T DO
F62
PROC_T DI
F63
PROC_T MS
E61
PECI
N62
CATERR
K61
PROCPW RGD
C61
PROCHOT
K63
PROC_T RST
E59
PROC_T CK
E60
PRDY
J62
PREQ
K62
SM_PG_CNT L1
AV61
SM_DRAMRST
AV15
SM_RCOMP2
AU61
SM_RCOMP1
AV60
PROC_DET ECT
D61
T54 PAD
@
T54 PAD
@
T56 PAD
@
T56 PAD
@
RC20
100_0402_1%
RC20
100_0402_1%
1
2
RC6 56_0402_5% RC6 56_0402_5%
1
2
T53 PAD
@
T53 PAD
@
RC18
200_0402_1%
RC18
200_0402_1%
1
2
T52 PAD
@
T52 PAD
@
RC234 10K_0402_5% RC234 10K_0402_5%
1 2
RC4
62_0402_5%
RC4
62_0402_5%
1 2
RC11 10K_0402_5% RC11 10K_0402_5%
1
2
RC12 51_0402_1%
@
RC12 51_0402_1%
@
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LA-8661PCompal Electronics, Inc.
<HDMI>
<eDP>
DDR3 COMPENSATION SIGNALS Layout notes DG V0.5 Trace width=12~15 mil Max length=500mil
L
COMPENSATION PU FOR eDP
<eDP>
Layout notes DG V0.9 PEG_COMP Trace width=20mil and spacing=25mil Max length=100mil
L
<DP TO CRT>
remove BKL_PWM_CPU 20141113
DB phase For XDP 20151112
DB phase : add eDP Lan1 for FHD 20141117
SI : pop CC88
SI : pop CC99
SI : pop C295
DDR3_DRAMRST#
XDP_TCK XDP_TDO_CPU XDP_TRST#_CPU XDP_TMS_CPU XDP_TDI_CPUXDP_PRDY# XDP_PREQ#
PROC_DETECT#
XDP_TRST#_CPU
XDP_OBS3_R XDP_OBS5_RXDP_OBS2_R XDP_OBS4_R XDP_OBS6_R XDP_OBS7_R
DDR3_DRAMRST#
XDP_TDI_CPU XDP_PREQ#
SM_RCOMP2SM_RCOMP0 SM_RCOMP1
DDR_PG_CNTL
EDP_COMP
EDP_COMP
PROCHOT#
DDR_PG_CNTL
H_PROCHOT#_R
H_CPUPWRGD_R
SM_RCOMP1 SM_RCOMP2 SM_RCOMP0
H_CPUPWRGD_R
+1.05VS_VCCST
<11,6,9>
+1.35V_VDDQ
<11,15,16,17,34,49>
+3V_PCH
<10,11,12,24,36,6,7,9>
+VCCIOA_OUT
<11>
+VCCIO_OUT
<11,6>
PCH_DPC_P1
<21>
PCH_DPC_N1
<21>
PCH_DPC_P0
<21>
PCH_DPC_N0
<21>
XDP_TDI_CPU <6> XDP_TDO_CPU <6> XDP_TMS_CPU <6>
XDP_TRST#_CPU <6>
PCH_DPB_N3
<20>
PCH_DPB_P3
<20>
XDP_TCK <6>
+1.05VS_PG
<11,6>
DDR3_DRAMRST# <15,16>
PCH_DPB_N0
<20>
PCH_DPB_P0
<20>
PCH_DPB_N2
<20>
PCH_DPB_P2
<20>
PCH_DPB_N1
<20>
PCH_DPB_P1
<20>
EDP_CPU_LANE_N0_C <18> EDP_CPU_LANE_P0_C <18> EDP_CPU_AUX#_C <18> EDP_CPU_AUX_C <18>
SM_PG_CTRL
<15,49>
H_PECI
<25>
PROCHOT#
<25>
H_CPUPWRGD_R
<6>
XDP_PRDY# <6> XDP_PREQ# <6>
XDP_OBS0_R <6> XDP_OBS1_R <6>
EDP_CPU_LANE_N1_C <18> EDP_CPU_LANE_P1_C <18>
+1.05VS_VCCST +1.35V_VDDQ +3V_PCH +VCCIOA_OUT +VCCIO_OUT
+1.35V_VDDQ
+1.05VS_VCCST
+VCCIOA_OUT
+1.35V_VDDQ
+VCCIO_OUT
+3V_PCH
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDI,MSIC,XDP
C
461
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDI,MSIC,XDP
C
461
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDI,MSIC,XDP
C
461
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
BDW_ULT_DDR3L(Interleaved)
EDP
DDI
1 OF 19
UCPU1A BDW-ULT-DDR3L-IL_BGA1168
SA011306191
BDW_ULT_DDR3L(Interleaved)
EDP
DDI
1 OF 19
UCPU1A BDW-ULT-DDR3L-IL_BGA1168
SA011306191
DDI1_TXN0
C54
DDI1_TXP0
C55
DDI1_TXN1
B58
DDI1_TXP1
C58
DDI1_TXN2
B55
DDI1_TXP2
A55
DDI1_TXN3
A57
EDP_T XP0
B46
EDP_T XN0
C45
EDP_T XN1
A47
EDP_T XP1
B47
EDP_T XN2
C47
EDP_T XP2
C46
EDP_T XN3
A49
EDP_T XP3
B49
EDP_AUXP
B45
EDP_AUXN
A45
DDI1_TXP3
B57
DDI2_TXP1
B54
DDI2_TXP0
C50
DDI2_TXN0
C51
DDI2_TXN1
C53
DDI2_TXN2
C49
DDI2_TXP2
B50
DDI2_TXN3
A53
DDI2_TXP3
B53
EDP_RCOMP
D20
EDP_DISP_UT IL
A43
RC308 470_0402_5% RC308 470_0402_5%
1 2
RC19
120_0402_1%
RC19
120_0402_1%
1
2
UC10
74AUP1G07GW_TSSOP5
SA00004BV00UC10
74AUP1G07GW_TSSOP5
SA00004BV00
GND
3
A
2
NC
1
VCC
5
Y
4
RC13 51_0402_1%
@
RC13 51_0402_1%
@
1
2
T51
PAD
@
T51
PAD
@
CC88 0.1U_0402_16V7K
ESD@
CC88 0.1U_0402_16V7K
ESD@
1 2
C295
10P_0402_50V8J
ESD@
C295
10P_0402_50V8J
ESD@
1 2
RC7
1K_0402_1%
@
RC7
1K_0402_1%
@
1
2
RC3
24.9_0402_1%
RC3
24.9_0402_1%
1
2
T57 PAD
@
T57 PAD
@
T55 PAD
@
T55 PAD
@
CC99 0.1U_0402_16V7K
ESD@
CC99 0.1U_0402_16V7K
ESD@
1 2
DDR3L
BDW_ULT_DDR3L(Interleaved)
MISC
THERMAL
PWR
JTAG
2 OF 19
UCPU1B BDW- ULT- DDR3L- I L_BG A1168
SA011306191
DDR3L
BDW_ULT_DDR3L(Interleaved)
MISC
THERMAL
PWR
JTAG
2 OF 19
UCPU1B BDW- ULT- DDR3L- I L_BG A1168
SA011306191
BPM#4
K59
BPM#5
H63
BPM#6
K60
SM_RCOMP0
AU60
BPM#7
J61
BPM#3
H62
BPM#1
H60
BPM#2
H61
BPM#0
J60
PROC_T DO
F62
PROC_T DI
F63
PROC_T MS
E61
PECI
N62
CATERR
K61
PROCPW RGD
C61
PROCHOT
K63
PROC_T RST
E59
PROC_T CK
E60
PRDY
J62
PREQ
K62
SM_PG_CNT L1
AV61
SM_DRAMRST
AV15
SM_RCOMP2
AU61
SM_RCOMP1
AV60
PROC_DET ECT
D61
T54 PAD
@
T54 PAD
@
T56 PAD
@
T56 PAD
@
RC20
100_0402_1%
RC20
100_0402_1%
1
2
RC6 56_0402_5% RC6 56_0402_5%
1
2
T53 PAD
@
T53 PAD
@
RC18
200_0402_1%
RC18
200_0402_1%
1
2
T52 PAD
@
T52 PAD
@
RC234 10K_0402_5% RC234 10K_0402_5%
1 2
RC4
62_0402_5%
RC4
62_0402_5%
1 2
RC11 10K_0402_5% RC11 10K_0402_5%
1
2
RC12 51_0402_1%
@
RC12 51_0402_1%
@
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
<DDR3L>
<DDR3L>
Interleaved Memory
DDR_A_D63 DDR_A_D62DDR_A_D8DDR_A_D3 DDR_A_D4 DDR_A_D7DDR_A_D5 DDR_A_D6 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56DDR_A_D47 DDR_A_D46DDR_A_D42 DDR_A_D43DDR_A_D34 DDR_A_D39 DDR_A_D44 DDR_A_D45DDR_A_D35 DDR_A_D41 DDR_A_D40 DDR_A_D38 DDR_A_D36 DDR_A_D37DDR_A_D32 DDR_A_D33 DDR_A_D61 DDR_A_D60DDR_A_D2 DDR_A_D1 DDR_A_D0 DDR_A_D55 DDR_A_D54DDR_A_D51DDR_A_D48 DDR_A_D50 DDR_A_D49 DDR_A_D52 DDR_A_D53DDR_A_D31DDR_A_D14 DDR_A_D15 DDR_A_D25 DDR_A_D24 DDR_A_D26 DDR_A_D27 DDR_A_D30DDR_A_D9 DDR_A_D13 DDR_A_D12 DDR_A_D10 DDR_A_D11 DDR_A_D29 DDR_A_D28DDR_A_D19 DDR_A_D20DDR_A_D16 DDR_A_D21DDR_A_D17 DDR_A_D22DDR_A_D18 DDR_A_D23
DDR_A_DQS#7DDR_A_DQS#0 DDR_A_DQS#2 DDR_A_DQS#5 DDR_A_DQS#3 DDR_A_DQS#1 DDR_A_DQS#4 DDR_A_DQS#6 DDR_A_DQS0 DDR_A_DQS2 DDR_A_DQS1 DDR_A_DQS6 DDR_A_DQS5 DDR_A_DQS4 DDR_A_DQS3 DDR_A_DQS7
DDR_B_D33 DDR_B_D42DDR_B_D14 DDR_B_D55DDR_B_D43 DDR_B_D63DDR_B_D59DDR_B_D34DDR_B_D24 DDR_B_D29 DDR_B_D53DDR_B_D10 DDR_B_D13 DDR_B_D26DDR_B_D4 DDR_B_D44 DDR_B_D57DDR_B_D11 DDR_B_D21DDR_B_D3 DDR_B_D46DDR_B_D7DDR_B_D0 DDR_B_D35DDR_B_D30DDR_B_D27DDR_B_D15 DDR_B_D25 DDR_B_D23 DDR_B_D49DDR_B_D40DDR_B_D36 DDR_B_D48DDR_B_D37DDR_B_D19DDR_B_D9 DDR_B_D47DDR_B_D8 DDR_B_D18 DDR_B_D52 DDR_B_D62DDR_B_D50 DDR_B_D60DDR_B_D39 DDR_B_D56DDR_B_D51DDR_B_D2 DDR_B_D45DDR_B_D6 DDR_B_D28DDR_B_D22 DDR_B_D31 DDR_B_D61DDR_B_D58DDR_B_D17DDR_B_D5 DDR_B_D41DDR_B_D1 DDR_B_D54DDR_B_D32 DDR_B_D38DDR_B_D20DDR_B_D12 DDR_B_D16
DDR_B_DQS#1 DDR_B_DQS#7 DDR_B_DQS#5 DDR_B_DQS#4DDR_B_DQS#0 DDR_B_DQS#3 DDR_B_DQS#6DDR_B_DQS#2 DDR_B_DQS7DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS5 DDR_B_DQS4 DDR_B_DQS3 DDR_B_DQS2 DDR_B_DQS6
DDR_A_MA15DDR_A_MA0 DDR_A_MA14DDR_A_MA5 DDR_A_MA4DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA9 DDR_A_MA7 DDR_A_MA6 DDR_A_MA12 DDR_A_MA13DDR_A_MA8 DDR_A_MA11 DDR_A_MA10
DDR_B_MA15DDR_B_MA7DDR_B_MA0 DDR_B_MA9DDR_B_MA2 DDR_B_MA13DDR_B_MA4 DDR_B_MA11 DDR_B_MA10DDR_B_MA5 DDR_B_MA8 DDR_B_MA6DDR_B_MA3 DDR_B_MA12DDR_B_MA1 DDR_B_MA14
DDR_A_D[0..63]
<15>
DDR_A_DQS#[0..7] <15> DDR_A_DQS[0..7] <15>
DDR_B_D[0..63]
<16>
DDR_B_DQS#[0..7] <16> DDR_B_DQS[0..7] <16>
DDR_A_BS0 <15> DDR_A_BS1 <15> DDR_A_BS2 <15>
DDR_A_RAS# <15> DDR_A_CAS# <15>
DDR_A_W E# <15>
DDR_A_MA[0..15] <15>
DDR_CS0_DIMMA# <15> DDR_CS1_DIMMA# <15> DDR_CKE0_DIMMA <15> DDR_CKE1_DIMMA <15> M_CLK_DDR#0 <15> M_CLK_DDR0 <15> M_CLK_DDR#1 <15> M_CLK_DDR1 <15>
DDR_B_MA[0..15] <16>
DDR_CS0_DIMMB# <16> DDR_CS1_DIMMB# <16> DDR_CKE0_DIMMB <16> DDR_CKE1_DIMMB <16> M_CLK_DDR2 <16> M_CLK_DDR#2 <16> M_CLK_DDR#3 <16> M_CLK_DDR3 <16>
DDR_B_RAS# <16>
DDR_B_BS0 <16> DDR_B_BS1 <16> DDR_B_BS2 <16>
DDR_B_CAS# <16>
DDR_B_W E# <16>
+V_SM_VREF_CNT
<17>
+V_DDR_REFA_R
<17>
+V_DDR_REFB_R
<17>
+V_DDR_REFA_R +V_DDR_REFB_R +V_SM_VREF_CNT
+V_SM_VREF_CNT +V_DDR_REFA_R +V_DDR_REFB_R
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDRIII
Custom
561
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDRIII
Custom
561
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDRIII
Custom
561
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL B
4 OF 19
UCPU1D BDW -ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL B
4 OF 19
UCPU1D BDW -ULT-DDR3L-IL_BGA1168
SB_DQ14
AR54
SB_DQSN5
AN25
SB_DQSN7
AN18
SB_DQSP4
AM28
SB_DQSP5
AM25
SB_DQSP6
AM21
SB_DQSP3
AL49
SB_DQSP7
AM18
SB_DQSP2
AL42
SB_DQSP0
AN58
SB_DQSP1
AN55
SB_DQSN6
AN21
SB_DQSN2
AL43
SB_DQSN3
AL48
SB_DQSN4
AN28
SB_DQSN1
AM55
SB_DQSN0
AM58
SB_MA14
AR46
SB_MA15
AP46
SB_MA13
AK33
SB_MA9
AU46
SB_MA10
AK36
SB_MA11
AV47
SB_MA8
AY47
SB_MA12
AU47
SB_MA4
AR45
SB_MA5
AP45
SB_MA6
AW 46
SB_MA3
AR42
SB_MA7
AY46
SB_MA2
AP42
SB_MA0
AP40
SB_MA1
AR40
SB_BA2
AU49
SB_W E
AK35
SB_CAS
AM33
SB_BA0
AL35
SB_BA1
AM36
SB_RAS
AM35
SB_CS#1
AK32
SB_ODT0
AL32
SB_CS#0
AM32
SB_CKE1
AU50
SB_CKE2
AW 49
SB_CKE3
AV50
SB_CKE0
AY49
SB_CK#1
AK38
SB_CK1
AL38
SB_CK0
AN38
SB_CK#0
AM38
SB_DQ61
AM20
SB_DQ63
AP18
SB_DQ62
AR18
SB_DQ57
AR20
SB_DQ56
AN20
SB_DQ58
AK18
SB_DQ59
AL18
SB_DQ60
AK20
SB_DQ51
AM22
SB_DQ52
AN22
SB_DQ53
AP21
SB_DQ54
AK21
SB_DQ55
AK22
SB_DQ46
AK25
SB_DQ47
AL25
SB_DQ48
AR21
SB_DQ49
AR22
SB_DQ50
AL21
SB_DQ45
AM26
SB_DQ41
AR26
SB_DQ42
AR25
SB_DQ43
AP25
SB_DQ44
AK26
SB_DQ40
AN26
SB_DQ36
AR29
SB_DQ37
AN29
SB_DQ38
AR28
SB_DQ39
AP28
SB_DQ35
AK28
SB_DQ31
AK51
SB_DQ32
AM29
SB_DQ33
AK29
SB_DQ30
AM51
SB_DQ34
AL28
SB_DQ26
AM49
SB_DQ25
AK46
SB_DQ27
AK49
SB_DQ28
AM48
SB_DQ29
AK48
SB_DQ20
AK45
SB_DQ21
AK43
SB_DQ22
AM40
SB_DQ23
AM42
SB_DQ24
AM46
SB_DQ15
AN54
SB_DQ16
AK40
SB_DQ17
AK42
SB_DQ18
AM43
SB_DQ19
AM45
SB_DQ10
AM54
SB_DQ11
AK54
SB_DQ13
AK55
SB_DQ5
AK58
SB_DQ7
AN57
SB_DQ8
AP55
SB_DQ9
AR55
SB_DQ0
AP58
SB_DQ1
AR58
SB_DQ2
AM57
SB_DQ3
AK57
SB_DQ4
AL58
SB_DQ12
AL55
SB_DQ6
AR57
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL A
3 OF 19
UCPU1C BDW -ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL A
3 OF 19
UCPU1C BDW -ULT-DDR3L-IL_BGA1168
SM_VREF_DQ0
AR51
SM_VREF_DQ1
AP51
SM_VREF_CA
AP49
SA_DQSP7
AW 18
SA_DQSP5
AW 26
SA_DQSP6
AV22
SA_DQSP2
AW 57
SA_DQSP3
AW 53
SA_DQSP4
AV30
SA_DQSP0
AJ62
SA_DQSP1
AN61
SA_DQSN6
AW 22
SA_DQSN7
AV18
SA_DQSN4
AW 30
SA_DQSN5
AV26
SA_DQSN3
AV53
SA_DQSN1
AN62
SA_DQSN2
AV57
SA_DQSN0
AJ61
SA_MA15
AU42
SA_MA13
AR35
SA_MA14
AV42
SA_MA10
AP35
SA_MA12
AU41
SA_MA11
AW 41
SA_MA8
AY39
SA_MA9
AU40
SA_MA6
AV40
SA_MA7
AW 39
SA_MA5
AR36
SA_MA4
AU39
SA_MA3
AP36
SA_MA2
AR38
SA_MA0
AU36
SA_MA1
AY37
SA_BA2
AY41
SA_BA1
AV35
SA_BA0
AU35
SA_W E
AW 34
SA_CAS
AU34
SA_RAS
AY34
SA_ODT0
AP32
SA_CS#0
AP33
SA_CS#1
AR32
SA_CKE3
AY43
SA_CKE0
AU43
SA_CKE1
AW 43
SA_CKE2
AY42
SA_DQ15
AP60
SA_DQ63
AU17
SA_DQ62
AV17
SA_DQ61
AU19
SA_DQ60
AV19
SA_DQ59
AW 17
SA_DQ58
AY17
SA_DQ57
AW 19
SA_DQ56
AY19
SA_DQ55
AU21
SA_DQ54
AV21
SA_DQ53
AU23
SA_DQ52
AV23
SA_DQ51
AW 21
SA_DQ50
AY21
SA_DQ49
AW 23
SA_DQ48
AY23
SA_DQ47
AU25
SA_DQ46
AV25
SA_DQ45
AU27
SA_DQ44
AV27
SA_DQ43
AW 25
SA_DQ42
AY25
SA_DQ41
AW 27
SA_DQ40
AY27
SA_DQ39
AU29
SA_DQ38
AV29
SA_DQ37
AU31
SA_DQ36
AV31
SA_DQ35
AW 29
SA_DQ34
AY29
SA_DQ33
AW 31
SA_DQ32
AY31
SA_DQ31
AU52
SA_DQ30
AV52
SA_DQ29
AU54
SA_DQ26
AY52
SA_DQ27
AW 52
SA_DQ24
AY54
SA_DQ23
AU56
SA_DQ22
AV56
SA_DQ21
AU58
SA_DQ20
AV58
SA_DQ19
AW 56
SA_DQ18
AY56
SA_DQ17
AW 58
SA_DQ16
AY58
SA_DQ14
AP61
SA_DQ13
AM60
SA_DQ12
AM61
SA_DQ11
AP62
SA_DQ10
AP63
SA_DQ9
AM62
SA_DQ8
AM63
SA_DQ7
AK60
SA_DQ6
AK61
SA_DQ5
AH60
SA_DQ3
AK62
SA_DQ2
AK63
SA_DQ1
AH62
SA_DQ0
AH63
SA_CLK#0
AU37
SA_CLK0
AV37
SA_CLK#1
AW 36
SA_CLK1
AY36
SA_DQ28
AV54
SA_DQ25
AW 54
SA_DQ4
AH61
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
<DDR3L>
<DDR3L>
Interleaved Memory
DDR_A_D63 DDR_A_D62DDR_A_D8DDR_A_D3 DDR_A_D4 DDR_A_D7DDR_A_D5 DDR_A_D6 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56DDR_A_D47 DDR_A_D46DDR_A_D42 DDR_A_D43DDR_A_D34 DDR_A_D39 DDR_A_D44 DDR_A_D45DDR_A_D35 DDR_A_D41 DDR_A_D40 DDR_A_D38 DDR_A_D36 DDR_A_D37DDR_A_D32 DDR_A_D33 DDR_A_D61 DDR_A_D60DDR_A_D2 DDR_A_D1 DDR_A_D0 DDR_A_D55 DDR_A_D54DDR_A_D51DDR_A_D48 DDR_A_D50 DDR_A_D49 DDR_A_D52 DDR_A_D53DDR_A_D31DDR_A_D14 DDR_A_D15 DDR_A_D25 DDR_A_D24 DDR_A_D26 DDR_A_D27 DDR_A_D30DDR_A_D9 DDR_A_D13 DDR_A_D12 DDR_A_D10 DDR_A_D11 DDR_A_D29 DDR_A_D28DDR_A_D19 DDR_A_D20DDR_A_D16 DDR_A_D21DDR_A_D17 DDR_A_D22DDR_A_D18 DDR_A_D23
DDR_A_DQS#7DDR_A_DQS#0 DDR_A_DQS#2 DDR_A_DQS#5 DDR_A_DQS#3 DDR_A_DQS#1 DDR_A_DQS#4 DDR_A_DQS#6 DDR_A_DQS0 DDR_A_DQS2 DDR_A_DQS1 DDR_A_DQS6 DDR_A_DQS5 DDR_A_DQS4 DDR_A_DQS3 DDR_A_DQS7
DDR_B_D33 DDR_B_D42DDR_B_D14 DDR_B_D55DDR_B_D43 DDR_B_D63DDR_B_D59DDR_B_D34DDR_B_D24 DDR_B_D29 DDR_B_D53DDR_B_D10 DDR_B_D13 DDR_B_D26DDR_B_D4 DDR_B_D44 DDR_B_D57DDR_B_D11 DDR_B_D21DDR_B_D3 DDR_B_D46DDR_B_D7DDR_B_D0 DDR_B_D35DDR_B_D30DDR_B_D27DDR_B_D15 DDR_B_D25 DDR_B_D23 DDR_B_D49DDR_B_D40DDR_B_D36 DDR_B_D48DDR_B_D37DDR_B_D19DDR_B_D9 DDR_B_D47DDR_B_D8 DDR_B_D18 DDR_B_D52 DDR_B_D62DDR_B_D50 DDR_B_D60DDR_B_D39 DDR_B_D56DDR_B_D51DDR_B_D2 DDR_B_D45DDR_B_D6 DDR_B_D28DDR_B_D22 DDR_B_D31 DDR_B_D61DDR_B_D58DDR_B_D17DDR_B_D5 DDR_B_D41DDR_B_D1 DDR_B_D54DDR_B_D32 DDR_B_D38DDR_B_D20DDR_B_D12 DDR_B_D16
DDR_B_DQS#1 DDR_B_DQS#7 DDR_B_DQS#5 DDR_B_DQS#4DDR_B_DQS#0 DDR_B_DQS#3 DDR_B_DQS#6DDR_B_DQS#2 DDR_B_DQS7DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS5 DDR_B_DQS4 DDR_B_DQS3 DDR_B_DQS2 DDR_B_DQS6
DDR_A_MA15DDR_A_MA0 DDR_A_MA14DDR_A_MA5 DDR_A_MA4DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA9 DDR_A_MA7 DDR_A_MA6 DDR_A_MA12 DDR_A_MA13DDR_A_MA8 DDR_A_MA11 DDR_A_MA10
DDR_B_MA15DDR_B_MA7DDR_B_MA0 DDR_B_MA9DDR_B_MA2 DDR_B_MA13DDR_B_MA4 DDR_B_MA11 DDR_B_MA10DDR_B_MA5 DDR_B_MA8 DDR_B_MA6DDR_B_MA3 DDR_B_MA12DDR_B_MA1 DDR_B_MA14
DDR_A_D[0..63]
<15>
DDR_A_DQS#[0..7] <15> DDR_A_DQS[0..7] <15>
DDR_B_D[0..63]
<16>
DDR_B_DQS#[0..7] <16> DDR_B_DQS[0..7] <16>
DDR_A_BS0 <15> DDR_A_BS1 <15> DDR_A_BS2 <15>
DDR_A_RAS# <15> DDR_A_CAS# <15>
DDR_A_W E# <15>
DDR_A_MA[0..15] <15>
DDR_CS0_DIMMA# <15> DDR_CS1_DIMMA# <15> DDR_CKE0_DIMMA <15> DDR_CKE1_DIMMA <15> M_CLK_DDR#0 <15> M_CLK_DDR0 <15> M_CLK_DDR#1 <15> M_CLK_DDR1 <15>
DDR_B_MA[0..15] <16>
DDR_CS0_DIMMB# <16> DDR_CS1_DIMMB# <16> DDR_CKE0_DIMMB <16> DDR_CKE1_DIMMB <16> M_CLK_DDR2 <16> M_CLK_DDR#2 <16> M_CLK_DDR#3 <16> M_CLK_DDR3 <16>
DDR_B_RAS# <16>
DDR_B_BS0 <16> DDR_B_BS1 <16> DDR_B_BS2 <16>
DDR_B_CAS# <16>
DDR_B_W E# <16>
+V_SM_VREF_CNT
<17>
+V_DDR_REFA_R
<17>
+V_DDR_REFB_R
<17>
+V_DDR_REFA_R +V_DDR_REFB_R +V_SM_VREF_CNT
+V_SM_VREF_CNT +V_DDR_REFA_R +V_DDR_REFB_R
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDRIII
Custom
561
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDRIII
Custom
561
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDRIII
Custom
561
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL B
4 OF 19
UCPU1D BDW -ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL B
4 OF 19
UCPU1D BDW -ULT-DDR3L-IL_BGA1168
SB_DQ14
AR54
SB_DQSN5
AN25
SB_DQSN7
AN18
SB_DQSP4
AM28
SB_DQSP5
AM25
SB_DQSP6
AM21
SB_DQSP3
AL49
SB_DQSP7
AM18
SB_DQSP2
AL42
SB_DQSP0
AN58
SB_DQSP1
AN55
SB_DQSN6
AN21
SB_DQSN2
AL43
SB_DQSN3
AL48
SB_DQSN4
AN28
SB_DQSN1
AM55
SB_DQSN0
AM58
SB_MA14
AR46
SB_MA15
AP46
SB_MA13
AK33
SB_MA9
AU46
SB_MA10
AK36
SB_MA11
AV47
SB_MA8
AY47
SB_MA12
AU47
SB_MA4
AR45
SB_MA5
AP45
SB_MA6
AW 46
SB_MA3
AR42
SB_MA7
AY46
SB_MA2
AP42
SB_MA0
AP40
SB_MA1
AR40
SB_BA2
AU49
SB_W E
AK35
SB_CAS
AM33
SB_BA0
AL35
SB_BA1
AM36
SB_RAS
AM35
SB_CS#1
AK32
SB_ODT0
AL32
SB_CS#0
AM32
SB_CKE1
AU50
SB_CKE2
AW 49
SB_CKE3
AV50
SB_CKE0
AY49
SB_CK#1
AK38
SB_CK1
AL38
SB_CK0
AN38
SB_CK#0
AM38
SB_DQ61
AM20
SB_DQ63
AP18
SB_DQ62
AR18
SB_DQ57
AR20
SB_DQ56
AN20
SB_DQ58
AK18
SB_DQ59
AL18
SB_DQ60
AK20
SB_DQ51
AM22
SB_DQ52
AN22
SB_DQ53
AP21
SB_DQ54
AK21
SB_DQ55
AK22
SB_DQ46
AK25
SB_DQ47
AL25
SB_DQ48
AR21
SB_DQ49
AR22
SB_DQ50
AL21
SB_DQ45
AM26
SB_DQ41
AR26
SB_DQ42
AR25
SB_DQ43
AP25
SB_DQ44
AK26
SB_DQ40
AN26
SB_DQ36
AR29
SB_DQ37
AN29
SB_DQ38
AR28
SB_DQ39
AP28
SB_DQ35
AK28
SB_DQ31
AK51
SB_DQ32
AM29
SB_DQ33
AK29
SB_DQ30
AM51
SB_DQ34
AL28
SB_DQ26
AM49
SB_DQ25
AK46
SB_DQ27
AK49
SB_DQ28
AM48
SB_DQ29
AK48
SB_DQ20
AK45
SB_DQ21
AK43
SB_DQ22
AM40
SB_DQ23
AM42
SB_DQ24
AM46
SB_DQ15
AN54
SB_DQ16
AK40
SB_DQ17
AK42
SB_DQ18
AM43
SB_DQ19
AM45
SB_DQ10
AM54
SB_DQ11
AK54
SB_DQ13
AK55
SB_DQ5
AK58
SB_DQ7
AN57
SB_DQ8
AP55
SB_DQ9
AR55
SB_DQ0
AP58
SB_DQ1
AR58
SB_DQ2
AM57
SB_DQ3
AK57
SB_DQ4
AL58
SB_DQ12
AL55
SB_DQ6
AR57
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL A
3 OF 19
UCPU1C BDW -ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
DDR CHANNEL A
3 OF 19
UCPU1C BDW -ULT-DDR3L-IL_BGA1168
SM_VREF_DQ0
AR51
SM_VREF_DQ1
AP51
SM_VREF_CA
AP49
SA_DQSP7
AW 18
SA_DQSP5
AW 26
SA_DQSP6
AV22
SA_DQSP2
AW 57
SA_DQSP3
AW 53
SA_DQSP4
AV30
SA_DQSP0
AJ62
SA_DQSP1
AN61
SA_DQSN6
AW 22
SA_DQSN7
AV18
SA_DQSN4
AW 30
SA_DQSN5
AV26
SA_DQSN3
AV53
SA_DQSN1
AN62
SA_DQSN2
AV57
SA_DQSN0
AJ61
SA_MA15
AU42
SA_MA13
AR35
SA_MA14
AV42
SA_MA10
AP35
SA_MA12
AU41
SA_MA11
AW 41
SA_MA8
AY39
SA_MA9
AU40
SA_MA6
AV40
SA_MA7
AW 39
SA_MA5
AR36
SA_MA4
AU39
SA_MA3
AP36
SA_MA2
AR38
SA_MA0
AU36
SA_MA1
AY37
SA_BA2
AY41
SA_BA1
AV35
SA_BA0
AU35
SA_W E
AW 34
SA_CAS
AU34
SA_RAS
AY34
SA_ODT0
AP32
SA_CS#0
AP33
SA_CS#1
AR32
SA_CKE3
AY43
SA_CKE0
AU43
SA_CKE1
AW 43
SA_CKE2
AY42
SA_DQ15
AP60
SA_DQ63
AU17
SA_DQ62
AV17
SA_DQ61
AU19
SA_DQ60
AV19
SA_DQ59
AW 17
SA_DQ58
AY17
SA_DQ57
AW 19
SA_DQ56
AY19
SA_DQ55
AU21
SA_DQ54
AV21
SA_DQ53
AU23
SA_DQ52
AV23
SA_DQ51
AW 21
SA_DQ50
AY21
SA_DQ49
AW 23
SA_DQ48
AY23
SA_DQ47
AU25
SA_DQ46
AV25
SA_DQ45
AU27
SA_DQ44
AV27
SA_DQ43
AW 25
SA_DQ42
AY25
SA_DQ41
AW 27
SA_DQ40
AY27
SA_DQ39
AU29
SA_DQ38
AV29
SA_DQ37
AU31
SA_DQ36
AV31
SA_DQ35
AW 29
SA_DQ34
AY29
SA_DQ33
AW 31
SA_DQ32
AY31
SA_DQ31
AU52
SA_DQ30
AV52
SA_DQ29
AU54
SA_DQ26
AY52
SA_DQ27
AW 52
SA_DQ24
AY54
SA_DQ23
AU56
SA_DQ22
AV56
SA_DQ21
AU58
SA_DQ20
AV58
SA_DQ19
AW 56
SA_DQ18
AY56
SA_DQ17
AW 58
SA_DQ16
AY58
SA_DQ14
AP61
SA_DQ13
AM60
SA_DQ12
AM61
SA_DQ11
AP62
SA_DQ10
AP63
SA_DQ9
AM62
SA_DQ8
AM63
SA_DQ7
AK60
SA_DQ6
AK61
SA_DQ5
AH60
SA_DQ3
AK62
SA_DQ2
AK63
SA_DQ1
AH62
SA_DQ0
AH63
SA_CLK#0
AU37
SA_CLK0
AV37
SA_CLK#1
AW 36
SA_CLK1
AY36
SA_DQ28
AV54
SA_DQ25
AW 54
SA_DQ4
AH61
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
ME CMOSCMOS
ODD2.5" HDD
15mils
15mils
15mils
RTC BAT conn
H
：
Integrated VRM enable
L
：
Integrated VRM disable
INTVRMEN *
Default Setting: Dual TCK S can Chains (also known as "Shared JTAG" in other docum ent)Topolog
J1s, J2s, J3s R6,R7,R8,R9
R1d,R2,R3d, R4,R5,J1d J2d,J3d* J4d and Rs5*
Resistors ufStuffed
Resistors Stuffed
Single TCK scan chain (also known as "Com m on JTAG" in other docum ent)
- Run control oper. - ME/Sx debug Be st Use for
In th is topolog y, PCH TDI- TDO and CPU TDI-TDO will be chained to form one JTAG scan chain controlled by TCK0In this topology, the CPU JTAG chain will be controlled by TCK0 and TCK1 will control the PCH JTAG chain. Description
-B oundary Scan/ Manufacturing est
J1s,J2s,J3s** R2,R4,R5,R5s**
R1d,r3d,J1d,J2d J3d**,J4d, R6,R7,R8,R9
R5
R3d
R4
R8
RF solution
Add RC367 EMI@ to isolate Audio Clock by EMI request
15mils
Contact ok
Contact ok
<XDP>
<CPU and XDP>
J2S
J1S
XDP_TCK:XDP contact with CPU No 0ohm(RS5)
S1
<CPU site> <PCH site>
<PCH site>
S2
<CPU site>
<PCH site>
<XDP>
<XDP>
<XDP>
<XDP>
<PCH site>
<PCH site>
<PCH site> <PCH site>
<PCH site>
<XDP>
S3
<CPU>
J4d
J3D
J3S
R2
R6
R1d
R9
R7
J2D
Layout notes DG V0.9 SAT A_COMP Width=12mil Max length=500mil
L
RC17 need to close to JCPU1
Place near JXDP1
S4
DB phase : For ESD request 20141117
WLAN
HDA_SDOUT: ME Flash Descriptor Security Override Low : Disabled(Default) High : Enabled 2014-10-01: Follow skyfall/pixar Direct shorted
Intel ME update
DB phase : For ESD request 20141117
Layout notes RC367 place near CPU
DB phase 2014-11-14 Ad d ME _F lash _E N
DB phase : For XDP 20141117
<CPU,XDP,XDP Switch>
SI
：
Change BOM con/ig
SI : pop D23
PV:RG122 change to 0-ohm shortpad
PV:RC353 change to 0-ohm shortpad
PCH_RTCX2
PCH_RTCRST# PCH_SRTCRST#
PCH_INTVRMEN
PCH_JTAG_TMS
XDP_TCK_JTAGX
PCH_JTAG_TDO
PCH_JTAG_TDI
HD A_ S Y NC _ R
HD A_ S Y NC
HD A_ S Y NC HD A_ R S T# HD A_ B I T_ C L K HD A_ S D O UT
HD A_ B I TC L K _ AUD I O
HD A_ R S T_ AUD I O #
HD A_ R S T# HD A_ S Y NC _ R HD A_ S D O UT
HD A_ B I T_ C L K
ODD_PLUG#
EC_+1.05VS_PG
XDP_TDO XDP_TMSXDP_TDI_SW ITCH XDP_TRST#
XDP_TDO_CPU XDP_TDI_CPU
XDP_TRST#_CPU
XDP_TMS
PCH_JTAG_TMS
PCH_JTAG_TDO
XDP_TDI
PCH_JTAG_TCK
XDP_TCK_JTAGX
XDP_TMS_CPU
XDP_TDO
XDP_TRST#
PCH_JTAG_RST#
XDP_TDI_SW ITCH
XDP_TDI_CPU
XDP_TDI_SW ITCH
PCH_JTAG_TDO
XDP_TDI_SW ITCH
XDP_TRST#_CPU
PCH_JTAG_TCK
XDP_TDO_CPU
XDP_TRST#_CPU XDP_TDO
XDP_TCK
XDP_TCK
PCH_JTAG_TDI
XDP_TCK_JTAGX
XDP_TDI
SATA_LED# SATA_COMP
ODD_PLUG# PCH_GPIO36 mS ATA_ D E T#
PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO XDP_TCK_JTAGXPCH_JTAG_RST#
SM_INTRUDER# PCH_SRTCRST# PCH_RTCRST# PCH_INTVRMEN PCH_RTCX1 PCH_RTCX2
CFG9CFG8 CFG15CFG14CFG17
CFG2 CFG3
CFG11CFG10
CFG3
XDP_OBS0_R XDP_OBS1_R
CFG13CFG16 CFG12
XDP_TMS
XDP_PREQ# XDP_PRDY#
XDP_TDO XDP_TRST# XDP_TDI
XDP_TCK
H_ C P UP W R G D _ R
H_ C P UP W R G D _ X D P
XDP_RST#_R
CFG1CFG0
CFG19
CFG4 CFG5 CFG6 CFG7
CFG18
XDP_TCK1
XDP_TCK1
PCH_JTAG_TCK
XDP_TDO_CPU
XDP_TDO
PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6
HD A_ S D O UT
H_ C P UP W R G D _ R
PCH_RTCX1_0_R
HD A_ S D O UT
SATA_PTX_DRX_P1 <29> SATA_PRX_DTX_N1 <29> SATA_PTX_DRX_N1 <29> SATA_PRX_DTX_P1 <29>
HD A_ S D I N0
<23>
HD A_ R S T_ AUD I O #
<23>
HD A_ S Y NC _ AUD I O
<23>
HD A_ S D O UT_ AUD I O
<23>
HD A_ B I TC L K _ AUD I O
<23>
SATA_PTX_DRX_N0 <29> SATA_PRX_DTX_N0 <29> SATA_PTX_DRX_P0 <29> SATA_PRX_DTX_P0 <29>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,7,8,9>
+RTCVCC
<12,28,8>
PCH_RTCX1 <28>
+RTCBATT
<28>
+VCCIO_OUT
<11,4>
+1.05VS_VCCST
<11,4,9>
+3V_PCH
<10,11,12,24,36,4,7,9>
+1.5VS
<12,23,37,53>
+1.05VS_VCCSATA3PLL
<12,34>
+3VL
<25,28,32,46,47,48>
MPHY_ PW REN
<9>
XDP_TMS_CPU
<4>
XDP_TRST#_CPU
<4>
XDP_TCK <4>
XDP_TDI_CPU <4>
SATA_LED# <32,9>
mS ATA_ D E T# < 7 > ODD_PLUG# <29>
SYS_PW ROK
<25,8>
CFG0
<14>
CFG1
<14>
CFG2
<14>
CFG3
<14>
CFG6
<14>
CFG7
<14>
CFG4
<14>
CFG5
<14>
CFG10 <14> CFG11 <14>CFG8 <14> CFG9 <14> CFG12 <14> CFG13 <14>CFG17 <14> CFG16 <14> CFG19 <14> CFG18 <14> CFG14 <14> CFG15 <14>
CPU_PW R_DEBUG
<11>
PCH_SMBDATA
<15,16,18,21,7>
PCH_SMBCLK
<15,16,18,21,7>
PBTN_OUT#
<25,8>
PLT_RST# <22,25,27,31,35,8>
XDP_PREQ#
<4>
XDP_PRDY#
<4>
XDP_DBRESET# <7,8>
XDP_OBS0_R
<4>
XDP_OBS1_R
<4>
CLK_CPU_ITP <7> CLK_CPU_ITP# <7>
H_ C P UP W R G D _ R
<4>
XDP_TDO_CPU <4>
PCIE_PRX_DTX_N6 <31> PCIE_PRX_DTX_P6 <31> PCIE_PTX_C_DRX_N6 <31> PCIE_PTX_C_DRX_P6 <31>
ME_ Fla s h_ EN
<25>
+3VALW
<12,19,22,24,25,26,28,29,32,37,48,50,53,56,7>
EC_+1.05VS_PG
<25>
+1.05VS_PG <11,4>
+RTCVCC
+RTCVCC
+RTCBATT
+3VL
+RTCBATT_R
+RTCVCC
+RTCVCC
+3V_PCH
+3V_PCH+3V_PCH
+3V_PCH
+3V_PCH
+RTCBATT
+3VS +RTCVCC +RTCBATT +VCCIO_OUT +1.05VS_VCCST +3V_PCH +1.5VS +1.05VS_VCCSATA3PLL +3VL
+3VS
+3VS
+1.05VS_VCCST
+1.05VS_VCCST
+1.05VS_VCCSATA3PLL
+VCCIO_OUT
+VCCIO_OUT
+VCCIO_OUT
+3VALW
+1.05VS_VCCST
+1.5VS
Ti t le Size Document Number
Rev
Date:
Sheet
of
Security Classification
Com pal Secret Data
TH I S S H E E T O F E N G I N E E R I N G D R A WI N G I S TH E P R O P R I E TA R
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Is s ued D ate
Deciphered Date
0.1
RTC,SATA,HDA,JTAG
Custom
661
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Ti t le Size Document Number
Rev
Date:
Sheet
of
Security Classification
Com pal Secret Data
TH I S S H E E T O F E N G I N E E R I N G D R A WI N G I S TH E P R O P R I E TA R
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Is s ued D ate
Deciphered Date
0.1
RTC,SATA,HDA,JTAG
Custom
661
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Ti t le Size Document Number
Rev
Date:
Sheet
of
Security Classification
Com pal Secret Data
TH I S S H E E T O F E N G I N E E R I N G D R A WI N G I S TH E P R O P R I E TA R
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Is s ued D ate
Deciphered Date
0.1
RTC,SATA,HDA,JTAG
Custom
661
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC39
3K_0402_1%
RC39
3K_0402_1%
1
2
RC372 1K_0402_1% RC372 1K_0402_1%
1
2
RC217 10K_0402_5% RC217 10K_0402_5%
1
2
T1 5 6
PAD
T1 5 6
PAD
DC1
BAV70W 3P C/C_SOT-323
DC1
BAV70W 3P C/C_SOT-323
2 3
1
CC17 0.1U_0402_16V7K CC17 0.1U_0402_16V7K
1
2
CM29 22P_0402_50V8J
@
CM29 22P_0402_50V8J
@
1
2
RC373 1K_0402_1% RC373 1K_0402_1%
1
2
RC196 0_0201_5%
@
RC196 0_0201_5%
@
1
2
UC 5 74CBTLV3126DS_SSOP16
@
UC 5 74CBTLV3126DS_SSOP16
@
2B
7
3A
11
2A
6
3OE
12
3B
10
4OE
15
VCC
16
1B
4
1A
3
2OE
5
1OE
2
NC
1
NC
9
GND
8
4A
14
4B
13
RG117 0_0402_5%
UM A@
RG117 0_0402_5%
UM A@
1
2
D23 CK0402101V05_0402-2
ESD@
SCV00001K00D23 CK0402101V05_0402-2
ESD@
SCV00001K00
1
2
T1 5 7
PAD
T1 5 7
PAD
RC16 51_0402_1%
@
RC16 51_0402_1%
@
1
2
RC45
210_0402_5%
@
RC45
210_0402_5%
@
1 2
RC303
100_0402_1%
@
RC303
100_0402_1%
@
1 2
RC283
210_0402_5%
@
RC283
210_0402_5%
@
1 2
RC353 0_0402_5%
short@
RC353 0_0402_5%
short@
1
2
RP1
33_0804_8P4R_5%
RP1
33_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC374 1K_0402_1% RC374 1K_0402_1%
1
2
RC218 100K_0402_5% RC218 100K_0402_5%
1
2
RC199 0_0201_5%
@
RC199 0_0201_5%
@
1
2
RC195 0_0201_5%
short@
RC195 0_0201_5%
short@
1
2
RC236
330K_0402_5%
RC236
330K_0402_5%
1
2
T1 5 9 P AD T1 5 9 P AD
RC198 0_0201_5%
@
RC198 0_0201_5%
@
1
2
RC14 51_0402_1%
@
RC14 51_0402_1%
@
1
2
JCMOS1
SHORT PADS
JCMOS1
SHORT PADS
1 2
CC5
1U_0402_6.3V6K
CC5
1U_0402_6.3V6K
1 2
RC15 51_0402_1% RC15 51_0402_1%
1
2
G
D
S
Q32
2N7002_SOT23-3
G
D
S
Q32
2N7002_SOT23-3
2
1
3
RC307 0_0201_5%
@
RC307 0_0201_5%
@
1
2
RC46
210_0402_5%
@RC46
210_0402_5%
@
1 2
CC2
1U_0402_6.3V6K
CC2
1U_0402_6.3V6K
1 2
RC302
100_0402_1%
@
RC302
100_0402_1%
@
1 2
RC197 0_0201_5%
@
RC197 0_0201_5%
@
1
2
RC240 10K_0402_5%
@
RC240 10K_0402_5%
@
1
2
CC6
1U_0402_6.3V6K
CC6
1U_0402_6.3V6K
1 2
RC201
0_0201_5%
short@
RC201
0_0201_5%
short@
1
2
R511 10K_0402_5% R511 10K_0402_5%
1 2
RC32 20K_0402_5% RC32 20K_0402_5%
1
2
BDW_ULT_DDR3L(Interleaved)
JTAG
RTC AUDI O
SATA
5 OF 19
UC P U1 E BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
JTAG
RTC AUDI O
SATA
5 OF 19
UC P U1 E BDW-ULT-DDR3L-IL_BGA1168
RSVD
L11
RSVD
K10
PCH_TMS
AD62
PCH_TDO
AE61
PCH_TDI
AD61
PCH_TCK
AE62
PCH_TRST
AU62
HDA_DOCK_RST/I2S1_SFRM
AV10
HDA_DOCK_EN/I2S1_TXD
AW10
HDA_SDI1/I2S1_RXD
AU12
HDA_SDO/I2S0_TXD
AU11
HDA_SDI0/I2S0_RXD
AY10
HDA_RST/I2S_MCLK
AU8
HDA_SYNC/I2S0_SFRM
AV11
HDA_BCLK/I2S0_SCLK
AW8
RSVD
AC4
RSVD
AL11
RSVD
AV2
I2S1_SCLK
AY8
SATALED
U3
JTAGX
AE63
RTCX2
AY5
SATA_RCOMP
C12
SATA_IREF
A12
SATA3GP/GPIO37
AC1
SATA2GP/GPIO36
V6
SATA1GP/GPIO35
U1
SATA0GP/GPIO34
V1
SATA_TP3/PETP6_L0
D17
SATA_TN3/PETN6_L0
C17
SATA_RP3/PERP6_L0
E5
SATA_RN3/PERN6_L0
F5
SATA_TP2/PETP6_L1
C15
SATA_TN2/PETN6_L1
B14
SATA_RN2/PERN6_L1
J6
SATA_RP2/PERP6_L1
H6
SATA_TP1/PETP6_L2
B17
SATA_TN1/PETN6_L2
A17
SATA_RN1/PERN6_L2
J8
SATA_RP1/PERP6_L2
H8
SATA_TP0/PETP6_L3
A15
SATA_TN0/PETN6_L3
B15
SATA_RP0/PERP6_L3
H5
SATA_RN0/PERN6_L3
J5
RTCX1
AW5
RTCRST
AU7
SRTCRST
AV6
INTVRMEN
AV7
INTRUDER
AU6
RC38
51_0402_5%
@
RC38
51_0402_5%
@
1
2
YC1
32.768KHZ Q13FC1350000500
UM A@
YC1
32.768KHZ Q13FC1350000500
UM A@
1
2
U1 6
74AUP1G07GW _TSSOP5
@
U1 6
74AUP1G07GW _TSSOP5
@
GND
3
A
2
NC
1
VCC
5
Y
4
CC86
.1U_0402_16V7K @
CC86
.1U_0402_16V7K @
1
2
RC356
1K_0402_5%
RC356
1K_0402_5% 1
2
CC4 18P_0402_50V8J
UM A@
CC4 18P_0402_50V8J
UM A@
1 2
RC35 1M_0402_5% RC35 1M_0402_5%
1
2
RC306 0_0201_5%
@
RC306 0_0201_5%
@
1
2
RG122
0_0402_5%
short@
RG122
0_0402_5%
short@
1
2
RC304
100_0402_1%
@
RC304
100_0402_1%
@
1 2
CC3
18P_0402_50V8J
UM A@
CC3
18P_0402_50V8J
UM A@
1 2
RC31 10M_0402_5%
UM A@
RC31 10M_0402_5%
UM A@
1
2
RC193 0_0201_5%
short@
RC193 0_0201_5%
short@
1
2
JXDP1
SAMTE_BSH-030-01-L-D-A
CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A
CONN@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDAT A_A0
9
OBSDAT A_A1
11
GND4
13
OBSDAT A_A2
15
OBSDAT A_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDAT A_B0
27
OBSDAT A_B1
29
GND10
31
OBSDAT A_B2
33
OBSDAT A_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1
2
OBSFN_C0
4
OBSFN_C1
6
GND3
8
OBSDAT A_C0
10
OBSDAT A_C1
12
GND5
14
OBSDAT A_C2
16
OBSDAT A_C3
18
GND7
20
OBSFN_D0
22
OBSFN_D1
24
GND9
26
OBSDAT A_D0
28
OBSDAT A_D1
30
GND11
32
OBSDAT A_D2
34
OBSDAT A_D3
36
GND13
38
ITPCLK/HOOK4
40
ITPCLK#/HOOK5
42
VCC_OBS_CD
44
RESET#/HOOK6
46
DBR#/HOOK7
48
GND15
50
TD0
52
TRST#
54
TDI
56
TMS
58
GND17
60
RC10 51_0402_1% RC10 51_0402_1%
1
2
RC194 0_0201_5%
short@
RC194 0_0201_5%
short@
1
2
JME1
SHORT PADS
JME1
SHORT PADS
1 2
RC301
100_0402_1%
@
RC301
100_0402_1%
@
1 2
CC127
0. 1U_0402_16V 4Z
CC127
0. 1U_0402_16V 4Z
1 2
JRTC1
LOTES_AAA-BAT-054-K01
CONN@JRTC1
LOTES_AAA-BAT-054-K01
CONN@
+
1
-
2
RC41
210_0402_5%
@
RC41
210_0402_5%
@
1 2
RC310 0_0402_5%
@
RC310 0_0402_5%
@
1
2
RC367
33_0402_5%
EMI@
RC367
33_0402_5%
EMI@
1
2
CC128
2. 2U_0402_6. 3V 6M
CC128
2. 2U_0402_6. 3V 6M
1 2
CM28 22P_0402_50V8J
@
CM28 22P_0402_50V8J
@
1
2
RC34 20K_0402_5% RC34 20K_0402_5%
1
2
CC16 0.1U_0402_16V7K CC16 0.1U_0402_16V7K
1
2
RC33
1K_0402_5%
RC33
1K_0402_5%
1
2
RC37 0_0201_5%
@
RC37 0_0201_5%
@
1
2
RC200 0_0201_5%
short@
RC200 0_0201_5%
short@
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
ME CMOSCMOS
ODD2.5" HDD
15mils
15mils
15mils
RTC BAT conn
H
：
Integrated VRM enable
L
：
Integrated VRM disable
INTVRMEN *
Default Setting: Dual TCK S can Chains (also known as "Shared JTAG" in other docum ent)Topolog
J1s, J2s, J3s R6,R7,R8,R9
R1d,R2,R3d, R4,R5,J1d J2d,J3d* J4d and Rs5*
Resistors ufStuffed
Resistors Stuffed
Single TCK scan chain (also known as "Com m on JTAG" in other docum ent)
- Run control oper. - ME/Sx debug Be st Use for
In th is topolog y, PCH TDI- TDO and CPU TDI-TDO will be chained to form one JTAG scan chain controlled by TCK0In this topology, the CPU JTAG chain will be controlled by TCK0 and TCK1 will control the PCH JTAG chain. Description
-B oundary Scan/ Manufacturing est
J1s,J2s,J3s** R2,R4,R5,R5s**
R1d,r3d,J1d,J2d J3d**,J4d, R6,R7,R8,R9
R5
R3d
R4
R8
RF solution
Add RC367 EMI@ to isolate Audio Clock by EMI request
15mils
Contact ok
Contact ok
<XDP>
<CPU and XDP>
J2S
J1S
XDP_TCK:XDP contact with CPU No 0ohm(RS5)
S1
<CPU site> <PCH site>
<PCH site>
S2
<CPU site>
<PCH site>
<XDP>
<XDP>
<XDP>
<XDP>
<PCH site>
<PCH site>
<PCH site> <PCH site>
<PCH site>
<XDP>
S3
<CPU>
J4d
J3D
J3S
R2
R6
R1d
R9
R7
J2D
Layout notes DG V0.9 SAT A_COMP Width=12mil Max length=500mil
L
RC17 need to close to JCPU1
Place near JXDP1
S4
DB phase : For ESD request 20141117
WLAN
HDA_SDOUT: ME Flash Descriptor Security Override Low : Disabled(Default) High : Enabled 2014-10-01: Follow skyfall/pixar Direct shorted
Intel ME update
DB phase : For ESD request 20141117
Layout notes RC367 place near CPU
DB phase 2014-11-14 Ad d ME _F lash _E N
DB phase : For XDP 20141117
<CPU,XDP,XDP Switch>
SI
：
Change BOM con/ig
SI : pop D23
PV:RG122 change to 0-ohm shortpad
PV:RC353 change to 0-ohm shortpad
PCH_RTCX2
PCH_RTCRST# PCH_SRTCRST#
PCH_INTVRMEN
PCH_JTAG_TMS
XDP_TCK_JTAGX
PCH_JTAG_TDO
PCH_JTAG_TDI
HD A_ S Y NC _ R
HD A_ S Y NC
HD A_ S Y NC HD A_ R S T# HD A_ B I T_ C L K HD A_ S D O UT
HD A_ B I TC L K _ AUD I O
HD A_ R S T_ AUD I O #
HD A_ R S T# HD A_ S Y NC _ R HD A_ S D O UT
HD A_ B I T_ C L K
ODD_PLUG#
EC_+1.05VS_PG
XDP_TDO XDP_TMSXDP_TDI_SW ITCH XDP_TRST#
XDP_TDO_CPU XDP_TDI_CPU
XDP_TRST#_CPU
XDP_TMS
PCH_JTAG_TMS
PCH_JTAG_TDO
XDP_TDI
PCH_JTAG_TCK
XDP_TCK_JTAGX
XDP_TMS_CPU
XDP_TDO
XDP_TRST#
PCH_JTAG_RST#
XDP_TDI_SW ITCH
XDP_TDI_CPU
XDP_TDI_SW ITCH
PCH_JTAG_TDO
XDP_TDI_SW ITCH
XDP_TRST#_CPU
PCH_JTAG_TCK
XDP_TDO_CPU
XDP_TRST#_CPU XDP_TDO
XDP_TCK
XDP_TCK
PCH_JTAG_TDI
XDP_TCK_JTAGX
XDP_TDI
SATA_LED# SATA_COMP
ODD_PLUG# PCH_GPIO36 mS ATA_ D E T#
PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO XDP_TCK_JTAGXPCH_JTAG_RST#
SM_INTRUDER# PCH_SRTCRST# PCH_RTCRST# PCH_INTVRMEN PCH_RTCX1 PCH_RTCX2
CFG9CFG8 CFG15CFG14CFG17
CFG2 CFG3
CFG11CFG10
CFG3
XDP_OBS0_R XDP_OBS1_R
CFG13CFG16 CFG12
XDP_TMS
XDP_PREQ# XDP_PRDY#
XDP_TDO XDP_TRST# XDP_TDI
XDP_TCK
H_ C P UP W R G D _ R
H_ C P UP W R G D _ X D P
XDP_RST#_R
CFG1CFG0
CFG19
CFG4 CFG5 CFG6 CFG7
CFG18
XDP_TCK1
XDP_TCK1
PCH_JTAG_TCK
XDP_TDO_CPU
XDP_TDO
PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6
HD A_ S D O UT
H_ C P UP W R G D _ R
PCH_RTCX1_0_R
HD A_ S D O UT
SATA_PTX_DRX_P1 <29> SATA_PRX_DTX_N1 <29> SATA_PTX_DRX_N1 <29> SATA_PRX_DTX_P1 <29>
HD A_ S D I N0
<23>
HD A_ R S T_ AUD I O #
<23>
HD A_ S Y NC _ AUD I O
<23>
HD A_ S D O UT_ AUD I O
<23>
HD A_ B I TC L K _ AUD I O
<23>
SATA_PTX_DRX_N0 <29> SATA_PRX_DTX_N0 <29> SATA_PTX_DRX_P0 <29> SATA_PRX_DTX_P0 <29>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,7,8,9>
+RTCVCC
<12,28,8>
PCH_RTCX1 <28>
+RTCBATT
<28>
+VCCIO_OUT
<11,4>
+1.05VS_VCCST
<11,4,9>
+3V_PCH
<10,11,12,24,36,4,7,9>
+1.5VS
<12,23,37,53>
+1.05VS_VCCSATA3PLL
<12,34>
+3VL
<25,28,32,46,47,48>
MPHY_ PW REN
<9>
XDP_TMS_CPU
<4>
XDP_TRST#_CPU
<4>
XDP_TCK <4>
XDP_TDI_CPU <4>
SATA_LED# <32,9>
mS ATA_ D E T# < 7 > ODD_PLUG# <29>
SYS_PW ROK
<25,8>
CFG0
<14>
CFG1
<14>
CFG2
<14>
CFG3
<14>
CFG6
<14>
CFG7
<14>
CFG4
<14>
CFG5
<14>
CFG10 <14> CFG11 <14>CFG8 <14> CFG9 <14> CFG12 <14> CFG13 <14>CFG17 <14> CFG16 <14> CFG19 <14> CFG18 <14> CFG14 <14> CFG15 <14>
CPU_PW R_DEBUG
<11>
PCH_SMBDATA
<15,16,18,21,7>
PCH_SMBCLK
<15,16,18,21,7>
PBTN_OUT#
<25,8>
PLT_RST# <22,25,27,31,35,8>
XDP_PREQ#
<4>
XDP_PRDY#
<4>
XDP_DBRESET# <7,8>
XDP_OBS0_R
<4>
XDP_OBS1_R
<4>
CLK_CPU_ITP <7> CLK_CPU_ITP# <7>
H_ C P UP W R G D _ R
<4>
XDP_TDO_CPU <4>
PCIE_PRX_DTX_N6 <31> PCIE_PRX_DTX_P6 <31> PCIE_PTX_C_DRX_N6 <31> PCIE_PTX_C_DRX_P6 <31>
ME_ Fla s h_ EN
<25>
+3VALW
<12,19,22,24,25,26,28,29,32,37,48,50,53,56,7>
EC_+1.05VS_PG
<25>
+1.05VS_PG <11,4>
+RTCVCC
+RTCVCC
+RTCBATT
+3VL
+RTCBATT_R
+RTCVCC
+RTCVCC
+3V_PCH
+3V_PCH+3V_PCH
+3V_PCH
+3V_PCH
+RTCBATT
+3VS +RTCVCC +RTCBATT +VCCIO_OUT +1.05VS_VCCST +3V_PCH +1.5VS +1.05VS_VCCSATA3PLL +3VL
+3VS
+3VS
+1.05VS_VCCST
+1.05VS_VCCST
+1.05VS_VCCSATA3PLL
+VCCIO_OUT
+VCCIO_OUT
+VCCIO_OUT
+3VALW
+1.05VS_VCCST
+1.5VS
Ti t le Size Document Number
Rev
Date:
Sheet
of
Security Classification
Com pal Secret Data
TH I S S H E E T O F E N G I N E E R I N G D R A WI N G I S TH E P R O P R I E TA R
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Is s ued D ate
Deciphered Date
0.1
RTC,SATA,HDA,JTAG
Custom
661
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Ti t le Size Document Number
Rev
Date:
Sheet
of
Security Classification
Com pal Secret Data
TH I S S H E E T O F E N G I N E E R I N G D R A WI N G I S TH E P R O P R I E TA R
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Is s ued D ate
Deciphered Date
0.1
RTC,SATA,HDA,JTAG
Custom
661
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Ti t le Size Document Number
Rev
Date:
Sheet
of
Security Classification
Com pal Secret Data
TH I S S H E E T O F E N G I N E E R I N G D R A WI N G I S TH E P R O P R I E TA R
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Is s ued D ate
Deciphered Date
0.1
RTC,SATA,HDA,JTAG
Custom
661
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC39
3K_0402_1%
RC39
3K_0402_1%
1
2
RC372 1K_0402_1% RC372 1K_0402_1%
1
2
RC217 10K_0402_5% RC217 10K_0402_5%
1
2
T1 5 6
PAD
T1 5 6
PAD
DC1
BAV70W 3P C/C_SOT-323
DC1
BAV70W 3P C/C_SOT-323
2 3
1
CC17 0.1U_0402_16V7K CC17 0.1U_0402_16V7K
1
2
CM29 22P_0402_50V8J
@
CM29 22P_0402_50V8J
@
1
2
RC373 1K_0402_1% RC373 1K_0402_1%
1
2
RC196 0_0201_5%
@
RC196 0_0201_5%
@
1
2
UC 5 74CBTLV3126DS_SSOP16
@
UC 5 74CBTLV3126DS_SSOP16
@
2B
7
3A
11
2A
6
3OE
12
3B
10
4OE
15
VCC
16
1B
4
1A
3
2OE
5
1OE
2
NC
1
NC
9
GND
8
4A
14
4B
13
RG117 0_0402_5%
UM A@
RG117 0_0402_5%
UM A@
1
2
D23 CK0402101V05_0402-2
ESD@
SCV00001K00D23 CK0402101V05_0402-2
ESD@
SCV00001K00
1
2
T1 5 7
PAD
T1 5 7
PAD
RC16 51_0402_1%
@
RC16 51_0402_1%
@
1
2
RC45
210_0402_5%
@
RC45
210_0402_5%
@
1 2
RC303
100_0402_1%
@
RC303
100_0402_1%
@
1 2
RC283
210_0402_5%
@
RC283
210_0402_5%
@
1 2
RC353 0_0402_5%
short@
RC353 0_0402_5%
short@
1
2
RP1
33_0804_8P4R_5%
RP1
33_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC374 1K_0402_1% RC374 1K_0402_1%
1
2
RC218 100K_0402_5% RC218 100K_0402_5%
1
2
RC199 0_0201_5%
@
RC199 0_0201_5%
@
1
2
RC195 0_0201_5%
short@
RC195 0_0201_5%
short@
1
2
RC236
330K_0402_5%
RC236
330K_0402_5%
1
2
T1 5 9 P AD T1 5 9 P AD
RC198 0_0201_5%
@
RC198 0_0201_5%
@
1
2
RC14 51_0402_1%
@
RC14 51_0402_1%
@
1
2
JCMOS1
SHORT PADS
JCMOS1
SHORT PADS
1 2
CC5
1U_0402_6.3V6K
CC5
1U_0402_6.3V6K
1 2
RC15 51_0402_1% RC15 51_0402_1%
1
2
G
D
S
Q32
2N7002_SOT23-3
G
D
S
Q32
2N7002_SOT23-3
2
1
3
RC307 0_0201_5%
@
RC307 0_0201_5%
@
1
2
RC46
210_0402_5%
@RC46
210_0402_5%
@
1 2
CC2
1U_0402_6.3V6K
CC2
1U_0402_6.3V6K
1 2
RC302
100_0402_1%
@
RC302
100_0402_1%
@
1 2
RC197 0_0201_5%
@
RC197 0_0201_5%
@
1
2
RC240 10K_0402_5%
@
RC240 10K_0402_5%
@
1
2
CC6
1U_0402_6.3V6K
CC6
1U_0402_6.3V6K
1 2
RC201
0_0201_5%
short@
RC201
0_0201_5%
short@
1
2
R511 10K_0402_5% R511 10K_0402_5%
1 2
RC32 20K_0402_5% RC32 20K_0402_5%
1
2
BDW_ULT_DDR3L(Interleaved)
JTAG
RTC AUDI O
SATA
5 OF 19
UC P U1 E BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
JTAG
RTC AUDI O
SATA
5 OF 19
UC P U1 E BDW-ULT-DDR3L-IL_BGA1168
RSVD
L11
RSVD
K10
PCH_TMS
AD62
PCH_TDO
AE61
PCH_TDI
AD61
PCH_TCK
AE62
PCH_TRST
AU62
HDA_DOCK_RST/I2S1_SFRM
AV10
HDA_DOCK_EN/I2S1_TXD
AW10
HDA_SDI1/I2S1_RXD
AU12
HDA_SDO/I2S0_TXD
AU11
HDA_SDI0/I2S0_RXD
AY10
HDA_RST/I2S_MCLK
AU8
HDA_SYNC/I2S0_SFRM
AV11
HDA_BCLK/I2S0_SCLK
AW8
RSVD
AC4
RSVD
AL11
RSVD
AV2
I2S1_SCLK
AY8
SATALED
U3
JTAGX
AE63
RTCX2
AY5
SATA_RCOMP
C12
SATA_IREF
A12
SATA3GP/GPIO37
AC1
SATA2GP/GPIO36
V6
SATA1GP/GPIO35
U1
SATA0GP/GPIO34
V1
SATA_TP3/PETP6_L0
D17
SATA_TN3/PETN6_L0
C17
SATA_RP3/PERP6_L0
E5
SATA_RN3/PERN6_L0
F5
SATA_TP2/PETP6_L1
C15
SATA_TN2/PETN6_L1
B14
SATA_RN2/PERN6_L1
J6
SATA_RP2/PERP6_L1
H6
SATA_TP1/PETP6_L2
B17
SATA_TN1/PETN6_L2
A17
SATA_RN1/PERN6_L2
J8
SATA_RP1/PERP6_L2
H8
SATA_TP0/PETP6_L3
A15
SATA_TN0/PETN6_L3
B15
SATA_RP0/PERP6_L3
H5
SATA_RN0/PERN6_L3
J5
RTCX1
AW5
RTCRST
AU7
SRTCRST
AV6
INTVRMEN
AV7
INTRUDER
AU6
RC38
51_0402_5%
@
RC38
51_0402_5%
@
1
2
YC1
32.768KHZ Q13FC1350000500
UM A@
YC1
32.768KHZ Q13FC1350000500
UM A@
1
2
U1 6
74AUP1G07GW _TSSOP5
@
U1 6
74AUP1G07GW _TSSOP5
@
GND
3
A
2
NC
1
VCC
5
Y
4
CC86
.1U_0402_16V7K @
CC86
.1U_0402_16V7K @
1
2
RC356
1K_0402_5%
RC356
1K_0402_5% 1
2
CC4 18P_0402_50V8J
UM A@
CC4 18P_0402_50V8J
UM A@
1 2
RC35 1M_0402_5% RC35 1M_0402_5%
1
2
RC306 0_0201_5%
@
RC306 0_0201_5%
@
1
2
RG122
0_0402_5%
short@
RG122
0_0402_5%
short@
1
2
RC304
100_0402_1%
@
RC304
100_0402_1%
@
1 2
CC3
18P_0402_50V8J
UM A@
CC3
18P_0402_50V8J
UM A@
1 2
RC31 10M_0402_5%
UM A@
RC31 10M_0402_5%
UM A@
1
2
RC193 0_0201_5%
short@
RC193 0_0201_5%
short@
1
2
JXDP1
SAMTE_BSH-030-01-L-D-A
CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A
CONN@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDAT A_A0
9
OBSDAT A_A1
11
GND4
13
OBSDAT A_A2
15
OBSDAT A_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDAT A_B0
27
OBSDAT A_B1
29
GND10
31
OBSDAT A_B2
33
OBSDAT A_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1
2
OBSFN_C0
4
OBSFN_C1
6
GND3
8
OBSDAT A_C0
10
OBSDAT A_C1
12
GND5
14
OBSDAT A_C2
16
OBSDAT A_C3
18
GND7
20
OBSFN_D0
22
OBSFN_D1
24
GND9
26
OBSDAT A_D0
28
OBSDAT A_D1
30
GND11
32
OBSDAT A_D2
34
OBSDAT A_D3
36
GND13
38
ITPCLK/HOOK4
40
ITPCLK#/HOOK5
42
VCC_OBS_CD
44
RESET#/HOOK6
46
DBR#/HOOK7
48
GND15
50
TD0
52
TRST#
54
TDI
56
TMS
58
GND17
60
RC10 51_0402_1% RC10 51_0402_1%
1
2
RC194 0_0201_5%
short@
RC194 0_0201_5%
short@
1
2
JME1
SHORT PADS
JME1
SHORT PADS
1 2
RC301
100_0402_1%
@
RC301
100_0402_1%
@
1 2
CC127
0. 1U_0402_16V 4Z
CC127
0. 1U_0402_16V 4Z
1 2
JRTC1
LOTES_AAA-BAT-054-K01
CONN@JRTC1
LOTES_AAA-BAT-054-K01
CONN@
+
1
-
2
RC41
210_0402_5%
@
RC41
210_0402_5%
@
1 2
RC310 0_0402_5%
@
RC310 0_0402_5%
@
1
2
RC367
33_0402_5%
EMI@
RC367
33_0402_5%
EMI@
1
2
CC128
2. 2U_0402_6. 3V 6M
CC128
2. 2U_0402_6. 3V 6M
1 2
CM28 22P_0402_50V8J
@
CM28 22P_0402_50V8J
@
1
2
RC34 20K_0402_5% RC34 20K_0402_5%
1
2
CC16 0.1U_0402_16V7K CC16 0.1U_0402_16V7K
1
2
RC33
1K_0402_5%
RC33
1K_0402_5%
1
2
RC37 0_0201_5%
@
RC37 0_0201_5%
@
1
2
RC200 0_0201_5%
short@
RC200 0_0201_5%
short@
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
PCIE LAN
WLAN GPU
RF solution
SPI ROM (8MByte )
EON SA000046400 S IC FL 64M EN25Q64-104HIP SO
P 8P
MXIC SA00006N100 S IC FL 64M MX25L6473EM2I-10G
SOP 8P
WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC
8P SPI ROM
Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0F
SO8W 8P
<EC>
<XDP CLK >
Layout notes RC368 place near CPU RC369 place near EC RC56 place near SPI ROM
L
Layout notes avoid stub trace too long
L
SI phase : Modify CLK request channel 20141214
CPU THERMAL SENSOR
Address: 1001100xb NCT7718W (x is R/W bit)
SI : add CPU thermal sensor 12/23
SI
：
Change BOM con/ig
SI : add net name EC_SPI_CLK_R.
PV phase : Add pull-up at PCIECLKREQ1# 20150125
SML1CLK
SMBCLK
CPU_XTAL24_OUT CPU_XTAL24_IN
PCH_SPI_SIPCH_SPI_CS0#LPC_AD3 PCH_SPI_CLKLPC_AD0
SMBDATA
PCH_SPI_SOLPC_AD2 LPC_FRAME#LPC_AD1
SML1DATA
CLK_PCI_LPC CLK_PCI_TPM PCH_SPI_CLK_R
PCH_SPI_SIO2 PCH_SPI_SIO3
PCH_SPI_HOLD#
PCH_SPI_WP#
SMBCLK SMBDATA SML1CLK SML1DATASML0CLK SML0DATA
CPU_XTAL24_OUT
TESTLOW1 TESTLOW2 TESTLOW3 TESTLOW4
+1.05VS_AXCK_LCPLL
PCH_CLK_BIASREF
CLK_CPU_ITP# CLK_CPU_ITP
CLK_PCI_TPM
CLK_PCI1
CLK_PCI_LPC
CLK_PCI0 USB_CR_PWREN SMBALERT# SML0CLK SML0DATA SML1CLKSMBDATA SMBCLK SML1ALERT# SML1DATA
PCH_SPI_CLK_R
PCH_SPI_CLK_R
EC_SPI_CLK_R
PCH_SPI_CS0#_R
PCH_SPI_SO_R PCH_SPI_SI_R PCH_SPI_WP#
PCH_SPI_SIO2
PCH_SPI_HOLD#
PCH_SPI_SIO3
PCH_SPI_CS0#
PCH_SPI_CS0#_R
PCH_SPI_SO
PCH_SPI_SO_R PCH_SPI_SI_R
PCH_SPI_SI
PCH_SPI_CLK
PCH_SPI_CS0#_R
LAN_CLKREQ#
PCIECLKREQ0#
SMBDATASMBCLK
CPU_XTAL24_IN_R
PCH_GPIO33 WLAN_CLKREQ# PCIECLKREQ3#
PCH_SPI_SI_R PCH_SPI_CLK_R PCH_SPI_HOLD#
PCH_SPI_WP# PCH_SPI_CS0#_R PCH_SPI_SO_R
PCIECLKREQ0#
PCIECLKREQ3#
GPU_CLKREQ#
CPU_THERM#
H_THERMDA
H_THERMDC
EC_SMB_CK2 EC_SMB_DA2 ALERT_L
PCIECLKREQ1#
PCIECLKREQ1#
EC_SMB_CK2 <18,21,25,36>
PCH_SMBCLK <15,16,18,21,6>
PCH_SMBDATA <15,16,18,21,6>
CLK_PCIE_LAN
<22>
CLK_PCIE_LAN#
<22>
CLK_PCIE_WLAN#
<31>
CLK_PCIE_WLAN
<31>
LPC_AD3
<25,27>
LPC_AD0
<25,27>
LPC_FRAME#
<25,27>
LPC_AD2
<25,27>
LPC_AD1
<25,27>
EC_SMB_DA2 <18,21,25,36>
CLK_PCIE_GPU#
<35>
CLK_PCIE_GPU
<35>
MSATA_DET# <6> EC_KBRST# <25,9> XDP_DBRESET# <6,8>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,6,8,9>
+3V_PCH
<10,11,12,24,36,4,6,9>
+1.05VS_AXCK_LCPLL
<12>
CLK_PCI_TPM <27> CLK_PCI_LPC <25>
CPU_XTAL24_IN <28>
SMBALERT# <9> SML1ALERT# <9>
USB_CR_PWREN <8>
EC_SPI_CS0#
<25>
EC_SPI_SO
<25>
EC_SPI_SI
<25>
EC_SPI_CLK
<25>
CLK_CPU_ITP <6> CLK_CPU_ITP# <6>
TP_SMBDATA <26>TP_SMBCLK <26>
PCH_GPIO33 <9>
LAN_CLKREQ#
<22>
WLAN_CLKREQ#
<31>
GPU_CLKREQ#
<36>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS +3V_PCH+1.05VS_AXCK_LCPLL
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3VALW
+3V_PCH
+3V_PCH
+3VS
+3VS
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
CLK,SPI,SMB,LPC
C
761
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
CLK,SPI,SMB,LPC
C
761
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
CLK,SPI,SMB,LPC
C
761
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
CC10 18P_0402_50V8J UMA@ CC10 18P_0402_50V8J UMA@
1 2
RC96 33K_0402_5% RC96 33K_0402_5%
1
2
RC73
1K_0402_5%
RC73
1K_0402_5%
1
2
YC2
24MHZ 12PF 5YEA24000122IF40Q3
UMA@
YC2
24MHZ 12PF 5YEA24000122IF40Q3
UMA@
GND
2
3
3
1
1
GND
4
RC56 0_0402_5% RC56 0_0402_5%
1
2
RPH20
15_0804_8P4R_5%
RPH20
15_0804_8P4R_5%
1
8
2
7
3
6
4
5
CC119
2200P_0402_50V7K
CC119
2200P_0402_50V7K
1
2
UC2 W25Q64FVSSIQ_SO8UC2 W25Q64FVSSIQ_SO8
CLK
6
GND
4
DI(IO0)
5
DO(IO1)
2
/W P(IO2)
3
VCC
8
/HOLD(IO3)
7
/CS
1
RPH12
10K_0804_8P4R_5%
RPH12
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
CC120
0.1U_0402_16V4Z
CC120
0.1U_0402_16V4Z
1 2
RC125
10K_0402_5%
@
RC125
10K_0402_5%
@
1
2
QC7B
2N7002DWH_SOT363-6
TP@
QC7B
2N7002DWH_SOT363-6
TP@
3
4
5
RC368 0_0402_5%
EMI@
RC368 0_0402_5%
EMI@
1
2
RC78
10K_0402_5%
RC78
10K_0402_5%
12
UC3 NCT7718W_MSOP8UC3 NCT7718W_MSOP8
ALERT #
6
T_CRIT#
4
GND
5
D+
2
D-
3
SCL
8
SDA
7
VDD
1
RPH11
10K_0804_8P4R_5%
RPH11
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
CM33 22P_0402_50V8J
@RF@
CM33 22P_0402_50V8J
@RF@
1
2
RC376
10K_0402_5%
RC376
10K_0402_5%
1
2
RPH22 10K_0804_8P4R_5% RPH22 10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC369 0_0402_5%
EMI@
RC369 0_0402_5%
EMI@
1
2
QC2B
2N7002DWH_SOT363-6
QC2B
2N7002DWH_SOT363-6
3
4
5
RC81
10K_0402_5%
TP@RC81
10K_0402_5%
TP@
12
RC79 10K_0402_5% RC79 10K_0402_5%
12
RC48
1M_0402_5%
UMA@
RC48
1M_0402_5%
UMA@
1
2
RC62 22_0402_5%
EMI@
RC62 22_0402_5%
EMI@
1
2
RC80 3.3K_0402_5%
@
RC80 3.3K_0402_5%
@
12
CC9
18P_0402_50V8J
UMA@
CC9
18P_0402_50V8J
UMA@
1 2
RC82 10K_0402_5%
TP@
RC82 10K_0402_5%
TP@
12
RC52
3K_0402_1%
RC52
3K_0402_1% 1
2
QC2A 2N7002DWH_SOT363-6 QC2A 2N7002DWH_SOT363-6
6
1
2
RP2 2.2K_0804_8P4R_5% RP2 2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
QC6B
2N7002DWH_SOT363-6
QC6B
2N7002DWH_SOT363-6
3
4
5
RG120 0_0402_5% UMA@RG120 0_0402_5% UMA@
1
2
QC6A
2N7002DWH_SOT363-6
QC6A
2N7002DWH_SOT363-6
6
1
2
QC7A
2N7002DWH_SOT363-6
TP@
QC7A
2N7002DWH_SOT363-6
TP@
6
1
2
RC61 22_0402_5%
EMI@
RC61 22_0402_5%
EMI@
1
2
RC85 3.3K_0402_5% RC85 3.3K_0402_5%
1
2
RC97 33K_0402_5% RC97 33K_0402_5%
1
2
BDW_ULT_DDR3L(Interleaved)
LPC
SMBUS C-LINK
SPI
7 OF 19
UCPU1G BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
LPC
SMBUS C-LINK
SPI
7 OF 19
UCPU1G BDW- ULT- DDR3L- I L_BG A1168
CL_RST
AF4
CL_DATA
AD2
CL_CLK
AF2
SML1CLK/GPIO75
AU3
SML1DAT A/GPIO74
AH3
SML1ALERT /PCHHOT /GPIO73
AU4
SML0DAT A
AK1
SML0CLK
AN1
SMBDAT A
AH1
SML0ALERT /GPIO60
AL2
SMBCLK
AP2
SMBALERT /GPIO11
AN2
SPI_IO3
AF1
SPI_IO2
Y6
SPI_MISO
AA4
SPI_MOSI
AA2
SPI_CS2
AC2
SPI_CS1
Y4
SPI_CLK
AA3
SPI_CS0
Y7
LFRAME
AV12
LAD3
AW 11
LAD2
AY12
LAD1
AW 12
LAD0
AU14
C4965
0.1U_0402_16V4Z
C4965
0.1U_0402_16V4Z
1 2
CM31 22P_0402_50V8J
@RF@
CM31 22P_0402_50V8J
@RF@
1
2
RC84
3.3K_0402_5%
RC84
3.3K_0402_5%
1
2
CM30 22P_0402_50V8J
@RF@
CM30 22P_0402_50V8J
@RF@
1
2
CLOCK SIGNALS
BDW_ULT_DDR3L(Interleaved)
6 OF 19
UCPU1F BDW- ULT- DDR3L- I L_BG A1168
CLOCK SIGNALS
BDW_ULT_DDR3L(Interleaved)
6 OF 19
UCPU1F BDW- ULT- DDR3L- I L_BG A1168
CLKOUT_PCIE_N1
B41
CLKOUT_PCIE_P1
A41
PCIECLKRQ1/GPIO19
Y5
PCIECLKRQ0/GPIO18
U2
CLKOUT_PCIE_P0
C42
CLKOUT_ITPXDP
B35
CLKOUT_LPC_0
AN15
CLKOUT_LPC_1
AP15
PCIECLKRQ4/GPIO22
U5
CLKOUT_PCIE_P4
B39
CLKOUT_PCIE_N4
A39
PCIECLKRQ3/GPIO21
N1
CLKOUT_PCIE_N0
C43
XT AL24_OUT
B25
XT AL24_IN
A25
PCIECLKRQ5/GPIO23
T2
CLKOUT_PCIE_P5
A37
CLKOUT_PCIE_N5
B37
CLKOUT_PCIE_P3
C37
CLKOUT_PCIE_N3
B38
PCIECLKRQ2/GPIO20
AD1
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
B42
DIFFCLK_BIASREF
C26
RSVD
K21
RSVD
M21
TESTLOW_C35
C35
TESTLOW_C34
C34
TESTLOW_AK8
AK8
TESTLOW_AL8
AL8
CLKOUT_ITPXDP_P
A35
RC72
1K_0402_5%
RC72
1K_0402_5%
1
2
RPH19
15_0804_8P4R_5%
RPH19
15_0804_8P4R_5%
1
8
2
7
3
6
4
5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
PCIE LAN
WLAN GPU
RF solution
SPI ROM (8MByte )
EON SA000046400 S IC FL 64M EN25Q64-104HIP SO
P 8P
MXIC SA00006N100 S IC FL 64M MX25L6473EM2I-10G
SOP 8P
WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC
8P SPI ROM
Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0F
SO8W 8P
<EC>
<XDP CLK >
Layout notes RC368 place near CPU RC369 place near EC RC56 place near SPI ROM
L
Layout notes avoid stub trace too long
L
SI phase : Modify CLK request channel 20141214
CPU THERMAL SENSOR
Address: 1001100xb NCT7718W (x is R/W bit)
SI : add CPU thermal sensor 12/23
SI
：
Change BOM con/ig
SI : add net name EC_SPI_CLK_R.
PV phase : Add pull-up at PCIECLKREQ1# 20150125
SML1CLK
SMBCLK
CPU_XTAL24_OUT CPU_XTAL24_IN
PCH_SPI_SIPCH_SPI_CS0#LPC_AD3 PCH_SPI_CLKLPC_AD0
SMBDATA
PCH_SPI_SOLPC_AD2 LPC_FRAME#LPC_AD1
SML1DATA
CLK_PCI_LPC CLK_PCI_TPM PCH_SPI_CLK_R
PCH_SPI_SIO2 PCH_SPI_SIO3
PCH_SPI_HOLD#
PCH_SPI_WP#
SMBCLK SMBDATA SML1CLK SML1DATASML0CLK SML0DATA
CPU_XTAL24_OUT
TESTLOW1 TESTLOW2 TESTLOW3 TESTLOW4
+1.05VS_AXCK_LCPLL
PCH_CLK_BIASREF
CLK_CPU_ITP# CLK_CPU_ITP
CLK_PCI_TPM
CLK_PCI1
CLK_PCI_LPC
CLK_PCI0 USB_CR_PWREN SMBALERT# SML0CLK SML0DATA SML1CLKSMBDATA SMBCLK SML1ALERT# SML1DATA
PCH_SPI_CLK_R
PCH_SPI_CLK_R
EC_SPI_CLK_R
PCH_SPI_CS0#_R
PCH_SPI_SO_R PCH_SPI_SI_R PCH_SPI_WP#
PCH_SPI_SIO2
PCH_SPI_HOLD#
PCH_SPI_SIO3
PCH_SPI_CS0#
PCH_SPI_CS0#_R
PCH_SPI_SO
PCH_SPI_SO_R PCH_SPI_SI_R
PCH_SPI_SI
PCH_SPI_CLK
PCH_SPI_CS0#_R
LAN_CLKREQ#
PCIECLKREQ0#
SMBDATASMBCLK
CPU_XTAL24_IN_R
PCH_GPIO33 WLAN_CLKREQ# PCIECLKREQ3#
PCH_SPI_SI_R PCH_SPI_CLK_R PCH_SPI_HOLD#
PCH_SPI_WP# PCH_SPI_CS0#_R PCH_SPI_SO_R
PCIECLKREQ0#
PCIECLKREQ3#
GPU_CLKREQ#
CPU_THERM#
H_THERMDA
H_THERMDC
EC_SMB_CK2 EC_SMB_DA2 ALERT_L
PCIECLKREQ1#
PCIECLKREQ1#
EC_SMB_CK2 <18,21,25,36>
PCH_SMBCLK <15,16,18,21,6>
PCH_SMBDATA <15,16,18,21,6>
CLK_PCIE_LAN
<22>
CLK_PCIE_LAN#
<22>
CLK_PCIE_WLAN#
<31>
CLK_PCIE_WLAN
<31>
LPC_AD3
<25,27>
LPC_AD0
<25,27>
LPC_FRAME#
<25,27>
LPC_AD2
<25,27>
LPC_AD1
<25,27>
EC_SMB_DA2 <18,21,25,36>
CLK_PCIE_GPU#
<35>
CLK_PCIE_GPU
<35>
MSATA_DET# <6> EC_KBRST# <25,9> XDP_DBRESET# <6,8>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,6,8,9>
+3V_PCH
<10,11,12,24,36,4,6,9>
+1.05VS_AXCK_LCPLL
<12>
CLK_PCI_TPM <27> CLK_PCI_LPC <25>
CPU_XTAL24_IN <28>
SMBALERT# <9> SML1ALERT# <9>
USB_CR_PWREN <8>
EC_SPI_CS0#
<25>
EC_SPI_SO
<25>
EC_SPI_SI
<25>
EC_SPI_CLK
<25>
CLK_CPU_ITP <6> CLK_CPU_ITP# <6>
TP_SMBDATA <26>TP_SMBCLK <26>
PCH_GPIO33 <9>
LAN_CLKREQ#
<22>
WLAN_CLKREQ#
<31>
GPU_CLKREQ#
<36>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS +3V_PCH+1.05VS_AXCK_LCPLL
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3VALW
+3V_PCH
+3V_PCH
+3VS
+3VS
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
CLK,SPI,SMB,LPC
C
761
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
CLK,SPI,SMB,LPC
C
761
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
CLK,SPI,SMB,LPC
C
761
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
CC10 18P_0402_50V8J UMA@ CC10 18P_0402_50V8J UMA@
1 2
RC96 33K_0402_5% RC96 33K_0402_5%
1
2
RC73
1K_0402_5%
RC73
1K_0402_5%
1
2
YC2
24MHZ 12PF 5YEA24000122IF40Q3
UMA@
YC2
24MHZ 12PF 5YEA24000122IF40Q3
UMA@
GND
2
3
3
1
1
GND
4
RC56 0_0402_5% RC56 0_0402_5%
1
2
RPH20
15_0804_8P4R_5%
RPH20
15_0804_8P4R_5%
1
8
2
7
3
6
4
5
CC119
2200P_0402_50V7K
CC119
2200P_0402_50V7K
1
2
UC2 W25Q64FVSSIQ_SO8UC2 W25Q64FVSSIQ_SO8
CLK
6
GND
4
DI(IO0)
5
DO(IO1)
2
/W P(IO2)
3
VCC
8
/HOLD(IO3)
7
/CS
1
RPH12
10K_0804_8P4R_5%
RPH12
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
CC120
0.1U_0402_16V4Z
CC120
0.1U_0402_16V4Z
1 2
RC125
10K_0402_5%
@
RC125
10K_0402_5%
@
1
2
QC7B
2N7002DWH_SOT363-6
TP@
QC7B
2N7002DWH_SOT363-6
TP@
3
4
5
RC368 0_0402_5%
EMI@
RC368 0_0402_5%
EMI@
1
2
RC78
10K_0402_5%
RC78
10K_0402_5%
12
UC3 NCT7718W_MSOP8UC3 NCT7718W_MSOP8
ALERT #
6
T_CRIT#
4
GND
5
D+
2
D-
3
SCL
8
SDA
7
VDD
1
RPH11
10K_0804_8P4R_5%
RPH11
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
CM33 22P_0402_50V8J
@RF@
CM33 22P_0402_50V8J
@RF@
1
2
RC376
10K_0402_5%
RC376
10K_0402_5%
1
2
RPH22 10K_0804_8P4R_5% RPH22 10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC369 0_0402_5%
EMI@
RC369 0_0402_5%
EMI@
1
2
QC2B
2N7002DWH_SOT363-6
QC2B
2N7002DWH_SOT363-6
3
4
5
RC81
10K_0402_5%
TP@RC81
10K_0402_5%
TP@
12
RC79 10K_0402_5% RC79 10K_0402_5%
12
RC48
1M_0402_5%
UMA@
RC48
1M_0402_5%
UMA@
1
2
RC62 22_0402_5%
EMI@
RC62 22_0402_5%
EMI@
1
2
RC80 3.3K_0402_5%
@
RC80 3.3K_0402_5%
@
12
CC9
18P_0402_50V8J
UMA@
CC9
18P_0402_50V8J
UMA@
1 2
RC82 10K_0402_5%
TP@
RC82 10K_0402_5%
TP@
12
RC52
3K_0402_1%
RC52
3K_0402_1% 1
2
QC2A 2N7002DWH_SOT363-6 QC2A 2N7002DWH_SOT363-6
6
1
2
RP2 2.2K_0804_8P4R_5% RP2 2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
QC6B
2N7002DWH_SOT363-6
QC6B
2N7002DWH_SOT363-6
3
4
5
RG120 0_0402_5% UMA@RG120 0_0402_5% UMA@
1
2
QC6A
2N7002DWH_SOT363-6
QC6A
2N7002DWH_SOT363-6
6
1
2
QC7A
2N7002DWH_SOT363-6
TP@
QC7A
2N7002DWH_SOT363-6
TP@
6
1
2
RC61 22_0402_5%
EMI@
RC61 22_0402_5%
EMI@
1
2
RC85 3.3K_0402_5% RC85 3.3K_0402_5%
1
2
RC97 33K_0402_5% RC97 33K_0402_5%
1
2
BDW_ULT_DDR3L(Interleaved)
LPC
SMBUS C-LINK
SPI
7 OF 19
UCPU1G BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
LPC
SMBUS C-LINK
SPI
7 OF 19
UCPU1G BDW- ULT- DDR3L- I L_BG A1168
CL_RST
AF4
CL_DATA
AD2
CL_CLK
AF2
SML1CLK/GPIO75
AU3
SML1DAT A/GPIO74
AH3
SML1ALERT /PCHHOT /GPIO73
AU4
SML0DAT A
AK1
SML0CLK
AN1
SMBDAT A
AH1
SML0ALERT /GPIO60
AL2
SMBCLK
AP2
SMBALERT /GPIO11
AN2
SPI_IO3
AF1
SPI_IO2
Y6
SPI_MISO
AA4
SPI_MOSI
AA2
SPI_CS2
AC2
SPI_CS1
Y4
SPI_CLK
AA3
SPI_CS0
Y7
LFRAME
AV12
LAD3
AW 11
LAD2
AY12
LAD1
AW 12
LAD0
AU14
C4965
0.1U_0402_16V4Z
C4965
0.1U_0402_16V4Z
1 2
CM31 22P_0402_50V8J
@RF@
CM31 22P_0402_50V8J
@RF@
1
2
RC84
3.3K_0402_5%
RC84
3.3K_0402_5%
1
2
CM30 22P_0402_50V8J
@RF@
CM30 22P_0402_50V8J
@RF@
1
2
CLOCK SIGNALS
BDW_ULT_DDR3L(Interleaved)
6 OF 19
UCPU1F BDW- ULT- DDR3L- I L_BG A1168
CLOCK SIGNALS
BDW_ULT_DDR3L(Interleaved)
6 OF 19
UCPU1F BDW- ULT- DDR3L- I L_BG A1168
CLKOUT_PCIE_N1
B41
CLKOUT_PCIE_P1
A41
PCIECLKRQ1/GPIO19
Y5
PCIECLKRQ0/GPIO18
U2
CLKOUT_PCIE_P0
C42
CLKOUT_ITPXDP
B35
CLKOUT_LPC_0
AN15
CLKOUT_LPC_1
AP15
PCIECLKRQ4/GPIO22
U5
CLKOUT_PCIE_P4
B39
CLKOUT_PCIE_N4
A39
PCIECLKRQ3/GPIO21
N1
CLKOUT_PCIE_N0
C43
XT AL24_OUT
B25
XT AL24_IN
A25
PCIECLKRQ5/GPIO23
T2
CLKOUT_PCIE_P5
A37
CLKOUT_PCIE_N5
B37
CLKOUT_PCIE_P3
C37
CLKOUT_PCIE_N3
B38
PCIECLKRQ2/GPIO20
AD1
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
B42
DIFFCLK_BIASREF
C26
RSVD
K21
RSVD
M21
TESTLOW_C35
C35
TESTLOW_C34
C34
TESTLOW_AK8
AK8
TESTLOW_AL8
AL8
CLKOUT_ITPXDP_P
A35
RC72
1K_0402_5%
RC72
1K_0402_5%
1
2
RPH19
15_0804_8P4R_5%
RPH19
15_0804_8P4R_5%
1
8
2
7
3
6
4
5
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
<HDMI>
<HDMI>
<eDP HPD>
L:DisableDSWODVREN - On Die DSW VR Enable
*
Deep S3
Deep S3 RC93-->SMT Non Deep S3 RC91-->SMT
Deep S3 RC286-->SMT
Non Deep S3 RC286-->@
H:Enable
<CPU>
DP TO CRT HPD ( RTD2168)
DP TO CRT ( RTD2168)
Displayport Port C Enable pin RC102 pull high +3VS
DB phase : For ESD request 20141117
SI: pop D25
PV:RC300 change to 0-ohm shortpad
PV:RC114,RC115,RC116,RC118,RC121,RC122 change to 0-ohm shortpad
SUSACK#_R
PM_PWROK_R
PBTN_OUT#_R PM_BATLOW#
PCH_PCIE_WAKE#
PCH_RSMRST#
SUSWARN#_R
DSWODVREN SUS_STAT#
PLT_RST#_PCH
SYS_PWROK
BKL_PWM_CPU_R ENBKL_CPU ENVDD_CPU_R
DGPU_PWR_EN_CPU DGPU_HOLD_RST#_CPU
PCH_HP_DET PCH_GPIO80ENVDD_CPU
PCH_SLP_WLAN#
PCH_DPWROK_R
DGPU_PWROK_CPU
DSWODVREN
PCH_MC_WAKE#
DEVSLP1
DSWODVREN
PM_SLP_S3#
PM_SLP_S0#_R
PM_SLP_S0#_R
PCH_RSMRST#
PLT_RST#_PCH
PCH_DPWROK_R
SYS_PWROK
PM_CLKRUN#
PCH_HP_DET PCH_MIC_DET
USB_CR_PWREN ACIN_R
ACIN_R
PCH_GPIO80
PCH_PWROK
AOAC_PME#_R
PCH_PWROK
PM_BATLOW# PCH_SLP_WLAN#
SUSCLK
SYS_PWROK
SUSACK# PM_PWROK_R
SYS_RESET#
PCH_MC_WAKE#
AOAC_PME#
APWROK_R
SUSACK#
<25>
ACIN
<25,36,47>
PBTN_OUT#
<25,6>
PCH_RSMRST#
<25>
PCH_SUSWARN#
<25>
PM_SLP_S5# <25>
PM_SLP_SUS# <25> PM_SLP_S3# <25> PM_SLP_S4# <25> PCH_DDPB_CLK <20> PCH_DDPB_DAT <20>
PCH_DDPB_HPD <20>
ENVDD_CPU
<19>
ENBKL
<25>
BKL_PWM_CPU
<18,19>
EDP_HPD <18>
PCH_DPWROK <25>
PCH_PWROK
<25>
PLT_RST#
<22,25,27,31,35,6>
PCH_PCIE_WAKE# <31>
PM_CLKRUN# <25>
AOAC_PME#
<25>
SYS_PWROK
<25,6>
SUSWARN#_R
<9>
USB_CR_PWREN
<7>
DDI2_AUX_DP <21> DDI2_AUX_DN <21>
DDI2_HPD <21>
DEVSLP1 <9>
SPOK <48>
XDP_DBRESET#
<6,7>
+3V_PCH
<10,11,12,24,36,4,6,7,9>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,6,7,9>
+RTCVCC
<12,28,6>
+3V_DSW_P
<12,9>
SUSCLK <31>
DGPU_PWR_EN
<25,37,54,9>
DGPU_HOLD_RST#
<35,9>
DGPU_PWROK
<36,9>
+3VS
+3VS
+RTCVCC
+3V_DSW_P
+3VS
+3V_DSW_P
+3VS
+3V_PCH +3VS+RTCVCC +3V_DSW_P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PM,GPIO,DDI
C
861
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PM,GPIO,DDI
C
861
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PM,GPIO,DDI
C
861
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC122 0_0402_5%
short@
RC122 0_0402_5%
short@
1
2
RC371 0_0201_5%
short@
RC371 0_0201_5%
short@
1
2
RC93 0_0201_5%
short@
RC93 0_0201_5%
short@
1
2
RC305 0_0402_5%
@
RC305 0_0402_5%
@
1
2
RC106 10K_0402_5% RC106 10K_0402_5%
1
2
RC91 0_0201_5%
@
RC91 0_0201_5%
@
1
2
T147 PAD
@
T147 PAD
@
RC104 0_0201_5%
short@
RC104 0_0201_5%
short@
1
2
T143 PAD @T143 PAD @
RC107 2.2K_0402_5%
@
RC107 2.2K_0402_5%
@
1
2
RC101 10K_0402_5% RC101 10K_0402_5%
1
2
RC254 330K_0402_5% RC254 330K_0402_5%
1
2
UC9
SN74AHC1G08DCKR_SC70-5
@
UC9
SN74AHC1G08DCKR_SC70-5
@
IN1
1
IN2
2
G
3
O
4
P
5
BDW_ULT_DDR3L(Interleaved)
eDP SIDEBAND
PCIE
DISPLAY
9 OF 19
UCPU1I BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
eDP SIDEBAND
PCIE
DISPLAY
9 OF 19
UCPU1I BDW- ULT- DDR3L- I L_BG A1168
DDPC_AUXN
B6
DDPC_AUXP
A6
DDPB_AUXP
B5
EDP_BKLEN
A9
GPIO53
L4
GPIO51
R5
GPIO54
L3
GPIO52
L1
GPIO55
U7
PME
AD4
PIRQD/GPIO80
N2
PIRQC/GPIO79
N4
DDPB_CTRLCLK
B9
DDPB_CTRLDATA
C9
DDPC_CTRLCLK
D9
DDPC_CTRLDATA
D11
DDPB_HPD
C8
EDP_HPD
D6
DDPC_HPD
A8
DDPB_AUXN
C5
EDP_VDDEN
C6
EDP_BKLCT L
B8
PIRQA/GPIO77
U6
PIRQB/GPIO78
P4
D24 CK0402101V05_0402-2
@ESD@
D24 CK0402101V05_0402-2
@ESD@
1
2
RC269 0_0201_5%
@
RC269 0_0201_5%
@
1
2
RC102 2.2K_0402_5% RC102 2.2K_0402_5%
1
2
RC120 100K_0402_5% RC120 100K_0402_5%
1
2
D25 CK0402101V05_0402-2
ESD@
SCV00001K00D25 CK0402101V05_0402-2
ESD@
SCV00001K00
1
2
RC115 0_0402_5%
short@
RC115 0_0402_5%
short@
1
2
T145 PAD
@
T145 PAD
@
RC100 0_0201_5%
short@
RC100 0_0201_5%
short@
1
2
RC286 0_0201_5%
short@
RC286 0_0201_5%
short@
1
2
RC110 8.2K_0402_5% RC110 8.2K_0402_5%
1
2
RC116 0_0402_5%
short@
RC116 0_0402_5%
short@
1
2
DC3
CH751H-40PT_SOD323-2
DC3
CH751H-40PT_SOD323-2
2
1
RC94 0_0201_5%
short@
RC94 0_0201_5%
short@
1
2
DC2
CH751H-40PT_SOD323-2
DC2
CH751H-40PT_SOD323-2
2
1
RC121 0_0402_5%
short@
RC121 0_0402_5%
short@
1
2
RPH15
10K_0804_8P4R_5%
RPH15
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC109 10K_0402_5% RC109 10K_0402_5%
1
2
RC112 100K_0402_5% RC112 100K_0402_5%
1
2
C592
0.047U_0402_16V7K
ESD@
C592
0.047U_0402_16V7K
ESD@
1
2
RC98 1K_0402_5% RC98 1K_0402_5%
1
2
T142 PAD
@
T142 PAD
@
RC268 0_0201_5%
short@
RC268 0_0201_5%
short@
1
2
RC316 0_0201_5%
short@
RC316 0_0201_5%
short@
1
2
RC118 0_0402_5%
short@
RC118 0_0402_5%
short@
1
2 T154
PAD
@
T154
PAD
@
BDW_ULT_DDR3L(Interleaved)
SYSTEM POWER MANAGEMENT
8 OF 19
UCPU1H BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
SYSTEM POWER MANAGEMENT
8 OF 19
UCPU1H BDW- ULT- DDR3L- I L_BG A1168
SLP_A
AL5
SLP_SUS
AP4
SLP_LAN
AJ7
SLP_S3
AT 4
SLP_S5/GPIO63
AP5
SLP_S4
AJ6
SUSCLK/GPIO62
AE6
CLKRUN/GPIO32
V5
SUS_ST AT /GPIO61
AG4
WAKE
AJ5
DSW VRMEN
AW 7
DPW ROK
AV5
SLP_W LAN/GPIO29
AM5
SLP_S0
AF3
SUSW ARN/SUSPW RDNACK/GPIO30
AV4
PW RBT N
AL7
BAT LOW /GPIO72
AN4
ACPRESENT /GPIO31
AJ8
RSMRST
AW 6
PCH_PW ROK
AY7
SUSACK
AK2
PLT RST
AG7
APW ROK
AB5
SYS_PW ROK
AG2
SYS_RESET
AC3
DC4
CH751H-40PT_SOD323-2
DC4
CH751H-40PT_SOD323-2
2
1
RC103 0_0201_5%
short@
RC103 0_0201_5%
short@
1
2
T83
PAD
T83
PAD
RC255 330K_0402_5%
@
RC255 330K_0402_5%
@
1
2
RC300
0_0402_5%
short@
RC300
0_0402_5%
short@
1
2
RC114 0_0402_5%
short@
RC114 0_0402_5%
short@
1
2
RPH27
10K_0804_8P4R_5%
RPH27
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
C127
0.1U_0402_10V6K
@ESD@
C127
0.1U_0402_10V6K
@ESD@
1 2
RC99 0_0201_5%
short@
RC99 0_0201_5%
short@
1
2
T144 PAD
@
T144 PAD
@
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
<HDMI>
<HDMI>
<eDP HPD>
L:DisableDSWODVREN - On Die DSW VR Enable
*
Deep S3
Deep S3 RC93-->SMT Non Deep S3 RC91-->SMT
Deep S3 RC286-->SMT
Non Deep S3 RC286-->@
H:Enable
<CPU>
DP TO CRT HPD ( RTD2168)
DP TO CRT ( RTD2168)
Displayport Port C Enable pin RC102 pull high +3VS
DB phase : For ESD request 20141117
SI: pop D25
PV:RC300 change to 0-ohm shortpad
PV:RC114,RC115,RC116,RC118,RC121,RC122 change to 0-ohm shortpad
SUSACK#_R
PM_PWROK_R
PBTN_OUT#_R PM_BATLOW#
PCH_PCIE_WAKE#
PCH_RSMRST#
SUSWARN#_R
DSWODVREN SUS_STAT#
PLT_RST#_PCH
SYS_PWROK
BKL_PWM_CPU_R ENBKL_CPU ENVDD_CPU_R
DGPU_PWR_EN_CPU DGPU_HOLD_RST#_CPU
PCH_HP_DET PCH_GPIO80ENVDD_CPU
PCH_SLP_WLAN#
PCH_DPWROK_R
DGPU_PWROK_CPU
DSWODVREN
PCH_MC_WAKE#
DEVSLP1
DSWODVREN
PM_SLP_S3#
PM_SLP_S0#_R
PM_SLP_S0#_R
PCH_RSMRST#
PLT_RST#_PCH
PCH_DPWROK_R
SYS_PWROK
PM_CLKRUN#
PCH_HP_DET PCH_MIC_DET
USB_CR_PWREN ACIN_R
ACIN_R
PCH_GPIO80
PCH_PWROK
AOAC_PME#_R
PCH_PWROK
PM_BATLOW# PCH_SLP_WLAN#
SUSCLK
SYS_PWROK
SUSACK# PM_PWROK_R
SYS_RESET#
PCH_MC_WAKE#
AOAC_PME#
APWROK_R
SUSACK#
<25>
ACIN
<25,36,47>
PBTN_OUT#
<25,6>
PCH_RSMRST#
<25>
PCH_SUSWARN#
<25>
PM_SLP_S5# <25>
PM_SLP_SUS# <25> PM_SLP_S3# <25> PM_SLP_S4# <25> PCH_DDPB_CLK <20> PCH_DDPB_DAT <20>
PCH_DDPB_HPD <20>
ENVDD_CPU
<19>
ENBKL
<25>
BKL_PWM_CPU
<18,19>
EDP_HPD <18>
PCH_DPWROK <25>
PCH_PWROK
<25>
PLT_RST#
<22,25,27,31,35,6>
PCH_PCIE_WAKE# <31>
PM_CLKRUN# <25>
AOAC_PME#
<25>
SYS_PWROK
<25,6>
SUSWARN#_R
<9>
USB_CR_PWREN
<7>
DDI2_AUX_DP <21> DDI2_AUX_DN <21>
DDI2_HPD <21>
DEVSLP1 <9>
SPOK <48>
XDP_DBRESET#
<6,7>
+3V_PCH
<10,11,12,24,36,4,6,7,9>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,6,7,9>
+RTCVCC
<12,28,6>
+3V_DSW_P
<12,9>
SUSCLK <31>
DGPU_PWR_EN
<25,37,54,9>
DGPU_HOLD_RST#
<35,9>
DGPU_PWROK
<36,9>
+3VS
+3VS
+RTCVCC
+3V_DSW_P
+3VS
+3V_DSW_P
+3VS
+3V_PCH +3VS+RTCVCC +3V_DSW_P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PM,GPIO,DDI
C
861
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PM,GPIO,DDI
C
861
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PM,GPIO,DDI
C
861
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC122 0_0402_5%
short@
RC122 0_0402_5%
short@
1
2
RC371 0_0201_5%
short@
RC371 0_0201_5%
short@
1
2
RC93 0_0201_5%
short@
RC93 0_0201_5%
short@
1
2
RC305 0_0402_5%
@
RC305 0_0402_5%
@
1
2
RC106 10K_0402_5% RC106 10K_0402_5%
1
2
RC91 0_0201_5%
@
RC91 0_0201_5%
@
1
2
T147 PAD
@
T147 PAD
@
RC104 0_0201_5%
short@
RC104 0_0201_5%
short@
1
2
T143 PAD @T143 PAD @
RC107 2.2K_0402_5%
@
RC107 2.2K_0402_5%
@
1
2
RC101 10K_0402_5% RC101 10K_0402_5%
1
2
RC254 330K_0402_5% RC254 330K_0402_5%
1
2
UC9
SN74AHC1G08DCKR_SC70-5
@
UC9
SN74AHC1G08DCKR_SC70-5
@
IN1
1
IN2
2
G
3
O
4
P
5
BDW_ULT_DDR3L(Interleaved)
eDP SIDEBAND
PCIE
DISPLAY
9 OF 19
UCPU1I BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
eDP SIDEBAND
PCIE
DISPLAY
9 OF 19
UCPU1I BDW- ULT- DDR3L- I L_BG A1168
DDPC_AUXN
B6
DDPC_AUXP
A6
DDPB_AUXP
B5
EDP_BKLEN
A9
GPIO53
L4
GPIO51
R5
GPIO54
L3
GPIO52
L1
GPIO55
U7
PME
AD4
PIRQD/GPIO80
N2
PIRQC/GPIO79
N4
DDPB_CTRLCLK
B9
DDPB_CTRLDATA
C9
DDPC_CTRLCLK
D9
DDPC_CTRLDATA
D11
DDPB_HPD
C8
EDP_HPD
D6
DDPC_HPD
A8
DDPB_AUXN
C5
EDP_VDDEN
C6
EDP_BKLCT L
B8
PIRQA/GPIO77
U6
PIRQB/GPIO78
P4
D24 CK0402101V05_0402-2
@ESD@
D24 CK0402101V05_0402-2
@ESD@
1
2
RC269 0_0201_5%
@
RC269 0_0201_5%
@
1
2
RC102 2.2K_0402_5% RC102 2.2K_0402_5%
1
2
RC120 100K_0402_5% RC120 100K_0402_5%
1
2
D25 CK0402101V05_0402-2
ESD@
SCV00001K00D25 CK0402101V05_0402-2
ESD@
SCV00001K00
1
2
RC115 0_0402_5%
short@
RC115 0_0402_5%
short@
1
2
T145 PAD
@
T145 PAD
@
RC100 0_0201_5%
short@
RC100 0_0201_5%
short@
1
2
RC286 0_0201_5%
short@
RC286 0_0201_5%
short@
1
2
RC110 8.2K_0402_5% RC110 8.2K_0402_5%
1
2
RC116 0_0402_5%
short@
RC116 0_0402_5%
short@
1
2
DC3
CH751H-40PT_SOD323-2
DC3
CH751H-40PT_SOD323-2
2
1
RC94 0_0201_5%
short@
RC94 0_0201_5%
short@
1
2
DC2
CH751H-40PT_SOD323-2
DC2
CH751H-40PT_SOD323-2
2
1
RC121 0_0402_5%
short@
RC121 0_0402_5%
short@
1
2
RPH15
10K_0804_8P4R_5%
RPH15
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC109 10K_0402_5% RC109 10K_0402_5%
1
2
RC112 100K_0402_5% RC112 100K_0402_5%
1
2
C592
0.047U_0402_16V7K
ESD@
C592
0.047U_0402_16V7K
ESD@
1
2
RC98 1K_0402_5% RC98 1K_0402_5%
1
2
T142 PAD
@
T142 PAD
@
RC268 0_0201_5%
short@
RC268 0_0201_5%
short@
1
2
RC316 0_0201_5%
short@
RC316 0_0201_5%
short@
1
2
RC118 0_0402_5%
short@
RC118 0_0402_5%
short@
1
2 T154
PAD
@
T154
PAD
@
BDW_ULT_DDR3L(Interleaved)
SYSTEM POWER MANAGEMENT
8 OF 19
UCPU1H BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
SYSTEM POWER MANAGEMENT
8 OF 19
UCPU1H BDW- ULT- DDR3L- I L_BG A1168
SLP_A
AL5
SLP_SUS
AP4
SLP_LAN
AJ7
SLP_S3
AT 4
SLP_S5/GPIO63
AP5
SLP_S4
AJ6
SUSCLK/GPIO62
AE6
CLKRUN/GPIO32
V5
SUS_ST AT /GPIO61
AG4
WAKE
AJ5
DSW VRMEN
AW 7
DPW ROK
AV5
SLP_W LAN/GPIO29
AM5
SLP_S0
AF3
SUSW ARN/SUSPW RDNACK/GPIO30
AV4
PW RBT N
AL7
BAT LOW /GPIO72
AN4
ACPRESENT /GPIO31
AJ8
RSMRST
AW 6
PCH_PW ROK
AY7
SUSACK
AK2
PLT RST
AG7
APW ROK
AB5
SYS_PW ROK
AG2
SYS_RESET
AC3
DC4
CH751H-40PT_SOD323-2
DC4
CH751H-40PT_SOD323-2
2
1
RC103 0_0201_5%
short@
RC103 0_0201_5%
short@
1
2
T83
PAD
T83
PAD
RC255 330K_0402_5%
@
RC255 330K_0402_5%
@
1
2
RC300
0_0402_5%
short@
RC300
0_0402_5%
short@
1
2
RC114 0_0402_5%
short@
RC114 0_0402_5%
short@
1
2
RPH27
10K_0804_8P4R_5%
RPH27
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
C127
0.1U_0402_10V6K
@ESD@
C127
0.1U_0402_10V6K
@ESD@
1 2
RC99 0_0201_5%
short@
RC99 0_0201_5%
short@
1
2
T144 PAD
@
T144 PAD
@
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Dummy
GPIO27
*
PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable Low: VCCVRM VR Disable
0
SPI
*
Boot BIOS Location
PCH_GPIO86
Boot BIOS Strap
Layout notes DG V0.9 PCH_OPIRCOMP Width=12mil,spacing=12mil Max length=500mil
L
<SI> PRH14.4 change from +3V_PCH to +3VS for S3 leakage
<PV>PRH14 change to RPH23. PRH15 change to RPH24. PRH16 change to RPH25.
PV:RC124 change to 0-ohm shortpad
I2C_1_SDA
EC_KBRST# PCH_OPIRCOMP
EC_SCI#
H_THERMTRIP#_C SERIRQ
EC_LID_OUT# PCH_AUDIO_PW REN
I2C_1_SCL
PCH_GPIO85
NGFF_W IFI_3.3_PW REN SATA1_PW REN
USB32_P0_PW REN_R# USB_CAM_PW REN PCH_GPIO9
WWAN_PWREN
PCH_GPIO33BT_ON
EC_FB_CLAMP_TGL_REQ#
DEVSLP1
H_THEMTRIP#
LPDDR3_ID1
DGPU_PRSNT#
LPDDR3_ID1 LPDDR3_ID2
DGPU_PRSNT#
LPDDR3_ID2
MSATA_SSD_PW REN
LAN_PW R_EN
PCH_GPIO58
EC_PME#
WL_OFF#UART_W AKE#
PCH_LAN_W AKE# PCH_LAN_RST# PCH_CR_W AKE# PCH_CR_RST#
HDA_SPKR
TOUCH_PANEL_PW REN
NGFF_W IFI_3.3_PW REN WWAN_PWREN MSATA_SSD_PW REN TOUCH_PANEL_PW REN
PCH_CR_RST# PCH_CR_W AKE# PCH_LAN_RST# PCH_LAN_W AKE#
SATA1_PW REN PCH_AUDIO_PW REN
EC_LID_OUT# UART_W AKE# BT_ON
USB_CAM_PW REN LAN_PW R_EN
I2C_0_SDA I2C_0_SCL
EC_SCI#
SMBALERT#
SML1ALERT#
SUSW ARN#_R
I2C_1_SDA I2C_0_SCL I2C_0_SDA I2C_1_SCL
ODD_PW RODD_DA#
TS_GPIO_CPU
ODD_DA#
NMI_DBG#_CPU
EC_PME#_R
EC_FB_CLAMP_TGL_REQ#
PCH_GPIO58
USB_OC2#USB_OC0# USB_OC1# SATA_LED# SERIRQ
PCH_GPIO87
PCH_GPIO9 USB32_P0_PW REN_R# NMI_DBG#_CPU
EC_SCI#
<25>
EC_KBRST# <25,7> SERIRQ <25,27>
LAN_PW R_EN
<22>
WL_OFF#
<10,31>EC_PME#
<22,25>
HDA_SPKR
<23>
EC_LID_OUT#
<25>
DEVSLP1
<8>
DGPU_PW R_EN <25,37,54,8>
DGPU_HOLD_RST#
<35,8>
SMBALERT# <7> SML1ALERT# <7> SUSW ARN#_R <8>
MPHY_PW REN
<6>
PCH_GPIO33
<7>
ODD_PW R <29>
ODD_DA# <29>
TS_GPIO_CPU
<19>
NMI_DBG#_CPU
<25>
+1.05VS_VCCST
<11,4,6>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,6,7,8>
+3V_PCH
<10,11,12,24,36,4,6,7>
+3V_DSW _P
<12,8>
USB_OC2# <10> USB_OC0# <10> USB_OC1# <10>
SATA_LED# <32,6>
DGPU_PW ROK <36,8>
+3VS
+3V_PCH
+1.05VS_VCCST
+3V_PCH
+3VS
+3VS
+3V_DSW _P
+3VS
+3V_PCH
+3VS
+1.05VS_VCCST
+3VS
+3V_PCH +3V_DSW _P
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GPIO,UART,I2C
Custom
961
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GPIO,UART,I2C
Custom
961
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GPIO,UART,I2C
Custom
961
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC261 10K_0402_5%
@
RC261 10K_0402_5%
@
1 2
RPH21
10K_0804_8P4R_5%
RPH21
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC263
10K_0402_5% @
RC263
10K_0402_5% @
1 2
RC242 1K_0402_5% RC242 1K_0402_5%
1 2
RPH25
10K_0804_8P4R_5%
RPH25
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RPH24
10K_0804_8P4R_5%
RPH24
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
T148
PAD
T148
PAD
RPH10
10K_0804_8P4R_5%
RPH10
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC108 0_0201_5%
@
RC108 0_0201_5%
@
1
2
RPH28
10K_0804_8P4R_5%
@
RPH28
10K_0804_8P4R_5%
@
1
8
2
7
3
6
4
5
T150
PAD
T150
PAD
RPH23
10K_0804_8P4R_5%
RPH23
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC135 10K_0402_5%
@
RC135 10K_0402_5%
@
1 2
RC117 0_0201_5%
@
RC117 0_0201_5%
@
1
2
RC129 0_0402_5%
short@
RC129 0_0402_5%
short@
1
2
RPH18
1K_0804_8P4R_5%
@
RPH18
1K_0804_8P4R_5%
@
1
8
2
7
3
6
4
5
RC265
10K_0402_5%
DIS@
RC265
10K_0402_5%
DIS@
1 2
RC124 0_0201_5%
short@
RC124 0_0201_5%
short@
1
2
T149
PAD
T149
PAD
RC131
49.9_0402_1%
RC131
49.9_0402_1%
1
2
RPH26
10K_0804_8P4R_5%
RPH26
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
T158
PAD
T158
PAD
BDW_ULT_DDR3L(Interleaved)
SERIAL IO
GPIO
MISCCPU/
10 OF 19
UCPU1J BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
SERIAL IO
GPIO
MISCCPU/
10 OF 19
UCPU1J BDW-ULT-DDR3L-IL_BGA1168
RSVD
AB21
RSVD
AF20
SERIRQ
T4
LAN_PHY_PWR_CTRL/GPIO12
AM7
GPIO58
AL4
GPIO44
AK4
BMBUSY/GPIO76
P1
GPIO8
AU2
GPIO15
AD6
GPIO17
T3
GPIO16
Y1
GPIO59
AT5
GPIO48
U4
GPIO47
AB6
GPIO49
Y3
GPIO50
P3
HSIOPC/GPIO71
Y2
GPIO13
AT3
GPIO25
AM4
GPIO14
AH4
GPIO46
AG3
GPIO10
AM2
GPIO9
AM3
DEVSLP0/GPIO33
P2
SDIO_POW ER_EN/GPIO70
C4
DEVSLP1/GPIO38
L2
SPKR/GPIO81
V2
DEVSLP2/GPIO39
N5
THRMTRIP
D60
RCIN/GPIO82
V4
GSPI0_CS/GPIO83
R6
GSPI0_MISO/GPIO85
N6
GSPI0_CLK/GPIO84
L6
GSPI0_MOSI/GPIO86
L8
GSPI1_CS/GPIO87
R7
GSPI1_CLK/GPIO88
L5
GSPI_MOSI/GPIO90
K2
GSPI1_MISO/GPIO89
N7
UART0_RXD/GPIO91
J1
UART0_RTS/GPIO93
J2
UART0_TXD/GPIO92
K3
UART0_CTS/GPIO94
G1
UART1_TXD/GPIO1
G2
UART1_RXD/GPIO0
K4
I2C0_SCL/GPIO5
F3
I2C1_SDA/GPIO6
G4
I2C1_SCL/GPIO7
F1
SDIO_CMD/GPIO65
F4
SDIO_CLK/GPIO64
E3
SDIO_D0/GPIO66
D3
SDIO_D3/GPIO69
E2
SDIO_D2/GPIO68
C3
SDIO_D1/GPIO67
E4
GPIO28
AD7
GPIO57
AP1
GPIO56
AG6
GPIO45
AG5
GPIO24
AD5
GPIO27
AN5
GPIO26
AN3
UART1_RST/GPIO2
J3
I2C0_SDA/GPIO4
F2
UART1_CTS/GPIO3
J4
PCH_OPI_RCOMP
AW 15
RC119
0_0201_5%
@
RC119
0_0201_5%
@
1
2
RC264
10K_0402_5% @
RC264
10K_0402_5% @
1 2
RK11 10K_0402_5% RK11 10K_0402_5%
1
2
RPH14
10K_0804_8P4R_5%
RPH14
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC277 10K_0402_5% RC277 10K_0402_5%
1
2
RC262 10K_0402_5%
UMA@
RC262 10K_0402_5%
UMA@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Dummy
GPIO27
*
PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable Low: VCCVRM VR Disable
0
SPI
*
Boot BIOS Location
PCH_GPIO86
Boot BIOS Strap
Layout notes DG V0.9 PCH_OPIRCOMP Width=12mil,spacing=12mil Max length=500mil
L
<SI> PRH14.4 change from +3V_PCH to +3VS for S3 leakage
<PV>PRH14 change to RPH23. PRH15 change to RPH24. PRH16 change to RPH25.
PV:RC124 change to 0-ohm shortpad
I2C_1_SDA
EC_KBRST# PCH_OPIRCOMP
EC_SCI#
H_THERMTRIP#_C SERIRQ
EC_LID_OUT# PCH_AUDIO_PW REN
I2C_1_SCL
PCH_GPIO85
NGFF_W IFI_3.3_PW REN SATA1_PW REN
USB32_P0_PW REN_R# USB_CAM_PW REN PCH_GPIO9
WWAN_PWREN
PCH_GPIO33BT_ON
EC_FB_CLAMP_TGL_REQ#
DEVSLP1
H_THEMTRIP#
LPDDR3_ID1
DGPU_PRSNT#
LPDDR3_ID1 LPDDR3_ID2
DGPU_PRSNT#
LPDDR3_ID2
MSATA_SSD_PW REN
LAN_PW R_EN
PCH_GPIO58
EC_PME#
WL_OFF#UART_W AKE#
PCH_LAN_W AKE# PCH_LAN_RST# PCH_CR_W AKE# PCH_CR_RST#
HDA_SPKR
TOUCH_PANEL_PW REN
NGFF_W IFI_3.3_PW REN WWAN_PWREN MSATA_SSD_PW REN TOUCH_PANEL_PW REN
PCH_CR_RST# PCH_CR_W AKE# PCH_LAN_RST# PCH_LAN_W AKE#
SATA1_PW REN PCH_AUDIO_PW REN
EC_LID_OUT# UART_W AKE# BT_ON
USB_CAM_PW REN LAN_PW R_EN
I2C_0_SDA I2C_0_SCL
EC_SCI#
SMBALERT#
SML1ALERT#
SUSW ARN#_R
I2C_1_SDA I2C_0_SCL I2C_0_SDA I2C_1_SCL
ODD_PW RODD_DA#
TS_GPIO_CPU
ODD_DA#
NMI_DBG#_CPU
EC_PME#_R
EC_FB_CLAMP_TGL_REQ#
PCH_GPIO58
USB_OC2#USB_OC0# USB_OC1# SATA_LED# SERIRQ
PCH_GPIO87
PCH_GPIO9 USB32_P0_PW REN_R# NMI_DBG#_CPU
EC_SCI#
<25>
EC_KBRST# <25,7> SERIRQ <25,27>
LAN_PW R_EN
<22>
WL_OFF#
<10,31>EC_PME#
<22,25>
HDA_SPKR
<23>
EC_LID_OUT#
<25>
DEVSLP1
<8>
DGPU_PW R_EN <25,37,54,8>
DGPU_HOLD_RST#
<35,8>
SMBALERT# <7> SML1ALERT# <7> SUSW ARN#_R <8>
MPHY_PW REN
<6>
PCH_GPIO33
<7>
ODD_PW R <29>
ODD_DA# <29>
TS_GPIO_CPU
<19>
NMI_DBG#_CPU
<25>
+1.05VS_VCCST
<11,4,6>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,37,56,6,7,8>
+3V_PCH
<10,11,12,24,36,4,6,7>
+3V_DSW _P
<12,8>
USB_OC2# <10> USB_OC0# <10> USB_OC1# <10>
SATA_LED# <32,6>
DGPU_PW ROK <36,8>
+3VS
+3V_PCH
+1.05VS_VCCST
+3V_PCH
+3VS
+3VS
+3V_DSW _P
+3VS
+3V_PCH
+3VS
+1.05VS_VCCST
+3VS
+3V_PCH +3V_DSW _P
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GPIO,UART,I2C
Custom
961
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GPIO,UART,I2C
Custom
961
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GPIO,UART,I2C
Custom
961
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC261 10K_0402_5%
@
RC261 10K_0402_5%
@
1 2
RPH21
10K_0804_8P4R_5%
RPH21
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC263
10K_0402_5% @
RC263
10K_0402_5% @
1 2
RC242 1K_0402_5% RC242 1K_0402_5%
1 2
RPH25
10K_0804_8P4R_5%
RPH25
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RPH24
10K_0804_8P4R_5%
RPH24
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
T148
PAD
T148
PAD
RPH10
10K_0804_8P4R_5%
RPH10
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC108 0_0201_5%
@
RC108 0_0201_5%
@
1
2
RPH28
10K_0804_8P4R_5%
@
RPH28
10K_0804_8P4R_5%
@
1
8
2
7
3
6
4
5
T150
PAD
T150
PAD
RPH23
10K_0804_8P4R_5%
RPH23
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC135 10K_0402_5%
@
RC135 10K_0402_5%
@
1 2
RC117 0_0201_5%
@
RC117 0_0201_5%
@
1
2
RC129 0_0402_5%
short@
RC129 0_0402_5%
short@
1
2
RPH18
1K_0804_8P4R_5%
@
RPH18
1K_0804_8P4R_5%
@
1
8
2
7
3
6
4
5
RC265
10K_0402_5%
DIS@
RC265
10K_0402_5%
DIS@
1 2
RC124 0_0201_5%
short@
RC124 0_0201_5%
short@
1
2
T149
PAD
T149
PAD
RC131
49.9_0402_1%
RC131
49.9_0402_1%
1
2
RPH26
10K_0804_8P4R_5%
RPH26
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
T158
PAD
T158
PAD
BDW_ULT_DDR3L(Interleaved)
SERIAL IO
GPIO
MISCCPU/
10 OF 19
UCPU1J BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
SERIAL IO
GPIO
MISCCPU/
10 OF 19
UCPU1J BDW-ULT-DDR3L-IL_BGA1168
RSVD
AB21
RSVD
AF20
SERIRQ
T4
LAN_PHY_PWR_CTRL/GPIO12
AM7
GPIO58
AL4
GPIO44
AK4
BMBUSY/GPIO76
P1
GPIO8
AU2
GPIO15
AD6
GPIO17
T3
GPIO16
Y1
GPIO59
AT5
GPIO48
U4
GPIO47
AB6
GPIO49
Y3
GPIO50
P3
HSIOPC/GPIO71
Y2
GPIO13
AT3
GPIO25
AM4
GPIO14
AH4
GPIO46
AG3
GPIO10
AM2
GPIO9
AM3
DEVSLP0/GPIO33
P2
SDIO_POW ER_EN/GPIO70
C4
DEVSLP1/GPIO38
L2
SPKR/GPIO81
V2
DEVSLP2/GPIO39
N5
THRMTRIP
D60
RCIN/GPIO82
V4
GSPI0_CS/GPIO83
R6
GSPI0_MISO/GPIO85
N6
GSPI0_CLK/GPIO84
L6
GSPI0_MOSI/GPIO86
L8
GSPI1_CS/GPIO87
R7
GSPI1_CLK/GPIO88
L5
GSPI_MOSI/GPIO90
K2
GSPI1_MISO/GPIO89
N7
UART0_RXD/GPIO91
J1
UART0_RTS/GPIO93
J2
UART0_TXD/GPIO92
K3
UART0_CTS/GPIO94
G1
UART1_TXD/GPIO1
G2
UART1_RXD/GPIO0
K4
I2C0_SCL/GPIO5
F3
I2C1_SDA/GPIO6
G4
I2C1_SCL/GPIO7
F1
SDIO_CMD/GPIO65
F4
SDIO_CLK/GPIO64
E3
SDIO_D0/GPIO66
D3
SDIO_D3/GPIO69
E2
SDIO_D2/GPIO68
C3
SDIO_D1/GPIO67
E4
GPIO28
AD7
GPIO57
AP1
GPIO56
AG6
GPIO45
AG5
GPIO24
AD5
GPIO27
AN5
GPIO26
AN3
UART1_RST/GPIO2
J3
I2C0_SDA/GPIO4
F2
UART1_CTS/GPIO3
J4
PCH_OPI_RCOMP
AW 15
RC119
0_0201_5%
@
RC119
0_0201_5%
@
1
2
RC264
10K_0402_5% @
RC264
10K_0402_5% @
1 2
RK11 10K_0402_5% RK11 10K_0402_5%
1
2
RPH14
10K_0804_8P4R_5%
RPH14
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RC277 10K_0402_5% RC277 10K_0402_5%
1
2
RC262 10K_0402_5%
UMA@
RC262 10K_0402_5%
UMA@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Layout notes DG V0.9 USBRBIAS Trace width=50ohm and spacing=15mil Max length=500mil
L
USB2.0 ( on small BD ) USB2.0/USB3.0 CameraWLAN/BTUSB2.0 USB2.0/USB3.0
LAN
Touch screen Card reader
<Page12>
Layout notes DG V0.9 PCIE_RCOMP Width=12mil,spacing=12mil Max length=500mil
L
DGPU
WL_OFF#
PCIE_PTX_DRX_N3 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_P3 PCH_PCIE_RCOMP
USBRBIAS
USB1_PWR_EN USB_OC2#
USB1_PWR_EN
PCIE_PTX_DRX_N5_L0 PCIE_PTX_DRX_N5_L1 PCIE_PTX_DRX_P5_L1 PCIE_PTX_DRX_P5_L0 PCIE_PTX_DRX_N5_L3 PCIE_PTX_DRX_N5_L2 PCIE_PTX_DRX_P5_L3 PCIE_PTX_DRX_P5_L2
USB_OC0# USB_OC1#
USB3_RX0_P <30> USB3_RX0_N <30>
USB3_TX0_P <30> USB3_TX0_N <30> USB_OC2# <9>
PCIE_PRX_DTX_N3
<22>
PCIE_PTX_C_DRX_P3
<22>
PCIE_PTX_C_DRX_N3
<22>
PCIE_PRX_DTX_P3
<22>
USB20_P2 <32> USB20_N2 <32>
WL_OFF#
<31,9>
USB20_N6 <32> USB20_P6 <32>
PCIE_CTX_GRX_P0
<35>
PCIE_CTX_GRX_N0
<35>
PCIE_CRX_GT X_P0
<35>
PCIE_CRX_GT X_N0
<35>
PCIE_CTX_GRX_P2
<35>
PCIE_CTX_GRX_N2
<35>
PCIE_CTX_GRX_P3
<35>
PCIE_CTX_GRX_N3
<35>
PCIE_CRX_GT X_P2
<35>
PCIE_CRX_GT X_N2
<35>
PCIE_CRX_GT X_P3
<35>
PCIE_CRX_GT X_N3
<35>
PCIE_CRX_GT X_P1
<35>
PCIE_CTX_GRX_N1
<35>
PCIE_CTX_GRX_P1
<35>
PCIE_CRX_GT X_N1
<35>
USB20_N5 <19> USB20_P5 <19>USB20_P0 <30> USB20_N0 <30> USB20_P1 <30> USB20_N1 <30> USB20_P3 <31> USB20_N3 <31> USB20_P4 <19> USB20_N4 <19>
+3V_PCH
<11,12,24,36,4,6,7,9>
USB_OC0# <9> USB_OC1# <9>
+3V_PCH
+1.05VS_VCCUSB3PLL
+3V_PCH
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PCIE,USB
C
10 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PCIE,USB
C
10 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PCIE,USB
C
10 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
C4
.1U_0402_16V7K
DIS@
C4
.1U_0402_16V7K
DIS@
1
2
C10
.1U_0402_16V7K
DIS@
C10
.1U_0402_16V7K
DIS@
1
2
C5 .1U_0402_16V7K
DIS@
C5 .1U_0402_16V7K
DIS@
1
2
C6 .1U_0402_16V7K
DIS@
C6 .1U_0402_16V7K
DIS@
1
2
CC15 0.1U_0402_16V7K CC15 0.1U_0402_16V7K
1
2C3 .1U_0402_16V7K
DIS@
C3 .1U_0402_16V7K
DIS@
1
2
C7 .1U_0402_16V7K
DIS@
C7 .1U_0402_16V7K
DIS@
1
2
RPH29
10K_0804_8P4R_5%
RPH29
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
C8
.1U_0402_16V7K
DIS@
C8
.1U_0402_16V7K
DIS@
1
2
RC111 22.6_0402_1% RC111 22.6_0402_1%
1
2
BDW_ULT_DDR3L(Interleaved)
PCIE USB
11 OF 19
UCPU1K BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
PCIE USB
11 OF 19
UCPU1K BDW- ULT- DDR3L- I L_BG A1168
RSVD
AM10
RSVD
AN10
USB2P1
AT 7
USB2P0
AM8
PERN3
G11
PET N5_L0
C23
USBRBIAS
AJ10
USBRBIAS
AJ11
PET N5_L1
B23
PET P5_L1
A23
USB2N7
AR13
USB2P7
AP13
USB2N6
AP11
USB2P5
AN13
USB2N5
AM13
USB2P6
AN11
USB2P4
AL15
USB2N4
AM15
USB2P3
AT 10
USB2N3
AR10
USB2P2
AP8
USB2N2
AR8
USB2N1
AR7
USB2N0
AN8
PET P4
A29
PERP4
G13
PERN5_L3
E6
PERP5_L3
F6
PET N5_L2
B21
PERP5_L2
G10
PERN5_L2
H10
OC0/GPIO40
AL3
OC1/GPIO41
AT 1
OC2/GPIO42
AH2
OC3/GPIO43
AV3
PET N3
C29
PERP3
F11
PERN5_L1
F8
PET N5_L3
B22
PET P5_L3
A21
PERP5_L1
E8
PET N4
B29
PET P5_L0
C22
PERP5_L0
E10
PERN5_L0
F10
PERN4
F13
PET P3
B30
PCIE_IREF
B27
PCIE_RCOMP
A27
RSVD
E13
PET P5_L2
C21
PERP1/USB3RP3
F17
PERN1/USB3RN3
G17
RSVD
E15
PET P1/USB3T P3
C31
PET N1/USB3T N3
C30
PERN2/USB3RN4
F15
PET P2/USB3T P4
A31
PET N2/USB3T N4
B31
PERP2/USB3RP4
G15
USB3RN1
G20
USB3RP1
H20
USB3TN1
C33
USB3TP1
B34
USB3RN2
E18
USB3RP2
F18
USB3TN2
B33
USB3TP2
A33
C9
.1U_0402_16V7K
DIS@
C9
.1U_0402_16V7K
DIS@
1
2
RC113
3K_0402_1%
RC113
3K_0402_1%
1
2
CC14 0.1U_0402_16V7K CC14 0.1U_0402_16V7K
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Layout notes DG V0.9 USBRBIAS Trace width=50ohm and spacing=15mil Max length=500mil
L
USB2.0 ( on small BD ) USB2.0/USB3.0 CameraWLAN/BTUSB2.0 USB2.0/USB3.0
LAN
Touch screen Card reader
<Page12>
Layout notes DG V0.9 PCIE_RCOMP Width=12mil,spacing=12mil Max length=500mil
L
DGPU
WL_OFF#
PCIE_PTX_DRX_N3 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_P3 PCH_PCIE_RCOMP
USBRBIAS
USB1_PWR_EN USB_OC2#
USB1_PWR_EN
PCIE_PTX_DRX_N5_L0 PCIE_PTX_DRX_N5_L1 PCIE_PTX_DRX_P5_L1 PCIE_PTX_DRX_P5_L0 PCIE_PTX_DRX_N5_L3 PCIE_PTX_DRX_N5_L2 PCIE_PTX_DRX_P5_L3 PCIE_PTX_DRX_P5_L2
USB_OC0# USB_OC1#
USB3_RX0_P <30> USB3_RX0_N <30>
USB3_TX0_P <30> USB3_TX0_N <30> USB_OC2# <9>
PCIE_PRX_DTX_N3
<22>
PCIE_PTX_C_DRX_P3
<22>
PCIE_PTX_C_DRX_N3
<22>
PCIE_PRX_DTX_P3
<22>
USB20_P2 <32> USB20_N2 <32>
WL_OFF#
<31,9>
USB20_N6 <32> USB20_P6 <32>
PCIE_CTX_GRX_P0
<35>
PCIE_CTX_GRX_N0
<35>
PCIE_CRX_GT X_P0
<35>
PCIE_CRX_GT X_N0
<35>
PCIE_CTX_GRX_P2
<35>
PCIE_CTX_GRX_N2
<35>
PCIE_CTX_GRX_P3
<35>
PCIE_CTX_GRX_N3
<35>
PCIE_CRX_GT X_P2
<35>
PCIE_CRX_GT X_N2
<35>
PCIE_CRX_GT X_P3
<35>
PCIE_CRX_GT X_N3
<35>
PCIE_CRX_GT X_P1
<35>
PCIE_CTX_GRX_N1
<35>
PCIE_CTX_GRX_P1
<35>
PCIE_CRX_GT X_N1
<35>
USB20_N5 <19> USB20_P5 <19>USB20_P0 <30> USB20_N0 <30> USB20_P1 <30> USB20_N1 <30> USB20_P3 <31> USB20_N3 <31> USB20_P4 <19> USB20_N4 <19>
+3V_PCH
<11,12,24,36,4,6,7,9>
USB_OC0# <9> USB_OC1# <9>
+3V_PCH
+1.05VS_VCCUSB3PLL
+3V_PCH
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PCIE,USB
C
10 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PCIE,USB
C
10 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PCIE,USB
C
10 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
C4
.1U_0402_16V7K
DIS@
C4
.1U_0402_16V7K
DIS@
1
2
C10
.1U_0402_16V7K
DIS@
C10
.1U_0402_16V7K
DIS@
1
2
C5 .1U_0402_16V7K
DIS@
C5 .1U_0402_16V7K
DIS@
1
2
C6 .1U_0402_16V7K
DIS@
C6 .1U_0402_16V7K
DIS@
1
2
CC15 0.1U_0402_16V7K CC15 0.1U_0402_16V7K
1
2C3 .1U_0402_16V7K
DIS@
C3 .1U_0402_16V7K
DIS@
1
2
C7 .1U_0402_16V7K
DIS@
C7 .1U_0402_16V7K
DIS@
1
2
RPH29
10K_0804_8P4R_5%
RPH29
10K_0804_8P4R_5%
1
8
2
7
3
6
4
5
C8
.1U_0402_16V7K
DIS@
C8
.1U_0402_16V7K
DIS@
1
2
RC111 22.6_0402_1% RC111 22.6_0402_1%
1
2
BDW_ULT_DDR3L(Interleaved)
PCIE USB
11 OF 19
UCPU1K BDW- ULT- DDR3L- I L_BG A1168
BDW_ULT_DDR3L(Interleaved)
PCIE USB
11 OF 19
UCPU1K BDW- ULT- DDR3L- I L_BG A1168
RSVD
AM10
RSVD
AN10
USB2P1
AT 7
USB2P0
AM8
PERN3
G11
PET N5_L0
C23
USBRBIAS
AJ10
USBRBIAS
AJ11
PET N5_L1
B23
PET P5_L1
A23
USB2N7
AR13
USB2P7
AP13
USB2N6
AP11
USB2P5
AN13
USB2N5
AM13
USB2P6
AN11
USB2P4
AL15
USB2N4
AM15
USB2P3
AT 10
USB2N3
AR10
USB2P2
AP8
USB2N2
AR8
USB2N1
AR7
USB2N0
AN8
PET P4
A29
PERP4
G13
PERN5_L3
E6
PERP5_L3
F6
PET N5_L2
B21
PERP5_L2
G10
PERN5_L2
H10
OC0/GPIO40
AL3
OC1/GPIO41
AT 1
OC2/GPIO42
AH2
OC3/GPIO43
AV3
PET N3
C29
PERP3
F11
PERN5_L1
F8
PET N5_L3
B22
PET P5_L3
A21
PERP5_L1
E8
PET N4
B29
PET P5_L0
C22
PERP5_L0
E10
PERN5_L0
F10
PERN4
F13
PET P3
B30
PCIE_IREF
B27
PCIE_RCOMP
A27
RSVD
E13
PET P5_L2
C21
PERP1/USB3RP3
F17
PERN1/USB3RN3
G17
RSVD
E15
PET P1/USB3T P3
C31
PET N1/USB3T N3
C30
PERN2/USB3RN4
F15
PET P2/USB3T P4
A31
PET N2/USB3T N4
B31
PERP2/USB3RP4
G15
USB3RN1
G20
USB3RP1
H20
USB3TN1
C33
USB3TP1
B34
USB3RN2
E18
USB3RP2
F18
USB3TN2
B33
USB3TP2
A33
C9
.1U_0402_16V7K
DIS@
C9
.1U_0402_16V7K
DIS@
1
2
RC113
3K_0402_1%
RC113
3K_0402_1%
1
2
CC14 0.1U_0402_16V7K CC14 0.1U_0402_16V7K
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
<EDP_COMP power rail>
VCC_SENSE
SVID ALERT
Layout notes DG V0.5 H_CPU_SVIDALRT# RC154 close to CPU<300mil Max length=1000~2000mil
L
SVID DATA
Layout notes DG V0.5 VIDSOUT RC156 close to CPU<500mil Max length=1000~2000mil
L
<PWR VR12.6>
2500mA
600mA
<PWR VR12.6>
<PWR VR12.6>
+VCC_CORE@10000mA
<VR IV and CPU>
<CPU>
PV:RC223,RG124 change to 0-ohm shortpad
H_CPU_SVIDALRT# VR_SVID_DAT VR_SVID_CLK CPU_PWR_DEBUG
H_CPU_SVIDALRT#
VR_SVID_DAT
VR12.6PG_MCP
VCCSENSE
VR12.6PG_MCP
VR_SVID_CLK
<51>
VR_SVID_ALRT#
<51>
VR_SVID_DAT
<51>
VR_ON
<51>
+1.05VS_PG
<4,6>
VCCSENSE
<51>
CPU_PWR_DEBUG <6>
+VCC_CORE
<34,51,52>
+1.35V_VDDQ
<15,16,17,34,4,49>
+1.05VS_VCCST
<4,6,9>
+VCCIO_OUT
<4,6>
+VCCIOA_OUT
<4>
+1.05VS
<12,24,25,28,34,37,50,51>
VGATE
<51>
+VCC_CORE
+1.35V_VDDQ
+VCC_CORE
+VCCIOA_OUT
+VCC_CORE
+1.35V_VDDQ
+1.35V_VDDQ
+1.05VS
+1.05VS_VCCST
+1.05VS_VCCST
+1.05VS_VCCST
+1.05VS_VCCST
+3V_PCH
+VCCIO_OUT
+1.05VS
+VCCIO_OUT
+1.05VS_VCCST
+VCC_CORE +1.35V_VDDQ +1.05VS_VCCST +VCCIO_OUT +VCCIOA_OUT +1.05VS
+1.05VS_VCCST
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
Custom
11 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
Custom
11 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
Custom
11 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
CC27
10U_0603_6.3V6M
@
CC27
10U_0603_6.3V6M
@
1 2
CC26
10U_0603_6.3V6M
CC26
10U_0603_6.3V6M
1 2
CC72
1U_0402_6.3V6K
@
CC72
1U_0402_6.3V6K
@
1 2
+
CC24
330U_2.5V_M
@
+
CC24
330U_2.5V_M
@
1 2
RC154 75_0402_5% RC154 75_0402_5%
1 2
CC21
2.2U_0402_6.3V6M
@
CC21
2.2U_0402_6.3V6M
@
1 2
CC22
2.2U_0402_6.3V6M
CC22
2.2U_0402_6.3V6M
1 2
CC30
10U_0603_6.3V6M
CC30
10U_0603_6.3V6M
1 2
+
CC25
330U_2.5V_M
@
+
CC25
330U_2.5V_M
@
1 2
CC23
2.2U_0402_6.3V6M
CC23
2.2U_0402_6.3V6M
1 2
RC167
10K_0402_5%
@
RC167
10K_0402_5%
@
1 2
RC294 0_0402_5%
@
RC294 0_0402_5%
@
1
2
CC28
10U_0603_6.3V6M
CC28
10U_0603_6.3V6M
1 2
RC166
150_0402_5%
RC166
150_0402_5%
1 2
CC31
10U_0603_6.3V6M
@
CC31
10U_0603_6.3V6M
@
1 2
CC20
2.2U_0402_6.3V6M
CC20
2.2U_0402_6.3V6M
1 2
RC155
43_0402_1%
RC155
43_0402_1% 1
2
RC156 110_0402_1% RC156 110_0402_1%
1 2
RC288 10K_0402_5%
@
RC288 10K_0402_5%
@
1 2
CC71
22U_0805_6.3V6M
CC71
22U_0805_6.3V6M
1 2
BDW_ULT_DDR3L(Interleaved)
HSW ULT POW ER
12 OF 19
UCPU1L BDW -ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
HSW ULT POW ER
12 OF 19
UCPU1L BDW -ULT-DDR3L-IL_BGA1168
VCCIO_OUT
A59
VCCIOA_OUT
E20
RSVD
AD23
RSVD
AB23
RSVD
AC58
VCC
F59
VDDQ
AY44
VDDQ
AY40
VDDQ
AY35
RSVD
AA59
RSVD
U59
RSVD
V59
RSVD
AG58
RSVD
AC59
RSVD
AE60
RSVD
AD59
VCCST
AC22
VDDQ
AY50
RSVD
N58
VCC_SENSE
E63
RSVD
AA23
RSVD
AE59
VCCST_PW RGD
B59
VR_READY
C59
VR_EN
F60
VDDQ
AR48
VDDQ
AP43
VDDQ
AN33
VDDQ
AJ37
VDDQ
AJ33
VDDQ
AJ31
VDDQ
AH26
RSVD
J58
RSVD
L59
VCC
C24
VCC
C28
VCC
C32
VCC
AG57
VCC
W57
VCC
U57
VCC
M23
VCC
M57
VCC
P57
VCC
L22
VCC
K57
VCC
H23
VCC
J23
VCC
G55
VCC
G57
VCC
G49
VCC
G51
VCC
G53
VCC
G45
VCC
G47
VCC
G43
VCC
G39
VCC
G41
VCC
G37
VCC
G35
VCC
G33
VCC
G29
VCC
G31
VCC
G27
VCC
G25
VCC
G23
VCC
F52
VCC
F56
VCC
F48
VCC
F44
VCC
F40
VCC
F28
VCC
F32
VCC
F36
VCC
F24
VCC
E57
VCC
E51
VCC
E53
VCC
E55
VCC
E47
VCC
E49
VCC
E41
VCC
E43
VCC
E45
VCC
E37
VCC
E39
VCC
E31
VCC
E33
VCC
E35
VCC
E27
VCC
E29
VCC
C56
VCC
E23
VCC
E25
VCC
C48
VCC
C52
VCC
C36
VCC
C40
VCC
C44
VCC
K23
VCC
AD57
VCC
AB57
VCCST
AE23
VCCST
AE22
VIDSOUT
L63
VIDSCLK
N63
VIDALERT
L62
VSS
P62
RSVD_TP
P60
RSVD_TP
P61
RSVD_TP
N59
RSVD_TP
N61
RSVD
T59
RSVD
AD60
VSS
D63
PW R_DEBUG
H59
RG124
0_0402_5%
short@
RG124
0_0402_5%
short@
1
2
RC223
0_0805_5%
short@
RC223
0_0805_5%
short@
1
2
UC8
74AUP1G07GW_TSSOP5
@
UC8
74AUP1G07GW_TSSOP5
@
GND
3
A
2
NC
1
VCC
5
Y
4
CC29
10U_0603_6.3V6M
@
CC29
10U_0603_6.3V6M
@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Compal Electronics, Inc.
<EDP_COMP power rail>
VCC_SENSE
SVID ALERT
Layout notes DG V0.5 H_CPU_SVIDALRT# RC154 close to CPU<300mil Max length=1000~2000mil
L
SVID DATA
Layout notes DG V0.5 VIDSOUT RC156 close to CPU<500mil Max length=1000~2000mil
L
<PWR VR12.6>
2500mA
600mA
<PWR VR12.6>
<PWR VR12.6>
+VCC_CORE@10000mA
<VR IV and CPU>
<CPU>
PV:RC223,RG124 change to 0-ohm shortpad
H_CPU_SVIDALRT# VR_SVID_DAT VR_SVID_CLK CPU_PWR_DEBUG
H_CPU_SVIDALRT#
VR_SVID_DAT
VR12.6PG_MCP
VCCSENSE
VR12.6PG_MCP
VR_SVID_CLK
<51>
VR_SVID_ALRT#
<51>
VR_SVID_DAT
<51>
VR_ON
<51>
+1.05VS_PG
<4,6>
VCCSENSE
<51>
CPU_PWR_DEBUG <6>
+VCC_CORE
<34,51,52>
+1.35V_VDDQ
<15,16,17,34,4,49>
+1.05VS_VCCST
<4,6,9>
+VCCIO_OUT
<4,6>
+VCCIOA_OUT
<4>
+1.05VS
<12,24,25,28,34,37,50,51>
VGATE
<51>
+VCC_CORE
+1.35V_VDDQ
+VCC_CORE
+VCCIOA_OUT
+VCC_CORE
+1.35V_VDDQ
+1.35V_VDDQ
+1.05VS
+1.05VS_VCCST
+1.05VS_VCCST
+1.05VS_VCCST
+1.05VS_VCCST
+3V_PCH
+VCCIO_OUT
+1.05VS
+VCCIO_OUT
+1.05VS_VCCST
+VCC_CORE +1.35V_VDDQ +1.05VS_VCCST +VCCIO_OUT +VCCIOA_OUT +1.05VS
+1.05VS_VCCST
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
Custom
11 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
Custom
11 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
Custom
11 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
CC27
10U_0603_6.3V6M
@
CC27
10U_0603_6.3V6M
@
1 2
CC26
10U_0603_6.3V6M
CC26
10U_0603_6.3V6M
1 2
CC72
1U_0402_6.3V6K
@
CC72
1U_0402_6.3V6K
@
1 2
+
CC24
330U_2.5V_M
@
+
CC24
330U_2.5V_M
@
1 2
RC154 75_0402_5% RC154 75_0402_5%
1 2
CC21
2.2U_0402_6.3V6M
@
CC21
2.2U_0402_6.3V6M
@
1 2
CC22
2.2U_0402_6.3V6M
CC22
2.2U_0402_6.3V6M
1 2
CC30
10U_0603_6.3V6M
CC30
10U_0603_6.3V6M
1 2
+
CC25
330U_2.5V_M
@
+
CC25
330U_2.5V_M
@
1 2
CC23
2.2U_0402_6.3V6M
CC23
2.2U_0402_6.3V6M
1 2
RC167
10K_0402_5%
@
RC167
10K_0402_5%
@
1 2
RC294 0_0402_5%
@
RC294 0_0402_5%
@
1
2
CC28
10U_0603_6.3V6M
CC28
10U_0603_6.3V6M
1 2
RC166
150_0402_5%
RC166
150_0402_5%
1 2
CC31
10U_0603_6.3V6M
@
CC31
10U_0603_6.3V6M
@
1 2
CC20
2.2U_0402_6.3V6M
CC20
2.2U_0402_6.3V6M
1 2
RC155
43_0402_1%
RC155
43_0402_1% 1
2
RC156 110_0402_1% RC156 110_0402_1%
1 2
RC288 10K_0402_5%
@
RC288 10K_0402_5%
@
1 2
CC71
22U_0805_6.3V6M
CC71
22U_0805_6.3V6M
1 2
BDW_ULT_DDR3L(Interleaved)
HSW ULT POW ER
12 OF 19
UCPU1L BDW -ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
HSW ULT POW ER
12 OF 19
UCPU1L BDW -ULT-DDR3L-IL_BGA1168
VCCIO_OUT
A59
VCCIOA_OUT
E20
RSVD
AD23
RSVD
AB23
RSVD
AC58
VCC
F59
VDDQ
AY44
VDDQ
AY40
VDDQ
AY35
RSVD
AA59
RSVD
U59
RSVD
V59
RSVD
AG58
RSVD
AC59
RSVD
AE60
RSVD
AD59
VCCST
AC22
VDDQ
AY50
RSVD
N58
VCC_SENSE
E63
RSVD
AA23
RSVD
AE59
VCCST_PW RGD
B59
VR_READY
C59
VR_EN
F60
VDDQ
AR48
VDDQ
AP43
VDDQ
AN33
VDDQ
AJ37
VDDQ
AJ33
VDDQ
AJ31
VDDQ
AH26
RSVD
J58
RSVD
L59
VCC
C24
VCC
C28
VCC
C32
VCC
AG57
VCC
W57
VCC
U57
VCC
M23
VCC
M57
VCC
P57
VCC
L22
VCC
K57
VCC
H23
VCC
J23
VCC
G55
VCC
G57
VCC
G49
VCC
G51
VCC
G53
VCC
G45
VCC
G47
VCC
G43
VCC
G39
VCC
G41
VCC
G37
VCC
G35
VCC
G33
VCC
G29
VCC
G31
VCC
G27
VCC
G25
VCC
G23
VCC
F52
VCC
F56
VCC
F48
VCC
F44
VCC
F40
VCC
F28
VCC
F32
VCC
F36
VCC
F24
VCC
E57
VCC
E51
VCC
E53
VCC
E55
VCC
E47
VCC
E49
VCC
E41
VCC
E43
VCC
E45
VCC
E37
VCC
E39
VCC
E31
VCC
E33
VCC
E35
VCC
E27
VCC
E29
VCC
C56
VCC
E23
VCC
E25
VCC
C48
VCC
C52
VCC
C36
VCC
C40
VCC
C44
VCC
K23
VCC
AD57
VCC
AB57
VCCST
AE23
VCCST
AE22
VIDSOUT
L63
VIDSCLK
N63
VIDALERT
L62
VSS
P62
RSVD_TP
P60
RSVD_TP
P61
RSVD_TP
N59
RSVD_TP
N61
RSVD
T59
RSVD
AD60
VSS
D63
PW R_DEBUG
H59
RG124
0_0402_5%
short@
RG124
0_0402_5%
short@
1
2
RC223
0_0805_5%
short@
RC223
0_0805_5%
short@
1
2
UC8
74AUP1G07GW_TSSOP5
@
UC8
74AUP1G07GW_TSSOP5
@
GND
3
A
2
NC
1
VCC
5
Y
4
CC29
10U_0603_6.3V6M
@
CC29
10U_0603_6.3V6M
@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LA-8661P
Total 1.05VS=1838+2274=4111mA Total 1.5VS=3mA Total 1.8VS=7mA Total 3VS=0mA Total 3VALW=200+62=262mA Total 1.05V=540+109=649mA Total 3V_PCH=99mA
Use +1.05V
Non Deep S3 RC182-->SMT Deep S3 RC285-->SMT Deep S3 and Non Deep S3
SPI ROM power rail
1.838A
41mA 42mA
57mA
1.6A 0.658A
65mA 18mA
31mA
62mA
124mA
PV:RC168,RC172,RC280,RC281,RC285,RC196,RC175,RC178
change to 0-ohm shortpad
+3V_1V8_SDIO
+3V_DSW_P
+RTCVCC
+1.05VS_VCCHSIO
+1.05V_DCPSUS
+1.05VS_APPLOPI
+1.05V_AOSCSUS
+1.05VS_AXCK_LCPLL
+VCCSUSHDA
+1.05VS_VCCSATA3PLL
+1.05VS_VCCASW
+1.05VS_APPLOPI
+1.05V_DCPSUS
+1.05VS_VCCUSB3PLL
+1.05VS_AXCKDCB
+3V_DSW_PRTCSUS
+1.05VS_VCCUSB3PLL +1.05VS_VCCSATA3PLL
+1.05VS_AXCKDCB
+1.05VS_AXCK_LCPLL
+1.05V_AOSCSUS
+3V_DSW_P
+V1.05S_SSCF100
+V1.05S_SSCFF
+V1.05S_SSCF100 +V1.05S_SSCFF
+3V_PCH
<10,11,24,36,4,6,7,9>
+RTCVCC
<28,6,8>
+1.05VS
<11,24,25,28,34,37,50,51>
+1.5VS
<23,37,53,6>
+3VS
<15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.05V
<24>
+3VALW
<19,22,24,25,26,28,29,32,37,48,50,53,56,7>
+3V_DSW_P
<8,9>
+1.05VS_MODPHY
<24,34>
+1.05VS_VCCSATA3PLL
<34,6>
+1.05VS_APPLOPI
<34>
+1.05VS
+RTCVCC
+3VS
+3VS
+1.05VS
+3V_PCH
+3V_PCH
+1.05VS
+3VS+1.5VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+3V_PCH
+1.5VS
+1.05VS_MODPHY
+1.05VS_MODPHY
+1.05VS_MODPHY
+1.05V
+1.05V
+1.05VS
+1.05VS_AXCK_LCPLL
+1.05VS_VCCUSB3PLL +1.05VS_VCCSATA3PLL
+3VALW
+3V_DSW_P
+3V_PCH
+3V_PCH
+3V_PCH +RTCVCC +1.05VS +1.5VS +3VS
+1.05V+1.05VS_MODPHY +3VALW+3V_DSW_P
+1.05VS_VCCSATA3PLL +1.05VS_APPLOPI
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
C
12 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
C
12 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
C
12 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC179
2.2UH_LQM2MPN2R2NG0L_30%
RC179
2.2UH_LQM2MPN2R2NG0L_30%
1
2
RC280
0_0603_5%
short@RC280
0_0603_5%
short@
1
2
CC40 0.1U_0402_16V7K CC40 0.1U_0402_16V7K
1
2
CC46
1U_0402_6.3V6K
CC46
1U_0402_6.3V6K
1
2
CC76 0.1U_0402_16V7K CC76 0.1U_0402_16V7K
1
2
RC174
5.11_0402_1%
RC174
5.11_0402_1%
1
2
CC69
1U_0402_6.3V6K
CC69
1U_0402_6.3V6K
1 2
CC45
10U_0603_6.3V6M
CC45
10U_0603_6.3V6M
1
2
CC43
1U_0402_6.3V6K
CC43
1U_0402_6.3V6K
1 2
RC175 0_0805_5%
short@
RC175 0_0805_5%
short@
1
2
CC68
47U_0805_6.3V6M
CC68
47U_0805_6.3V6M
1 2
RC281
0_0603_5%
short@RC281
0_0603_5%
short@
1
2
RC168
0_0805_5%
short@
RC168
0_0805_5%
short@
1
2
CC49
1U_0402_6.3V6K
CC49
1U_0402_6.3V6K
1 2
CC42
47U_0805_6.3V6M
CC42
47U_0805_6.3V6M
1 2
RC181
2.2UH_LQM2MPN2R2NG0L_30%
RC181
2.2UH_LQM2MPN2R2NG0L_30%
1
2
CC61
1U_0402_6.3V6K
CC61
1U_0402_6.3V6K
1 2
CC53
1U_0402_6.3V6K
CC53
1U_0402_6.3V6K
1 2
CC65
1U_0402_6.3V6K
CC65
1U_0402_6.3V6K
1 2
CC39
1U_0402_6.3V6K
CC39
1U_0402_6.3V6K
1 2
CC62
1U_0402_6.3V6K
CC62
1U_0402_6.3V6K
1 2
CC50
10U_0603_6.3V6M
CC50
10U_0603_6.3V6M
1 2
CC41 1U_0402_6.3V6K CC41 1U_0402_6.3V6K
1 2
CC66
1U_0402_6.3V6K
@
CC66
1U_0402_6.3V6K
@
1 2
RC182 0_0402_5%
@
RC182 0_0402_5%
@
1
2
CC64
1U_0402_6.3V6K
CC64
1U_0402_6.3V6K
1 2
CC34
1U_0402_6.3V6K
CC34
1U_0402_6.3V6K
1 2
CC51
1U_0402_6.3V6K
CC51
1U_0402_6.3V6K
1 2
CC35
47U_0805_6.3V6M
CC35
47U_0805_6.3V6M
1 2
CC37
0.1U_0402_16V7K
@
CC37
0.1U_0402_16V7K
@
1 2
CC52
1U_0402_6.3V6K
CC52
1U_0402_6.3V6K
1
2
CC60
1U_0402_6.3V6K
CC60
1U_0402_6.3V6K
1 2
RC285 0_0402_5%
short@
RC285 0_0402_5%
short@
1
2
USB2
THERMAL SENSOR
HSIO
BDW_ULT_DDR3L(Interleaved)
USB3
OPI
RTC
GPIO/LPC
VRMHDA
SERIAL IO
SUS OSCILLATOR
SPI
LPT LP POWER
CORE
13 OF 19
UCPU1M BDW- ULT- DDR3L- I L_BG A1168
USB2
THERMAL SENSOR
HSIO
BDW_ULT_DDR3L(Interleaved)
USB3
OPI
RTC
GPIO/LPC
VRMHDA
SERIAL IO
SUS OSCILLATOR
SPI
LPT LP POWER
CORE
13 OF 19
UCPU1M BDW- ULT- DDR3L- I L_BG A1168
VCCHDA
AH14
VCCT S1_5
J15
DCPSUS1
AD8
DCPSUS1
AD10
DCPSUSBYP
AG20
DCPSUSBYP
AG19
DCPSUS4
AB8
VCCASW
AE9
VCCASW
AF9
VCCASW
AG8
VCCSUS3_3
AH11
VCCRT C
AG10
DCPRTC
AE7
VCCSPI
Y8
VCCASW
AG14
VCCASW
AG13
VCC3_3
K16
VCC3_3
K14
VCCSDIO
T9
VCCSDIO
U8
DCPSUS3
J13
VCCAPLL
W21
VCCHSIO
K9
VCCHSIO
L10
VCCHSIO
M9
VCCAPLL
AA21
RSVD
Y20
VCCSAT A3PLL
B11
VCCUSB3PLL
B18
VCC1_05
N8
VCC1_05
P9
VCC1_05
J11
VCC1_05
H11
VCC1_05
H15
VCC1_05
AE8
VCC1_05
AF22
VCCSUS3_3
AE21
VCCSUS3_3
AE20
RSVD
V21
RSVD
M20
RSVD
K18
VCCCLK
T21
VCCCLK
R21
VCCCLK
J17
VCCACLKPLL
A20
VCC3_3
W9
VCC3_3
V8
VCCDSW 3_3
AH10
VCCSUS3_3
AC9
RSVD
AC20
VCCSUS3_3
AA9
DCPSUS2
AH13
VCC1_05
AG16
VCC1_05
AG17
VCCCLK
J18
VCCCLK
K19
CC67
100U_1206_6.3V6K
@
CC67
100U_1206_6.3V6K
@
1 2
CC54
22U_0805_6.3V6M
CC54
22U_0805_6.3V6M
1 2
CC32
1U_0402_6.3V6K
CC32
1U_0402_6.3V6K
1 2
CC55
22U_0805_6.3V6M
CC55
22U_0805_6.3V6M
1 2
CC48
1U_0402_6.3V6K
CC48
1U_0402_6.3V6K
1 2
CC58
1U_0402_6.3V6K
CC58
1U_0402_6.3V6K
1 2
CC59
22U_0805_6.3V6M
CC59
22U_0805_6.3V6M
1 2
CC57
22U_0805_6.3V6M
CC57
22U_0805_6.3V6M
1 2
CC36
1U_0402_6.3V6K
CC36
1U_0402_6.3V6K
1 2
RC178
0_0603_5%
short@RC178
0_0603_5%
short@
1
2
CC44 0.1U_0402_16V7K
@
CC44 0.1U_0402_16V7K
@
1 2
RC169 0_0402_5%
short@
RC169 0_0402_5%
short@
1
2
RC180 2.2UH_LQM2MPN2R2NG0L_30%
@
RC180 2.2UH_LQM2MPN2R2NG0L_30%
@
1
2
RC176
2.2UH_LQM2MPN2R2NG0L_30%
RC176
2.2UH_LQM2MPN2R2NG0L_30%
1
2
RC173
0_0402_5%
@RC173
0_0402_5%
@
1
2
CC63
47U_0805_6.3V6M
CC63
47U_0805_6.3V6M
1 2
RC172 0_0402_5%
short@
RC172 0_0402_5%
short@
1
2
CC70
1U_0402_6.3V6K
CC70
1U_0402_6.3V6K
1 2
RC171
2.2UH_LQM2MPN2R2NG0L_30%
RC171
2.2UH_LQM2MPN2R2NG0L_30%
1
2
RC170
2.2UH_LQM2MPN2R2NG0L_30%
RC170
2.2UH_LQM2MPN2R2NG0L_30%
1
2
CC33
1U_0402_6.3V6K
CC33
1U_0402_6.3V6K
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LA-8661P
Total 1.05VS=1838+2274=4111mA Total 1.5VS=3mA Total 1.8VS=7mA Total 3VS=0mA Total 3VALW=200+62=262mA Total 1.05V=540+109=649mA Total 3V_PCH=99mA
Use +1.05V
Non Deep S3 RC182-->SMT Deep S3 RC285-->SMT Deep S3 and Non Deep S3
SPI ROM power rail
1.838A
41mA 42mA
57mA
1.6A 0.658A
65mA 18mA
31mA
62mA
124mA
PV:RC168,RC172,RC280,RC281,RC285,RC196,RC175,RC178
change to 0-ohm shortpad
+3V_1V8_SDIO
+3V_DSW_P
+RTCVCC
+1.05VS_VCCHSIO
+1.05V_DCPSUS
+1.05VS_APPLOPI
+1.05V_AOSCSUS
+1.05VS_AXCK_LCPLL
+VCCSUSHDA
+1.05VS_VCCSATA3PLL
+1.05VS_VCCASW
+1.05VS_APPLOPI
+1.05V_DCPSUS
+1.05VS_VCCUSB3PLL
+1.05VS_AXCKDCB
+3V_DSW_PRTCSUS
+1.05VS_VCCUSB3PLL +1.05VS_VCCSATA3PLL
+1.05VS_AXCKDCB
+1.05VS_AXCK_LCPLL
+1.05V_AOSCSUS
+3V_DSW_P
+V1.05S_SSCF100
+V1.05S_SSCFF
+V1.05S_SSCF100 +V1.05S_SSCFF
+3V_PCH
<10,11,24,36,4,6,7,9>
+RTCVCC
<28,6,8>
+1.05VS
<11,24,25,28,34,37,50,51>
+1.5VS
<23,37,53,6>
+3VS
<15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.05V
<24>
+3VALW
<19,22,24,25,26,28,29,32,37,48,50,53,56,7>
+3V_DSW_P
<8,9>
+1.05VS_MODPHY
<24,34>
+1.05VS_VCCSATA3PLL
<34,6>
+1.05VS_APPLOPI
<34>
+1.05VS
+RTCVCC
+3VS
+3VS
+1.05VS
+3V_PCH
+3V_PCH
+1.05VS
+3VS+1.5VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+3V_PCH
+1.5VS
+1.05VS_MODPHY
+1.05VS_MODPHY
+1.05VS_MODPHY
+1.05V
+1.05V
+1.05VS
+1.05VS_AXCK_LCPLL
+1.05VS_VCCUSB3PLL +1.05VS_VCCSATA3PLL
+3VALW
+3V_DSW_P
+3V_PCH
+3V_PCH
+3V_PCH +RTCVCC +1.05VS +1.5VS +3VS
+1.05V+1.05VS_MODPHY +3VALW+3V_DSW_P
+1.05VS_VCCSATA3PLL +1.05VS_APPLOPI
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
C
12 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
C
12 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
Power
C
12 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RC179
2.2UH_LQM2MPN2R2NG0L_30%
RC179
2.2UH_LQM2MPN2R2NG0L_30%
1
2
RC280
0_0603_5%
short@RC280
0_0603_5%
short@
1
2
CC40 0.1U_0402_16V7K CC40 0.1U_0402_16V7K
1
2
CC46
1U_0402_6.3V6K
CC46
1U_0402_6.3V6K
1
2
CC76 0.1U_0402_16V7K CC76 0.1U_0402_16V7K
1
2
RC174
5.11_0402_1%
RC174
5.11_0402_1%
1
2
CC69
1U_0402_6.3V6K
CC69
1U_0402_6.3V6K
1 2
CC45
10U_0603_6.3V6M
CC45
10U_0603_6.3V6M
1
2
CC43
1U_0402_6.3V6K
CC43
1U_0402_6.3V6K
1 2
RC175 0_0805_5%
short@
RC175 0_0805_5%
short@
1
2
CC68
47U_0805_6.3V6M
CC68
47U_0805_6.3V6M
1 2
RC281
0_0603_5%
short@RC281
0_0603_5%
short@
1
2
RC168
0_0805_5%
short@
RC168
0_0805_5%
short@
1
2
CC49
1U_0402_6.3V6K
CC49
1U_0402_6.3V6K
1 2
CC42
47U_0805_6.3V6M
CC42
47U_0805_6.3V6M
1 2
RC181
2.2UH_LQM2MPN2R2NG0L_30%
RC181
2.2UH_LQM2MPN2R2NG0L_30%
1
2
CC61
1U_0402_6.3V6K
CC61
1U_0402_6.3V6K
1 2
CC53
1U_0402_6.3V6K
CC53
1U_0402_6.3V6K
1 2
CC65
1U_0402_6.3V6K
CC65
1U_0402_6.3V6K
1 2
CC39
1U_0402_6.3V6K
CC39
1U_0402_6.3V6K
1 2
CC62
1U_0402_6.3V6K
CC62
1U_0402_6.3V6K
1 2
CC50
10U_0603_6.3V6M
CC50
10U_0603_6.3V6M
1 2
CC41 1U_0402_6.3V6K CC41 1U_0402_6.3V6K
1 2
CC66
1U_0402_6.3V6K
@
CC66
1U_0402_6.3V6K
@
1 2
RC182 0_0402_5%
@
RC182 0_0402_5%
@
1
2
CC64
1U_0402_6.3V6K
CC64
1U_0402_6.3V6K
1 2
CC34
1U_0402_6.3V6K
CC34
1U_0402_6.3V6K
1 2
CC51
1U_0402_6.3V6K
CC51
1U_0402_6.3V6K
1 2
CC35
47U_0805_6.3V6M
CC35
47U_0805_6.3V6M
1 2
CC37
0.1U_0402_16V7K
@
CC37
0.1U_0402_16V7K
@
1 2
CC52
1U_0402_6.3V6K
CC52
1U_0402_6.3V6K
1
2
CC60
1U_0402_6.3V6K
CC60
1U_0402_6.3V6K
1 2
RC285 0_0402_5%
short@
RC285 0_0402_5%
short@
1
2
USB2
THERMAL SENSOR
HSIO
BDW_ULT_DDR3L(Interleaved)
USB3
OPI
RTC
GPIO/LPC
VRMHDA
SERIAL IO
SUS OSCILLATOR
SPI
LPT LP POWER
CORE
13 OF 19
UCPU1M BDW- ULT- DDR3L- I L_BG A1168
USB2
THERMAL SENSOR
HSIO
BDW_ULT_DDR3L(Interleaved)
USB3
OPI
RTC
GPIO/LPC
VRMHDA
SERIAL IO
SUS OSCILLATOR
SPI
LPT LP POWER
CORE
13 OF 19
UCPU1M BDW- ULT- DDR3L- I L_BG A1168
VCCHDA
AH14
VCCT S1_5
J15
DCPSUS1
AD8
DCPSUS1
AD10
DCPSUSBYP
AG20
DCPSUSBYP
AG19
DCPSUS4
AB8
VCCASW
AE9
VCCASW
AF9
VCCASW
AG8
VCCSUS3_3
AH11
VCCRT C
AG10
DCPRTC
AE7
VCCSPI
Y8
VCCASW
AG14
VCCASW
AG13
VCC3_3
K16
VCC3_3
K14
VCCSDIO
T9
VCCSDIO
U8
DCPSUS3
J13
VCCAPLL
W21
VCCHSIO
K9
VCCHSIO
L10
VCCHSIO
M9
VCCAPLL
AA21
RSVD
Y20
VCCSAT A3PLL
B11
VCCUSB3PLL
B18
VCC1_05
N8
VCC1_05
P9
VCC1_05
J11
VCC1_05
H11
VCC1_05
H15
VCC1_05
AE8
VCC1_05
AF22
VCCSUS3_3
AE21
VCCSUS3_3
AE20
RSVD
V21
RSVD
M20
RSVD
K18
VCCCLK
T21
VCCCLK
R21
VCCCLK
J17
VCCACLKPLL
A20
VCC3_3
W9
VCC3_3
V8
VCCDSW 3_3
AH10
VCCSUS3_3
AC9
RSVD
AC20
VCCSUS3_3
AA9
DCPSUS2
AH13
VCC1_05
AG16
VCC1_05
AG17
VCCCLK
J18
VCCCLK
K19
CC67
100U_1206_6.3V6K
@
CC67
100U_1206_6.3V6K
@
1 2
CC54
22U_0805_6.3V6M
CC54
22U_0805_6.3V6M
1 2
CC32
1U_0402_6.3V6K
CC32
1U_0402_6.3V6K
1 2
CC55
22U_0805_6.3V6M
CC55
22U_0805_6.3V6M
1 2
CC48
1U_0402_6.3V6K
CC48
1U_0402_6.3V6K
1 2
CC58
1U_0402_6.3V6K
CC58
1U_0402_6.3V6K
1 2
CC59
22U_0805_6.3V6M
CC59
22U_0805_6.3V6M
1 2
CC57
22U_0805_6.3V6M
CC57
22U_0805_6.3V6M
1 2
CC36
1U_0402_6.3V6K
CC36
1U_0402_6.3V6K
1 2
RC178
0_0603_5%
short@RC178
0_0603_5%
short@
1
2
CC44 0.1U_0402_16V7K
@
CC44 0.1U_0402_16V7K
@
1 2
RC169 0_0402_5%
short@
RC169 0_0402_5%
short@
1
2
RC180 2.2UH_LQM2MPN2R2NG0L_30%
@
RC180 2.2UH_LQM2MPN2R2NG0L_30%
@
1
2
RC176
2.2UH_LQM2MPN2R2NG0L_30%
RC176
2.2UH_LQM2MPN2R2NG0L_30%
1
2
RC173
0_0402_5%
@RC173
0_0402_5%
@
1
2
CC63
47U_0805_6.3V6M
CC63
47U_0805_6.3V6M
1 2
RC172 0_0402_5%
short@
RC172 0_0402_5%
short@
1
2
CC70
1U_0402_6.3V6K
CC70
1U_0402_6.3V6K
1 2
RC171
2.2UH_LQM2MPN2R2NG0L_30%
RC171
2.2UH_LQM2MPN2R2NG0L_30%
1
2
RC170
2.2UH_LQM2MPN2R2NG0L_30%
RC170
2.2UH_LQM2MPN2R2NG0L_30%
1
2
CC33
1U_0402_6.3V6K
CC33
1U_0402_6.3V6K
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
<PWR VR12.6>
VSSSENSE <51>
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GND/VSSSEN
13 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GND/VSSSEN
13 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GND/VSSSEN
13 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
BDW_ULT_DDR3L(Interleaved)
15 OF 19
UCPU1O BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
15 OF 19
UCPU1O BDW-ULT-DDR3L-IL_BGA1168
VSS
AV16
VSS
AV24
VSS
AV33
VSS
AV28
VSS
AV20
VSS
AR11
VSS
AU33
VSS
AU55
VSS
D26
VSS
D27
VSS
D25
VSS
D23
VSS
AV55
VSS
AP38
VSS
AP29
VSS
AP31
VSS
AP39
VSS
AP52
VSS
AP54
VSS
AP57
VSS
AR15
VSS
AR17
VSS
AR23
VSS
AR31
VSS
AR33
VSS
AR39
VSS
AR43
VSS
AR49
VSS
AR5
VSS
AR52
VSS
AT13
VSS
AT35
VSS
AT37
VSS
AT40
VSS
AT42
VSS
AT43
VSS
AT46
VSS
AT49
VSS
AT61
VSS
AT62
VSS
AT63
VSS
AU1
VSS
AU18
VSS
AU22
VSS
AU30
VSS
AU51
VSS
AU53
VSS
AU57
VSS
AU59
VSS
AV14
VSS
AV36
VSS
AV39
VSS
AV41
VSS
AV43
VSS
AV46
VSS
AV49
VSS
AV51
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D29
VSS
D30
VSS
D31
VSS
AV34
VSS
AV59
VSS
AV8
VSS
AW16
VSS
AW40
VSS
AW60
VSS
C11
VSS
C14
VSS
AU28
VSS
AU26
VSS
AU24
VSS
AU20
VSS
AU16
VSS
AP48
VSS
AP26
VSS
AP22
VSS
AP23
VSS
AP3
BDW_ULT_DDR3L(Interleaved) 14 OF 19
UCPU1N BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved) 14 OF 19
UCPU1N BDW-ULT-DDR3L-IL_BGA1168
VSS
AH44
VSS
AH49
VSS
AH51
VSS
AH38
VSS
AP10
VSS
AN49
VSS
AN40
VSS
AN23
VSS
AM1
VSS
AL51
VSS
A28
VSS
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
AB22
VSS
AB7
VSS
AC61
VSS
AD21
VSS
AD3
VSS
AD63
VSS
AE10
VSS
AE5
VSS
AE58
VSS
AF11
VSS
AF12
VSS
AF14
VSS
AF17
VSS
AG1
VSS
AG11
VSS
AG23
VSS
AG60
VSS
AG62
VSS
AG63
VSS
AH19
VSS
AH24
VSS
AH28
VSS
AH30
VSS
AH32
VSS
AH40
VSS
AH42
VSS
AH53
VSS
AH55
VSS
AH57
VSS
AJ13
VSS
AJ14
VSS
AJ23
VSS
AJ25
VSS
AJ27
VSS
AJ29
VSS
AJ43
VSS
AJ45
VSS
AJ50
VSS
AJ52
VSS
AJ56
VSS
AJ58
VSS
AJ60
VSS
AJ63
VSS
AK23
VSS
AK3
VSS
AK52
VSS
AL10
VSS
AL13
VSS
AL17
VSS
AL20
VSS
AL22
VSS
AL23
VSS
AL26
VSS
AL29
VSS
AL31
VSS
AL33
VSS
AL36
VSS
AL39
VSS
AL40
VSS
AL45
VSS
AL46
VSS
AL52
VSS
AL54
VSS
AL57
VSS
AL60
VSS
AL61
VSS
AM17
VSS
AM23
VSS
AM31
VSS
AM52
VSS
AN17
VSS
AN31
VSS
AN32
VSS
AN35
VSS
AN36
VSS
AN39
VSS
AN42
VSS
AN43
VSS
AN45
VSS
AN46
VSS
AN48
VSS
AN51
VSS
AN52
VSS
AN60
VSS
AN63
VSS
AN7
VSS
AP17
VSS
AP20
VSS
AF18
VSS
AF15
VSS
AJ54
VSS
AJ47
VSS
AJ35
VSS
AJ41
VSS
AJ39
VSS
AH36
VSS
AH34
VSS
AH22
VSS
AH20
VSS
AH17
VSS
AG61
VSS
AG21
BDW_ULT_DDR3L(Interleaved)
16 OF 19
UCPU1P
BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
16 OF 19
UCPU1P
BDW-ULT-DDR3L-IL_BGA1168
VSS
D59
VSS
Y63
VSS
Y59
VSS
Y10
VSS
V10
VSS
U9
VSS
U22
VSS
U61
VSS
U20
VSS
T58
VSS
T1
VSS
R22
VSS
R8
VSS
R10
VSS
P63
VSS
P59
VSS
N3
VSS
N10
VSS
M22
VSS
L61
VSS
L58
VSS
L20
VSS
L18
VSS
L17
VSS
L15
VSS
L13
VSS
K12
VSS
K1
VSS
J63
VSS
J59
VSS
J22
VSS
H17
VSS
F38
VSS
F50
VSS
AH16
VSS
F42
VSS
F34
VSS
E17
VSS
G22
VSS
G6
VSS
D39
VSS
D38
VSS
D37
VSS
D35
VSS
D34
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D62
VSS
D8
VSS
E11
VSS
F46
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G3
VSS
G5
VSS
G8
VSS
H13
VSS
D42
VSS
D41
VSS
H57
VSS
L7
VSS
D33
VSS
J10
VSS
V58
VSS
AH46
VSS
V23
VSS_SENSE
E62
VSS
W22
VSS
W20
VSS
V7
VSS
V3
VSS
D49
VSS
F30
VSS
F26
VSS
F20
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
<PWR VR12.6>
VSSSENSE <51>
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GND/VSSSEN
13 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GND/VSSSEN
13 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
GND/VSSSEN
13 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
BDW_ULT_DDR3L(Interleaved)
15 OF 19
UCPU1O BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
15 OF 19
UCPU1O BDW-ULT-DDR3L-IL_BGA1168
VSS
AV16
VSS
AV24
VSS
AV33
VSS
AV28
VSS
AV20
VSS
AR11
VSS
AU33
VSS
AU55
VSS
D26
VSS
D27
VSS
D25
VSS
D23
VSS
AV55
VSS
AP38
VSS
AP29
VSS
AP31
VSS
AP39
VSS
AP52
VSS
AP54
VSS
AP57
VSS
AR15
VSS
AR17
VSS
AR23
VSS
AR31
VSS
AR33
VSS
AR39
VSS
AR43
VSS
AR49
VSS
AR5
VSS
AR52
VSS
AT13
VSS
AT35
VSS
AT37
VSS
AT40
VSS
AT42
VSS
AT43
VSS
AT46
VSS
AT49
VSS
AT61
VSS
AT62
VSS
AT63
VSS
AU1
VSS
AU18
VSS
AU22
VSS
AU30
VSS
AU51
VSS
AU53
VSS
AU57
VSS
AU59
VSS
AV14
VSS
AV36
VSS
AV39
VSS
AV41
VSS
AV43
VSS
AV46
VSS
AV49
VSS
AV51
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D29
VSS
D30
VSS
D31
VSS
AV34
VSS
AV59
VSS
AV8
VSS
AW16
VSS
AW40
VSS
AW60
VSS
C11
VSS
C14
VSS
AU28
VSS
AU26
VSS
AU24
VSS
AU20
VSS
AU16
VSS
AP48
VSS
AP26
VSS
AP22
VSS
AP23
VSS
AP3
BDW_ULT_DDR3L(Interleaved) 14 OF 19
UCPU1N BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved) 14 OF 19
UCPU1N BDW-ULT-DDR3L-IL_BGA1168
VSS
AH44
VSS
AH49
VSS
AH51
VSS
AH38
VSS
AP10
VSS
AN49
VSS
AN40
VSS
AN23
VSS
AM1
VSS
AL51
VSS
A28
VSS
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
AB22
VSS
AB7
VSS
AC61
VSS
AD21
VSS
AD3
VSS
AD63
VSS
AE10
VSS
AE5
VSS
AE58
VSS
AF11
VSS
AF12
VSS
AF14
VSS
AF17
VSS
AG1
VSS
AG11
VSS
AG23
VSS
AG60
VSS
AG62
VSS
AG63
VSS
AH19
VSS
AH24
VSS
AH28
VSS
AH30
VSS
AH32
VSS
AH40
VSS
AH42
VSS
AH53
VSS
AH55
VSS
AH57
VSS
AJ13
VSS
AJ14
VSS
AJ23
VSS
AJ25
VSS
AJ27
VSS
AJ29
VSS
AJ43
VSS
AJ45
VSS
AJ50
VSS
AJ52
VSS
AJ56
VSS
AJ58
VSS
AJ60
VSS
AJ63
VSS
AK23
VSS
AK3
VSS
AK52
VSS
AL10
VSS
AL13
VSS
AL17
VSS
AL20
VSS
AL22
VSS
AL23
VSS
AL26
VSS
AL29
VSS
AL31
VSS
AL33
VSS
AL36
VSS
AL39
VSS
AL40
VSS
AL45
VSS
AL46
VSS
AL52
VSS
AL54
VSS
AL57
VSS
AL60
VSS
AL61
VSS
AM17
VSS
AM23
VSS
AM31
VSS
AM52
VSS
AN17
VSS
AN31
VSS
AN32
VSS
AN35
VSS
AN36
VSS
AN39
VSS
AN42
VSS
AN43
VSS
AN45
VSS
AN46
VSS
AN48
VSS
AN51
VSS
AN52
VSS
AN60
VSS
AN63
VSS
AN7
VSS
AP17
VSS
AP20
VSS
AF18
VSS
AF15
VSS
AJ54
VSS
AJ47
VSS
AJ35
VSS
AJ41
VSS
AJ39
VSS
AH36
VSS
AH34
VSS
AH22
VSS
AH20
VSS
AH17
VSS
AG61
VSS
AG21
BDW_ULT_DDR3L(Interleaved)
16 OF 19
UCPU1P
BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
16 OF 19
UCPU1P
BDW-ULT-DDR3L-IL_BGA1168
VSS
D59
VSS
Y63
VSS
Y59
VSS
Y10
VSS
V10
VSS
U9
VSS
U22
VSS
U61
VSS
U20
VSS
T58
VSS
T1
VSS
R22
VSS
R8
VSS
R10
VSS
P63
VSS
P59
VSS
N3
VSS
N10
VSS
M22
VSS
L61
VSS
L58
VSS
L20
VSS
L18
VSS
L17
VSS
L15
VSS
L13
VSS
K12
VSS
K1
VSS
J63
VSS
J59
VSS
J22
VSS
H17
VSS
F38
VSS
F50
VSS
AH16
VSS
F42
VSS
F34
VSS
E17
VSS
G22
VSS
G6
VSS
D39
VSS
D38
VSS
D37
VSS
D35
VSS
D34
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D62
VSS
D8
VSS
E11
VSS
F46
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G3
VSS
G5
VSS
G8
VSS
H13
VSS
D42
VSS
D41
VSS
H57
VSS
L7
VSS
D33
VSS
J10
VSS
V58
VSS
AH46
VSS
V23
VSS_SENSE
E62
VSS
W22
VSS
W20
VSS
V7
VSS
V3
VSS
D49
VSS
F30
VSS
F26
VSS
F20
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
CFG4
1 : Disabled; No Physical Display Port attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded Display Port
Display Port Presence Strap
*
Layout notes DG V0.9 PROC_OPI_COMP Width=12mil,spacing=12mil Max length=500mil
L
CFG_RCOMP
PROC_OPI_COMP
TD_IREF
CFG4
TP_DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 DC_TEST_AY61_AW61 DC_TEST_AY61_AW62
DC_TEST_AY61_AW62 DC_TEST_A61_B61DC_TEST_AY2_AW2 TP_DC_TEST_A3_B3 DC_TEST_AY61_AW61 DC_TEST_B62_B63DC_TEST_AY3_AW3 DC_TEST_C1_C2
MCP_RSVD_29
CFG0
CFG10 CFG11 CFG14 CFG15CFG1 CFG2CFG0 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG12 CFG13 CFG17 CFG19CFG16 CFG18
CFG0
<6>
CFG1
<6>
CFG2
<6>
CFG3
<6>
CFG4
<6>
CFG5
<6>
CFG6
<6>
CFG7
<6>
CFG8
<6>
CFG9
<6>
CFG10
<6>
CFG11
<6>
CFG12
<6>
CFG13
<6>
CFG14
<6>
CFG15
<6>
CFG16
<6>
CFG18
<6>
CFG17
<6>
CFG19
<6>
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
14 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
RSVD/CFG
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
14 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
RSVD/CFG
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
14 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
RSVD/CFG
RC186 49.9_0402_1% RC186 49.9_0402_1%
1
2
RESERVED
BDW_ULT_DDR3L(Interleaved)
19 OF 19
UCPU1S BDW-ULT-DDR3L-IL_BGA1168
RESERVED
BDW_ULT_DDR3L(Interleaved)
19 OF 19
UCPU1S BDW-ULT-DDR3L-IL_BGA1168
CFG4
AA60
CFG5
Y62
CFG17
AA61
CFG18
U63
CFG7
Y60
CFG11
U60
RSVD_TP
AU63
RSVD_TP
C63
RSVD_TP
C62
RSVD_TP
L60
RSVD_TP
B51
RSVD_TP
A51
CFG10
V60
CFG9
V61
CFG8
V62
RSVD
N60
RSVD
Y22
RSVD
W23
RSVD
D58
RSVD
AV62
RSVD_TP
AV63
VSS
N21
VSS
P22
CFG19
U62
RSVD
R20
RSVD
P20
RSVD
J20
CFG3
AA63
CFG2
AC63
CFG1
AC62
CFG16
AA62
CFG15
T60
CFG14
T61
CFG_RCOMP
V63
RSVD
A5
RSVD
E1
RSVD
D1
TD_IREF
B12
RSVD
H18
PROC_OPI_RCOMP
AY15
CFG12
T63
CFG13
T62
CFG0
AC60
CFG6
Y61
RSVD
B43
BDW_ULT_DDR3L(Interleaved)
18 OF 19
UCPU1R BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
18 OF 19
UCPU1R BDW-ULT-DDR3L-IL_BGA1168
RSVD
AY14
RSVD
AW14
RSVD
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
T23
RSVD
N23
RSVD
R23
RSVD
AU15
RSVD
AU10
RSVD
AM11
RSVD
AL1
RSVD
U10
RSVD
AP7
RC191 8.2K_0402_5% RC191 8.2K_0402_5%
1
2
RC188 49.9_0402_1% RC188 49.9_0402_1%
1
2
RC187
1K_0402_1%
@
RC187
1K_0402_1%
@1 2
BDW_ULT_DDR3L(Interleaved)
17 OF 19
UCPU1Q BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
17 OF 19
UCPU1Q BDW-ULT-DDR3L-IL_BGA1168
DAISY_CHAIN_NCTF_AY2
AY2
DAISY_CHAIN_NCTF_AY60
AY60
DAISY_CHAIN_NCTF_AY61
AY61
DAISY_CHAIN_NCTF_B2
B2
DAISY_CHAIN_NCTF_A3
A3
DAISY_CHAIN_NCTF_A4
A4
DAISY_CHAIN_NCTF_A61
A61
DAISY_CHAIN_NCTF_A60
A60
DAISY_CHAIN_NCTF_AW1
AW1
DAISY_CHAIN_NCTF_AV1
AV1
DAISY_CHAIN_NCTF_A62
A62
DAISY_CHAIN_NCTF_AW2
AW2
DAISY_CHAIN_NCTF_AW3
AW3
DAISY_CHAIN_NCTF_AW61
AW61
DAISY_CHAIN_NCTF_AW63
AW63
DAISY_CHAIN_NCTF_AW62
AW62
DAISY_CHAIN_NCTF_C1
C1
DAISY_CHAIN_NCTF_B62
B62
DAISY_CHAIN_NCTF_B3
B3
DAISY_CHAIN_NCTF_AY3
AY3
DAISY_CHAIN_NCTF_AY62
AY62
DAISY_CHAIN_NCTF_B61
B61
DAISY_CHAIN_NCTF_B63
B63
DAISY_CHAIN_NCTF_C2
C2
RC185
1K_0402_1%
RC185
1K_0402_1%
1 2
RC296 49.9_0402_1%
@
RC296 49.9_0402_1%
@
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
CFG4
1 : Disabled; No Physical Display Port attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded Display Port
Display Port Presence Strap
*
Layout notes DG V0.9 PROC_OPI_COMP Width=12mil,spacing=12mil Max length=500mil
L
CFG_RCOMP
PROC_OPI_COMP
TD_IREF
CFG4
TP_DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_AY2_AW2 DC_TEST_AY3_AW3 DC_TEST_AY61_AW61 DC_TEST_AY61_AW62
DC_TEST_AY61_AW62 DC_TEST_A61_B61DC_TEST_AY2_AW2 TP_DC_TEST_A3_B3 DC_TEST_AY61_AW61 DC_TEST_B62_B63DC_TEST_AY3_AW3 DC_TEST_C1_C2
MCP_RSVD_29
CFG0
CFG10 CFG11 CFG14 CFG15CFG1 CFG2CFG0 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG12 CFG13 CFG17 CFG19CFG16 CFG18
CFG0
<6>
CFG1
<6>
CFG2
<6>
CFG3
<6>
CFG4
<6>
CFG5
<6>
CFG6
<6>
CFG7
<6>
CFG8
<6>
CFG9
<6>
CFG10
<6>
CFG11
<6>
CFG12
<6>
CFG13
<6>
CFG14
<6>
CFG15
<6>
CFG16
<6>
CFG18
<6>
CFG17
<6>
CFG19
<6>
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
14 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
RSVD/CFG
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
14 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
RSVD/CFG
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
14 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
RSVD/CFG
RC186 49.9_0402_1% RC186 49.9_0402_1%
1
2
RESERVED
BDW_ULT_DDR3L(Interleaved)
19 OF 19
UCPU1S BDW-ULT-DDR3L-IL_BGA1168
RESERVED
BDW_ULT_DDR3L(Interleaved)
19 OF 19
UCPU1S BDW-ULT-DDR3L-IL_BGA1168
CFG4
AA60
CFG5
Y62
CFG17
AA61
CFG18
U63
CFG7
Y60
CFG11
U60
RSVD_TP
AU63
RSVD_TP
C63
RSVD_TP
C62
RSVD_TP
L60
RSVD_TP
B51
RSVD_TP
A51
CFG10
V60
CFG9
V61
CFG8
V62
RSVD
N60
RSVD
Y22
RSVD
W23
RSVD
D58
RSVD
AV62
RSVD_TP
AV63
VSS
N21
VSS
P22
CFG19
U62
RSVD
R20
RSVD
P20
RSVD
J20
CFG3
AA63
CFG2
AC63
CFG1
AC62
CFG16
AA62
CFG15
T60
CFG14
T61
CFG_RCOMP
V63
RSVD
A5
RSVD
E1
RSVD
D1
TD_IREF
B12
RSVD
H18
PROC_OPI_RCOMP
AY15
CFG12
T63
CFG13
T62
CFG0
AC60
CFG6
Y61
RSVD
B43
BDW_ULT_DDR3L(Interleaved)
18 OF 19
UCPU1R BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
18 OF 19
UCPU1R BDW-ULT-DDR3L-IL_BGA1168
RSVD
AY14
RSVD
AW14
RSVD
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
T23
RSVD
N23
RSVD
R23
RSVD
AU15
RSVD
AU10
RSVD
AM11
RSVD
AL1
RSVD
U10
RSVD
AP7
RC191 8.2K_0402_5% RC191 8.2K_0402_5%
1
2
RC188 49.9_0402_1% RC188 49.9_0402_1%
1
2
RC187
1K_0402_1%
@
RC187
1K_0402_1%
@1 2
BDW_ULT_DDR3L(Interleaved)
17 OF 19
UCPU1Q BDW-ULT-DDR3L-IL_BGA1168
BDW_ULT_DDR3L(Interleaved)
17 OF 19
UCPU1Q BDW-ULT-DDR3L-IL_BGA1168
DAISY_CHAIN_NCTF_AY2
AY2
DAISY_CHAIN_NCTF_AY60
AY60
DAISY_CHAIN_NCTF_AY61
AY61
DAISY_CHAIN_NCTF_B2
B2
DAISY_CHAIN_NCTF_A3
A3
DAISY_CHAIN_NCTF_A4
A4
DAISY_CHAIN_NCTF_A61
A61
DAISY_CHAIN_NCTF_A60
A60
DAISY_CHAIN_NCTF_AW1
AW1
DAISY_CHAIN_NCTF_AV1
AV1
DAISY_CHAIN_NCTF_A62
A62
DAISY_CHAIN_NCTF_AW2
AW2
DAISY_CHAIN_NCTF_AW3
AW3
DAISY_CHAIN_NCTF_AW61
AW61
DAISY_CHAIN_NCTF_AW63
AW63
DAISY_CHAIN_NCTF_AW62
AW62
DAISY_CHAIN_NCTF_C1
C1
DAISY_CHAIN_NCTF_B62
B62
DAISY_CHAIN_NCTF_B3
B3
DAISY_CHAIN_NCTF_AY3
AY3
DAISY_CHAIN_NCTF_AY62
AY62
DAISY_CHAIN_NCTF_B61
B61
DAISY_CHAIN_NCTF_B63
B63
DAISY_CHAIN_NCTF_C2
C2
RC185
1K_0402_1%
RC185
1K_0402_1%
1 2
RC296 49.9_0402_1%
@
RC296 49.9_0402_1%
@
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DIMM_1 H:4mm Reverse
SI : pop CD99
+V_VDDR_REFA_CA
DDR_CKE0_DIMMA DDR_A_MA3 DDR_CS1_DIMMA#
DDR_A_MA7 DDR_A_MA0
DDR_A_MA8
DDR_A_MA6
DDR_A_MA10DDR_A_MA9DDR_A_BS2 DDR_A_MA1 DDR_A_BS0 DDR_A_CAS#DDR_A_MA5
DDR_A_MA14 DDR_A_MA4
M_CLK_DDR0 M_CLK_DDR#0 DDR_A_MA13
DDR_A_MA11 DDR_A_MA2
DDR_A_MA12
DDR_A_MA15
DDR_A_WE#
DDR_CKE1_DIMMA DDR_A_BS1 DDR_CS0_DIMMA#M_CLK_DDR#1 M_CLK_DDR1 DDR_A_RAS# M_ODT0 PCH_SMBCLK PCH_SMBDATA
+V_VDDR_REFA_DQ
SM_PG_CTRL
M_ODT1
M_ODT3M_ODT2M_ODT1M_ODT0
DDR3_DRAMRST#
DDR_A_D17 DDR_A_D16 DDR_A_DQS2 DDR_A_DQS#2DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D11DDR_A_DQS1 DDR_A_DQS#1
DDR_A_D27
DDR_A_D6DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D12 DDR_A_D20 DDR_A_D21 DDR_A_D30DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D43DDR_A_D40 DDR_A_DQS#6 DDR_A_DQS6DDR_A_D48DDR_A_D32 DDR_A_D56DDR_A_DQS#4 DDR_A_DQS4DDR_A_D33
DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D63DDR_A_D36 DDR_A_D37 DDR_A_D39 DDR_A_D38 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D54 DDR_A_D55
DDR_A_D0
DDR_A_D4
DDR_A_D1
DDR_A_D14
DDR_A_D13
DDR_A_D9
DDR_A_D15
DDR_A_D18
DDR_A_D19 DDR_A_D23
DDR_A_D22
DDR_A_D24
DDR_A_D28 DDR_A_D25 DDR_A_D26
DDR_A_D31DDR_A_D29
DDR_A_D34 DDR_A_D35
DDR_A_D41 DDR_A_D44 DDR_A_D42
DDR_A_D46
DDR_A_D45
DDR_A_D47
DDR_A_D49 DDR_A_D52
DDR_A_D5
DDR_A_D50 DDR_A_D51
DDR_A_D53
DDR_A_D57 DDR_A_D60
DDR_A_D58
DDR_A_D61
DDR_A_D59
DDR_A_D62
DDR_A_D10DDR_A_D7
DDR_A_DQS#[0..7]
<5>
DDR_A_DQS[0..7]
<5>
DDR_A_MA[0..15]
<5>
DDR_A_BS2
<5>
DDR_A_BS0
<5>
DDR_A_WE#
<5>
DDR_A_CAS#
<5>
PCH_SMBDATA <16,18,21,6,7>
DDR_A_D[0..63]
<5>
DDR_CKE1_DIMMA <5>
PCH_SMBCLK <16,18,21,6,7>
M_CLK_DDR#1 <5> M_CLK_DDR1 <5> DDR_CS0_DIMMA# <5> DDR_A_RAS# <5> DDR_A_BS1 <5>
DDR_CKE0_DIMMA
<5>
M_CLK_DDR0
<5>
M_CLK_DDR#0
<5> DDR_CS1_DIMMA#
<5>
DDR3_DRAMRST# <16,4>
M_ODT2 <16> M_ODT3 <16>
SM_PG_CTRL <4,49>
+1.35V_VDDQ
<11,16,17,34,4,49>
+0.6V_0.675VS
<16,49>
+5VALW
<19,24,26,29,30,32,34,37,48,49,56>
+3VS
<12,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+V_VDDR_REFA_CA
<16,17>
+V_VDDR_REFA_DQ
<17>
+3VS
+V_VDDR_REFA_DQ
+V_VDDR_REFA_CA
+0.6V_0.675VS
+0.6V_0.675VS
+1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ +1.35V_VDDQ
+5VALW
+1.35V_VDDQ
+1.35V_VDDQ +0.6V_0.675VS +5VALW +3VS +V_VDDR_REFA_CA +V_VDDR_REFA_DQ
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM0
C
15 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM0
C
15 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM0
C
15 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
CD65
1U_0402_6.3V6K
CD65
1U_0402_6.3V6K
1 2
G
D
S
QD1
BSS138_NL_SOT23-3
G
D
S
QD1
BSS138_NL_SOT23-3
2
1
3
CD58
1U_0402_6.3V6K
@
CD58
1U_0402_6.3V6K
@
1 2
CD66
1U_0402_6.3V6K
CD66
1U_0402_6.3V6K
1 2
RD25
2M_0402_5%
@RD25
2M_0402_5%
@
1 2
CD9
10U_0603_6.3V6M
@
CD9
10U_0603_6.3V6M
@
1 2
CD57
1U_0402_6.3V6K
@
CD57
1U_0402_6.3V6K
@
1 2
CD24
10U_0603_6.3V6M
CD24
10U_0603_6.3V6M
1 2
RD20 66.5_0402_1% RD20 66.5_0402_1%
1
2
CD99 0.1U_0402_16V7K
ESD@
CD99 0.1U_0402_16V7K
ESD@
1 2
CD1
0.1U_0402_16V7K
CD1
0.1U_0402_16V7K
1 2
CD21
0.1U_0402_16V7K
CD21
0.1U_0402_16V7K
1 2
CD12
10U_0603_6.3V6M
CD12
10U_0603_6.3V6M
1 2
CD63
1U_0402_6.3V6K
CD63
1U_0402_6.3V6K
1 2
CD17
0.1U_0402_16V7K
CD17
0.1U_0402_16V7K
1 2
CD19
0.1U_0402_16V7K
CD19
0.1U_0402_16V7K
1 2
CD7
10U_0603_6.3V6M
CD7
10U_0603_6.3V6M
1 2
CD3
0.1U_0402_16V7K
CD3
0.1U_0402_16V7K
1 2
CD13
10U_0603_6.3V6M
@
CD13
10U_0603_6.3V6M
@
1 2
RD24 66.5_0402_1% RD24 66.5_0402_1%
1
2
RD23 66.5_0402_1% RD23 66.5_0402_1%
1
2
CD56
1U_0402_6.3V6K
@
CD56
1U_0402_6.3V6K
@
1 2
CD64
1U_0402_6.3V6K
CD64
1U_0402_6.3V6K
1 2
CD8
10U_0603_6.3V6M
CD8
10U_0603_6.3V6M
1 2
CD11
10U_0603_6.3V6M
@
CD11
10U_0603_6.3V6M
@
1 2
RD21 220K_0402_5% RD21 220K_0402_5%
1 2
CD6
10U_0603_6.3V6M
@
CD6
10U_0603_6.3V6M
@
1 2
RD22 66.5_0402_1% RD22 66.5_0402_1%
1
2
CD10
10U_0603_6.3V6M
CD10
10U_0603_6.3V6M
1 2
JDIMM1 DEREN_40-42045-20404RHF CONN@SP070012JA0JDIMM1 DEREN_40-42045-20404RHF CONN@SP070012JA0
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT #
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VT T 1
203
VT T 2
204
G1
205
G2
206
CD55
1U_0402_6.3V6K
CD55
1U_0402_6.3V6K
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DIMM_1 H:4mm Reverse
SI : pop CD99
+V_VDDR_REFA_CA
DDR_CKE0_DIMMA DDR_A_MA3 DDR_CS1_DIMMA#
DDR_A_MA7 DDR_A_MA0
DDR_A_MA8
DDR_A_MA6
DDR_A_MA10DDR_A_MA9DDR_A_BS2 DDR_A_MA1 DDR_A_BS0 DDR_A_CAS#DDR_A_MA5
DDR_A_MA14 DDR_A_MA4
M_CLK_DDR0 M_CLK_DDR#0 DDR_A_MA13
DDR_A_MA11 DDR_A_MA2
DDR_A_MA12
DDR_A_MA15
DDR_A_WE#
DDR_CKE1_DIMMA DDR_A_BS1 DDR_CS0_DIMMA#M_CLK_DDR#1 M_CLK_DDR1 DDR_A_RAS# M_ODT0 PCH_SMBCLK PCH_SMBDATA
+V_VDDR_REFA_DQ
SM_PG_CTRL
M_ODT1
M_ODT3M_ODT2M_ODT1M_ODT0
DDR3_DRAMRST#
DDR_A_D17 DDR_A_D16 DDR_A_DQS2 DDR_A_DQS#2DDR_A_D2 DDR_A_D3 DDR_A_D8 DDR_A_D11DDR_A_DQS1 DDR_A_DQS#1
DDR_A_D27
DDR_A_D6DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D12 DDR_A_D20 DDR_A_D21 DDR_A_D30DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D43DDR_A_D40 DDR_A_DQS#6 DDR_A_DQS6DDR_A_D48DDR_A_D32 DDR_A_D56DDR_A_DQS#4 DDR_A_DQS4DDR_A_D33
DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D63DDR_A_D36 DDR_A_D37 DDR_A_D39 DDR_A_D38 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D54 DDR_A_D55
DDR_A_D0
DDR_A_D4
DDR_A_D1
DDR_A_D14
DDR_A_D13
DDR_A_D9
DDR_A_D15
DDR_A_D18
DDR_A_D19 DDR_A_D23
DDR_A_D22
DDR_A_D24
DDR_A_D28 DDR_A_D25 DDR_A_D26
DDR_A_D31DDR_A_D29
DDR_A_D34 DDR_A_D35
DDR_A_D41 DDR_A_D44 DDR_A_D42
DDR_A_D46
DDR_A_D45
DDR_A_D47
DDR_A_D49 DDR_A_D52
DDR_A_D5
DDR_A_D50 DDR_A_D51
DDR_A_D53
DDR_A_D57 DDR_A_D60
DDR_A_D58
DDR_A_D61
DDR_A_D59
DDR_A_D62
DDR_A_D10DDR_A_D7
DDR_A_DQS#[0..7]
<5>
DDR_A_DQS[0..7]
<5>
DDR_A_MA[0..15]
<5>
DDR_A_BS2
<5>
DDR_A_BS0
<5>
DDR_A_WE#
<5>
DDR_A_CAS#
<5>
PCH_SMBDATA <16,18,21,6,7>
DDR_A_D[0..63]
<5>
DDR_CKE1_DIMMA <5>
PCH_SMBCLK <16,18,21,6,7>
M_CLK_DDR#1 <5> M_CLK_DDR1 <5> DDR_CS0_DIMMA# <5> DDR_A_RAS# <5> DDR_A_BS1 <5>
DDR_CKE0_DIMMA
<5>
M_CLK_DDR0
<5>
M_CLK_DDR#0
<5> DDR_CS1_DIMMA#
<5>
DDR3_DRAMRST# <16,4>
M_ODT2 <16> M_ODT3 <16>
SM_PG_CTRL <4,49>
+1.35V_VDDQ
<11,16,17,34,4,49>
+0.6V_0.675VS
<16,49>
+5VALW
<19,24,26,29,30,32,34,37,48,49,56>
+3VS
<12,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+V_VDDR_REFA_CA
<16,17>
+V_VDDR_REFA_DQ
<17>
+3VS
+V_VDDR_REFA_DQ
+V_VDDR_REFA_CA
+0.6V_0.675VS
+0.6V_0.675VS
+1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ +1.35V_VDDQ
+5VALW
+1.35V_VDDQ
+1.35V_VDDQ +0.6V_0.675VS +5VALW +3VS +V_VDDR_REFA_CA +V_VDDR_REFA_DQ
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM0
C
15 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM0
C
15 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM0
C
15 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
CD65
1U_0402_6.3V6K
CD65
1U_0402_6.3V6K
1 2
G
D
S
QD1
BSS138_NL_SOT23-3
G
D
S
QD1
BSS138_NL_SOT23-3
2
1
3
CD58
1U_0402_6.3V6K
@
CD58
1U_0402_6.3V6K
@
1 2
CD66
1U_0402_6.3V6K
CD66
1U_0402_6.3V6K
1 2
RD25
2M_0402_5%
@RD25
2M_0402_5%
@
1 2
CD9
10U_0603_6.3V6M
@
CD9
10U_0603_6.3V6M
@
1 2
CD57
1U_0402_6.3V6K
@
CD57
1U_0402_6.3V6K
@
1 2
CD24
10U_0603_6.3V6M
CD24
10U_0603_6.3V6M
1 2
RD20 66.5_0402_1% RD20 66.5_0402_1%
1
2
CD99 0.1U_0402_16V7K
ESD@
CD99 0.1U_0402_16V7K
ESD@
1 2
CD1
0.1U_0402_16V7K
CD1
0.1U_0402_16V7K
1 2
CD21
0.1U_0402_16V7K
CD21
0.1U_0402_16V7K
1 2
CD12
10U_0603_6.3V6M
CD12
10U_0603_6.3V6M
1 2
CD63
1U_0402_6.3V6K
CD63
1U_0402_6.3V6K
1 2
CD17
0.1U_0402_16V7K
CD17
0.1U_0402_16V7K
1 2
CD19
0.1U_0402_16V7K
CD19
0.1U_0402_16V7K
1 2
CD7
10U_0603_6.3V6M
CD7
10U_0603_6.3V6M
1 2
CD3
0.1U_0402_16V7K
CD3
0.1U_0402_16V7K
1 2
CD13
10U_0603_6.3V6M
@
CD13
10U_0603_6.3V6M
@
1 2
RD24 66.5_0402_1% RD24 66.5_0402_1%
1
2
RD23 66.5_0402_1% RD23 66.5_0402_1%
1
2
CD56
1U_0402_6.3V6K
@
CD56
1U_0402_6.3V6K
@
1 2
CD64
1U_0402_6.3V6K
CD64
1U_0402_6.3V6K
1 2
CD8
10U_0603_6.3V6M
CD8
10U_0603_6.3V6M
1 2
CD11
10U_0603_6.3V6M
@
CD11
10U_0603_6.3V6M
@
1 2
RD21 220K_0402_5% RD21 220K_0402_5%
1 2
CD6
10U_0603_6.3V6M
@
CD6
10U_0603_6.3V6M
@
1 2
RD22 66.5_0402_1% RD22 66.5_0402_1%
1
2
CD10
10U_0603_6.3V6M
CD10
10U_0603_6.3V6M
1 2
JDIMM1 DEREN_40-42045-20404RHF CONN@SP070012JA0JDIMM1 DEREN_40-42045-20404RHF CONN@SP070012JA0
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT #
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VT T 1
203
VT T 2
204
G1
205
G2
206
CD55
1U_0402_6.3V6K
CD55
1U_0402_6.3V6K
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DB phase : For ESD request 20141110
DB phase : For ESD request 20141110
+V_VDDR_REFA_CA
DDR_CKE0_DIMMB DDR_B_MA3 DDR_CS1_DIMMB#
DDR_B_MA7 DDR_B_MA0
DDR_B_MA8
DDR_B_MA6
DDR_B_MA10DDR_B_MA9DDR_B_BS2 DDR_B_MA1 DDR_B_BS0 DDR_B_CAS#DDR_B_MA5
DDR_B_MA14 DDR_B_MA4
M_CLK_DDR2 M_CLK_DDR#2 DDR_B_MA13
DDR_B_MA11 DDR_B_MA2
DDR_B_MA12+V_VDDR_REFB_DQ
DDR_B_MA15
DDR_B_WE#
DDR_CKE1_DIMMBDDR3_DRAMRST# DDR_B_BS1 DDR_CS0_DIMMB#M_CLK_DDR#3 M_CLK_DDR3 DDR_B_RAS# M_ODT2 PCH_SMBCLK PCH_SMBDATAM_ODT3
DDR_B_D0 DDR_B_D1DDR_B_DQS#0 DDR_B_DQS0 DDR_B_D24
DDR_B_D6 DDR_B_DQS3 DDR_B_D28DDR_B_D7 DDR_B_DQS#3 DDR_B_D29
DDR_B_D58 DDR_B_D59DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS#6DDR_B_D45 DDR_B_D53 DDR_B_D50 DDR_B_DQS6DDR_B_D32
DDR_B_DQS#7 DDR_B_DQS7DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D47 DDR_B_D46 DDR_B_D54DDR_B_D51 DDR_B_D55 DDR_B_D48DDR_B_D41DDR_B_D11 DDR_B_D19
DDR_B_D12
DDR_B_D17
DDR_B_D14
DDR_B_D18
DDR_B_D15 DDR_B_D21
DDR_B_D16DDR_B_D10
DDR_B_D13
DDR_B_D9 DDR_B_D2
DDR_B_D4 DDR_B_D20 DDR_B_D22 DDR_B_D23 DDR_B_D25
DDR_B_D27
DDR_B_D26
DDR_B_D3
DDR_B_D5
DDR_B_D30
DDR_B_D31
DDR_B_D33
DDR_B_D35 DDR_B_D34DDR_B_D37
DDR_B_D39
DDR_B_D36
DDR_B_D38
DDR_B_D40
DDR_B_D42 DDR_B_D43DDR_B_D44 DDR_B_D49 DDR_B_D52 DDR_B_D56 DDR_B_D57
DDR_B_D60 DDR_B_D61
DDR_B_D62 DDR_B_D63
DDR_B_D8
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_DQS[0..7]
<5>
DDR_B_MA[0..15]
<5>
DDR_B_BS2
<5>
DDR_B_BS0
<5>
DDR_B_WE#
<5>
DDR_B_CAS#
<5>
PCH_SMBDATA <15,18,21,6,7>
DDR_B_D[0..63]
<5>
DDR_CKE1_DIMMB <5>
PCH_SMBCLK <15,18,21,6,7>
M_CLK_DDR#3 <5> M_CLK_DDR3 <5> M_ODT2 <15> DDR_CS0_DIMMB# <5> DDR_B_RAS# <5> DDR_B_BS1 <5>
DDR_CKE0_DIMMB
<5>
M_CLK_DDR2
<5>
M_CLK_DDR#2
<5>
DDR_CS1_DIMMB#
<5>
DDR3_DRAMRST# <15,4>
DDR_B_DQS#[0..7]
<5>
M_ODT3 <15>
+3VS
<12,15,18,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.35V_VDDQ
<11,15,17,34,4,49>
+0.6V_0.675VS
<15,49>
+V_VDDR_REFB_DQ
<17>
+V_VDDR_REFA_CA
<15,17>
+3VS
+V_VDDR_REFB_DQ
+V_VDDR_REFA_CA
+3VS
+0.6V_0.675VS
+0.6V_0.675VS
+1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ +1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ
+3VS+1.35V_VDDQ +0.6V_0.675VS +V_VDDR_REFB_DQ +V_VDDR_REFA_CA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM1
16 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM1
16 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM1
16 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
CD40
10U_0603_6.3V6M
@
CD40
10U_0603_6.3V6M
@
1 2
C5232
0.22U_0201_6.3V
@ESD@
C5232
0.22U_0201_6.3V
@ESD@
1 2
C5217 0.1U_0402_16V7K
@ESD@
C5217 0.1U_0402_16V7K
@ESD@
1 2
C5220
0.22U_0201_6.3V
@ESD@
C5220
0.22U_0201_6.3V
@ESD@
1 2
CD33
10U_0603_6.3V6M
@
CD33
10U_0603_6.3V6M
@
1 2
CD59
1U_0402_6.3V6K
CD59
1U_0402_6.3V6K
1 2
C5227
0.22U_0201_6.3V
@ESD@
C5227
0.22U_0201_6.3V
@ESD@
1 2
CD69
1U_0402_6.3V6K
CD69
1U_0402_6.3V6K
1 2
CD35
10U_0603_6.3V6M
CD35
10U_0603_6.3V6M
1 2
C5218 0.1U_0402_16V7K
@ESD@
C5218 0.1U_0402_16V7K
@ESD@
1 2
JDIMM2 FOX_AS0A626-H2SB-7H SP070015AA0 CONN@JDIMM2 FOX_AS0A626-H2SB-7H SP070015AA0 CONN@
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT #
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VT T 1
203
VT T 2
204
G1
205
G2
206
CD29
0.1U_0402_16V7K
CD29
0.1U_0402_16V7K
1 2
C5221
0.22U_0201_6.3V
@ESD@
C5221
0.22U_0201_6.3V
@ESD@
1 2
CD60
1U_0402_6.3V6K
CD60
1U_0402_6.3V6K
1 2
CD37
10U_0603_6.3V6M
CD37
10U_0603_6.3V6M
1 2
CD67
1U_0402_6.3V6K
@
CD67
1U_0402_6.3V6K
@
1 2
C5226
0.22U_0201_6.3V
@ESD@
C5226
0.22U_0201_6.3V
@ESD@
1 2
C5222
0.22U_0201_6.3V
@ESD@
C5222
0.22U_0201_6.3V
@ESD@
1 2
CD44
0.1U_0402_16V7K
CD44
0.1U_0402_16V7K
1 2
CD61
1U_0402_6.3V6K
CD61
1U_0402_6.3V6K
1 2
CD68
1U_0402_6.3V6K
@
CD68
1U_0402_6.3V6K
@
1 2
C5215 0.1U_0402_16V7K
@ESD@
C5215 0.1U_0402_16V7K
@ESD@
1 2
C5225
0.22U_0201_6.3V
@ESD@
C5225
0.22U_0201_6.3V
@ESD@
1 2
CD70
1U_0402_6.3V6K
CD70
1U_0402_6.3V6K
1 2
CD36
10U_0603_6.3V6M
@
CD36
10U_0603_6.3V6M
@
1 2
CD50
10U_0603_6.3V6M
CD50
10U_0603_6.3V6M
1 2
C5229
0.22U_0201_6.3V
@ESD@
C5229
0.22U_0201_6.3V
@ESD@
1 2
RD4
10K_0402_5%
RD4
10K_0402_5%
1 2
C5228
0.22U_0201_6.3V
@ESD@
C5228
0.22U_0201_6.3V
@ESD@
1 2
C5224
0.22U_0201_6.3V
@ESD@
C5224
0.22U_0201_6.3V
@ESD@
1 2
CD38
10U_0603_6.3V6M
@
CD38
10U_0603_6.3V6M
@
1 2
CD39
10U_0603_6.3V6M
CD39
10U_0603_6.3V6M
1 2
C5230
0.22U_0201_6.3V
@ESD@
C5230
0.22U_0201_6.3V
@ESD@
1 2
C5223
0.22U_0201_6.3V
@ESD@
C5223
0.22U_0201_6.3V
@ESD@
1 2
CD34
10U_0603_6.3V6M
CD34
10U_0603_6.3V6M
1 2
CD27
0.1U_0402_16V7K
CD27
0.1U_0402_16V7K
1 2
CD45
0.1U_0402_16V7K
CD45
0.1U_0402_16V7K
1 2
C5231
0.22U_0201_6.3V
@ESD@
C5231
0.22U_0201_6.3V
@ESD@
1 2
CD62
1U_0402_6.3V6K
@
CD62
1U_0402_6.3V6K
@
1 2
C5216 0.1U_0402_16V7K
@ESD@
C5216 0.1U_0402_16V7K
@ESD@
1 2
C5219
0.22U_0201_6.3V
@ESD@
C5219
0.22U_0201_6.3V
@ESD@
1 2
CD46
0.1U_0402_16V7K
CD46
0.1U_0402_16V7K
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DB phase : For ESD request 20141110
DB phase : For ESD request 20141110
+V_VDDR_REFA_CA
DDR_CKE0_DIMMB DDR_B_MA3 DDR_CS1_DIMMB#
DDR_B_MA7 DDR_B_MA0
DDR_B_MA8
DDR_B_MA6
DDR_B_MA10DDR_B_MA9DDR_B_BS2 DDR_B_MA1 DDR_B_BS0 DDR_B_CAS#DDR_B_MA5
DDR_B_MA14 DDR_B_MA4
M_CLK_DDR2 M_CLK_DDR#2 DDR_B_MA13
DDR_B_MA11 DDR_B_MA2
DDR_B_MA12+V_VDDR_REFB_DQ
DDR_B_MA15
DDR_B_WE#
DDR_CKE1_DIMMBDDR3_DRAMRST# DDR_B_BS1 DDR_CS0_DIMMB#M_CLK_DDR#3 M_CLK_DDR3 DDR_B_RAS# M_ODT2 PCH_SMBCLK PCH_SMBDATAM_ODT3
DDR_B_D0 DDR_B_D1DDR_B_DQS#0 DDR_B_DQS0 DDR_B_D24
DDR_B_D6 DDR_B_DQS3 DDR_B_D28DDR_B_D7 DDR_B_DQS#3 DDR_B_D29
DDR_B_D58 DDR_B_D59DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS#6DDR_B_D45 DDR_B_D53 DDR_B_D50 DDR_B_DQS6DDR_B_D32
DDR_B_DQS#7 DDR_B_DQS7DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D47 DDR_B_D46 DDR_B_D54DDR_B_D51 DDR_B_D55 DDR_B_D48DDR_B_D41DDR_B_D11 DDR_B_D19
DDR_B_D12
DDR_B_D17
DDR_B_D14
DDR_B_D18
DDR_B_D15 DDR_B_D21
DDR_B_D16DDR_B_D10
DDR_B_D13
DDR_B_D9 DDR_B_D2
DDR_B_D4 DDR_B_D20 DDR_B_D22 DDR_B_D23 DDR_B_D25
DDR_B_D27
DDR_B_D26
DDR_B_D3
DDR_B_D5
DDR_B_D30
DDR_B_D31
DDR_B_D33
DDR_B_D35 DDR_B_D34DDR_B_D37
DDR_B_D39
DDR_B_D36
DDR_B_D38
DDR_B_D40
DDR_B_D42 DDR_B_D43DDR_B_D44 DDR_B_D49 DDR_B_D52 DDR_B_D56 DDR_B_D57
DDR_B_D60 DDR_B_D61
DDR_B_D62 DDR_B_D63
DDR_B_D8
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_DQS[0..7]
<5>
DDR_B_MA[0..15]
<5>
DDR_B_BS2
<5>
DDR_B_BS0
<5>
DDR_B_WE#
<5>
DDR_B_CAS#
<5>
PCH_SMBDATA <15,18,21,6,7>
DDR_B_D[0..63]
<5>
DDR_CKE1_DIMMB <5>
PCH_SMBCLK <15,18,21,6,7>
M_CLK_DDR#3 <5> M_CLK_DDR3 <5> M_ODT2 <15> DDR_CS0_DIMMB# <5> DDR_B_RAS# <5> DDR_B_BS1 <5>
DDR_CKE0_DIMMB
<5>
M_CLK_DDR2
<5>
M_CLK_DDR#2
<5>
DDR_CS1_DIMMB#
<5>
DDR3_DRAMRST# <15,4>
DDR_B_DQS#[0..7]
<5>
M_ODT3 <15>
+3VS
<12,15,18,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.35V_VDDQ
<11,15,17,34,4,49>
+0.6V_0.675VS
<15,49>
+V_VDDR_REFB_DQ
<17>
+V_VDDR_REFA_CA
<15,17>
+3VS
+V_VDDR_REFB_DQ
+V_VDDR_REFA_CA
+3VS
+0.6V_0.675VS
+0.6V_0.675VS
+1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ +1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ
+1.35V_VDDQ
+3VS+1.35V_VDDQ +0.6V_0.675VS +V_VDDR_REFB_DQ +V_VDDR_REFA_CA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM1
16 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM1
16 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DDR3L DIMM1
16 61
Saturday, January 31, 2015
2010/05/27
2011/05/11
Compal Electronics, Inc.
LA-C701P
CD40
10U_0603_6.3V6M
@
CD40
10U_0603_6.3V6M
@
1 2
C5232
0.22U_0201_6.3V
@ESD@
C5232
0.22U_0201_6.3V
@ESD@
1 2
C5217 0.1U_0402_16V7K
@ESD@
C5217 0.1U_0402_16V7K
@ESD@
1 2
C5220
0.22U_0201_6.3V
@ESD@
C5220
0.22U_0201_6.3V
@ESD@
1 2
CD33
10U_0603_6.3V6M
@
CD33
10U_0603_6.3V6M
@
1 2
CD59
1U_0402_6.3V6K
CD59
1U_0402_6.3V6K
1 2
C5227
0.22U_0201_6.3V
@ESD@
C5227
0.22U_0201_6.3V
@ESD@
1 2
CD69
1U_0402_6.3V6K
CD69
1U_0402_6.3V6K
1 2
CD35
10U_0603_6.3V6M
CD35
10U_0603_6.3V6M
1 2
C5218 0.1U_0402_16V7K
@ESD@
C5218 0.1U_0402_16V7K
@ESD@
1 2
JDIMM2 FOX_AS0A626-H2SB-7H SP070015AA0 CONN@JDIMM2 FOX_AS0A626-H2SB-7H SP070015AA0 CONN@
VREF_DQ
1
VSS1
2
VSS2
3
DQ4
4
DQ0
5
DQ5
6
DQ1
7
VSS3
8
VSS4
9
DQS#0
10
DM0
11
DQS0
12
VSS5
13
VSS6
14
DQ2
15
DQ6
16
DQ3
17
DQ7
18
VSS7
19
VSS8
20
DQ8
21
DQ12
22
DQ9
23
DQ13
24
VSS9
25
VSS10
26
DQS#1
27
DM1
28
DQS1
29
RESET#
30
VSS11
31
VSS12
32
DQ10
33
DQ14
34
DQ11
35
DQ15
36
VSS13
37
VSS14
38
DQ16
39
DQ20
40
DQ17
41
DQ21
42
VSS15
43
VSS16
44
DQS#2
45
DM2
46
DQS2
47
VSS17
48
VSS18
49
DQ22
50
DQ18
51
DQ23
52
DQ19
53
VSS19
54
VSS20
55
DQ28
56
DQ24
57
DQ29
58
DQ25
59
VSS21
60
VSS22
61
DQS#3
62
DM3
63
DQS3
64
VSS23
65
VSS24
66
DQ26
67
DQ30
68
DQ27
69
DQ31
70
VSS25
71
VSS26
72
A12/BC#
83
A11
84
A9
85
A7
86
VDD5
87
VDD6
88
A8
89
A6
90
CKE0
73
CKE1
74
VDD1
75
VDD2
76
NC1
77
A15
78
BA2
79
A14
80
VDD3
81
VDD4
82
A5
91
A4
92
VDD7
93
VDD8
94
A3
95
A2
96
A1
97
A0
98
VDD9
99
VDD10
100
CK0
101
CK1
102
CK0#
103
CK1#
104
VDD11
105
VDD12
106
A10/AP
107
BA1
108
BA0
109
RAS#
110
VDD13
111
VDD14
112
WE#
113
S0#
114
CAS#
115
ODT0
116
VDD15
117
VDD16
118
A13
119
ODT1
120
S1#
121
NC2
122
VDD17
123
VDD18
124
NCTEST
125
VREF_CA
126
VSS27
127
VSS28
128
DQ32
129
DQ36
130
DQ33
131
DQ37
132
VSS29
133
VSS30
134
DQS#4
135
DM4
136
DQS4
137
VSS31
138
VSS32
139
DQ38
140
DQ34
141
DQ39
142
DQ35
143
VSS33
144
VSS34
145
DQ44
146
DQ40
147
DQ45
148
DQ41
149
VSS35
150
VSS36
151
DQS#5
152
DM5
153
DQS5
154
VSS37
155
VSS38
156
DQ42
157
DQ46
158
DQ43
159
DQ47
160
VSS39
161
VSS40
162
DQ48
163
DQ52
164
DQ49
165
DQ53
166
VSS41
167
VSS42
168
DQS#6
169
DM6
170
DQS6
171
VSS43
172
VSS44
173
DQ54
174
DQ50
175
DQ55
176
DQ51
177
VSS45
178
VSS46
179
DQ60
180
DQ56
181
DQ61
182
DQ57
183
VSS47
184
VSS48
185
DQS#7
186
DM7
187
DQS7
188
VSS49
189
VSS50
190
DQ58
191
DQ62
192
DQ59
193
DQ63
194
VSS51
195
VSS52
196
SA0
197
EVENT #
198
VDDSPD
199
SDA
200
SA1
201
SCL
202
VT T 1
203
VT T 2
204
G1
205
G2
206
CD29
0.1U_0402_16V7K
CD29
0.1U_0402_16V7K
1 2
C5221
0.22U_0201_6.3V
@ESD@
C5221
0.22U_0201_6.3V
@ESD@
1 2
CD60
1U_0402_6.3V6K
CD60
1U_0402_6.3V6K
1 2
CD37
10U_0603_6.3V6M
CD37
10U_0603_6.3V6M
1 2
CD67
1U_0402_6.3V6K
@
CD67
1U_0402_6.3V6K
@
1 2
C5226
0.22U_0201_6.3V
@ESD@
C5226
0.22U_0201_6.3V
@ESD@
1 2
C5222
0.22U_0201_6.3V
@ESD@
C5222
0.22U_0201_6.3V
@ESD@
1 2
CD44
0.1U_0402_16V7K
CD44
0.1U_0402_16V7K
1 2
CD61
1U_0402_6.3V6K
CD61
1U_0402_6.3V6K
1 2
CD68
1U_0402_6.3V6K
@
CD68
1U_0402_6.3V6K
@
1 2
C5215 0.1U_0402_16V7K
@ESD@
C5215 0.1U_0402_16V7K
@ESD@
1 2
C5225
0.22U_0201_6.3V
@ESD@
C5225
0.22U_0201_6.3V
@ESD@
1 2
CD70
1U_0402_6.3V6K
CD70
1U_0402_6.3V6K
1 2
CD36
10U_0603_6.3V6M
@
CD36
10U_0603_6.3V6M
@
1 2
CD50
10U_0603_6.3V6M
CD50
10U_0603_6.3V6M
1 2
C5229
0.22U_0201_6.3V
@ESD@
C5229
0.22U_0201_6.3V
@ESD@
1 2
RD4
10K_0402_5%
RD4
10K_0402_5%
1 2
C5228
0.22U_0201_6.3V
@ESD@
C5228
0.22U_0201_6.3V
@ESD@
1 2
C5224
0.22U_0201_6.3V
@ESD@
C5224
0.22U_0201_6.3V
@ESD@
1 2
CD38
10U_0603_6.3V6M
@
CD38
10U_0603_6.3V6M
@
1 2
CD39
10U_0603_6.3V6M
CD39
10U_0603_6.3V6M
1 2
C5230
0.22U_0201_6.3V
@ESD@
C5230
0.22U_0201_6.3V
@ESD@
1 2
C5223
0.22U_0201_6.3V
@ESD@
C5223
0.22U_0201_6.3V
@ESD@
1 2
CD34
10U_0603_6.3V6M
CD34
10U_0603_6.3V6M
1 2
CD27
0.1U_0402_16V7K
CD27
0.1U_0402_16V7K
1 2
CD45
0.1U_0402_16V7K
CD45
0.1U_0402_16V7K
1 2
C5231
0.22U_0201_6.3V
@ESD@
C5231
0.22U_0201_6.3V
@ESD@
1 2
CD62
1U_0402_6.3V6K
@
CD62
1U_0402_6.3V6K
@
1 2
C5216 0.1U_0402_16V7K
@ESD@
C5216 0.1U_0402_16V7K
@ESD@
1 2
C5219
0.22U_0201_6.3V
@ESD@
C5219
0.22U_0201_6.3V
@ESD@
1 2
CD46
0.1U_0402_16V7K
CD46
0.1U_0402_16V7K
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
<DDR3L_1><DDR3L_0>
<CPU>
<CPU>
<DDR3L_A_CA>
DDR3L VREF
<CPU>
<DDR3L_B_CA>
+1.35V_VDDQ
<11,15,16,34,4,49>
+V_SM_VREF_CNT
<5>
+V_VDDR_REFA_CA
<15,16>
+V_VDDR_REFA_DQ
<15>
+V_DDR_REFA_R
<5>
+V_VDDR_REFB_DQ
<16>
+V_VDDR_REFA_DQ
+V_DDR_REFB_R
+1.35V_VDDQ
+V_VDDR_REFB_DQ
+V_VDDR_REFA_CA
+1.35V_VDDQ
+V_SM_VREF_CNT
+V_DDR_REFA_R
+1.35V_VDDQ
+V_VDDR_REFA_CA +1.35V_VDDQ +V_SM_VREF_CNT +V_DDR_REFA_R +V_VDDR_REFA_DQ +V_VDDR_REFB_DQ
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
17 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
DDR3L VREF
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
17 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
DDR3L VREF
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
17 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
DDR3L VREF
RD7 2_0402_1%RD7 2_0402_1%
1
2
RD8 2_0402_1%RD8 2_0402_1%
1
2
CD54
0.022U_0402_25V7K
@
CD54
0.022U_0402_25V7K
@
1 2
RD11
24.9_0402_1%
@
RD11
24.9_0402_1%
@
1 2
RD19
24.9_0402_1%
@
RD19
24.9_0402_1%
@
1 2
RD15 2_0402_1%RD15 2_0402_1%
1
2
CD52
0.022U_0402_25V7K
@
CD52
0.022U_0402_25V7K
@
1 2
CD53
0.022U_0402_25V7K
@
CD53
0.022U_0402_25V7K
@
1 2
RD12
24.9_0402_1%
@
RD12
24.9_0402_1%
@
1 2
RD17 1.8K_0402_1% RD17 1.8K_0402_1%
1 2
RD10 1.8K_0402_1% RD10 1.8K_0402_1%
1 2
RD5 1.8K_0402_1% RD5 1.8K_0402_1%
1 2
RD9 1.8K_0402_1% RD9 1.8K_0402_1%
1 2
RD13 1.8K_0402_1% RD13 1.8K_0402_1%
1 2
RD6 1.8K_0402_1% RD6 1.8K_0402_1%
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
<DDR3L_1><DDR3L_0>
<CPU>
<CPU>
<DDR3L_A_CA>
DDR3L VREF
<CPU>
<DDR3L_B_CA>
+1.35V_VDDQ
<11,15,16,34,4,49>
+V_SM_VREF_CNT
<5>
+V_VDDR_REFA_CA
<15,16>
+V_VDDR_REFA_DQ
<15>
+V_DDR_REFA_R
<5>
+V_VDDR_REFB_DQ
<16>
+V_VDDR_REFA_DQ
+V_DDR_REFB_R
+1.35V_VDDQ
+V_VDDR_REFB_DQ
+V_VDDR_REFA_CA
+1.35V_VDDQ
+V_SM_VREF_CNT
+V_DDR_REFA_R
+1.35V_VDDQ
+V_VDDR_REFA_CA +1.35V_VDDQ +V_SM_VREF_CNT +V_DDR_REFA_R +V_VDDR_REFA_DQ +V_VDDR_REFB_DQ
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
17 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
DDR3L VREF
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
17 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
DDR3L VREF
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
17 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
DDR3L VREF
RD7 2_0402_1%RD7 2_0402_1%
1
2
RD8 2_0402_1%RD8 2_0402_1%
1
2
CD54
0.022U_0402_25V7K
@
CD54
0.022U_0402_25V7K
@
1 2
RD11
24.9_0402_1%
@
RD11
24.9_0402_1%
@
1 2
RD19
24.9_0402_1%
@
RD19
24.9_0402_1%
@
1 2
RD15 2_0402_1%RD15 2_0402_1%
1
2
CD52
0.022U_0402_25V7K
@
CD52
0.022U_0402_25V7K
@
1 2
CD53
0.022U_0402_25V7K
@
CD53
0.022U_0402_25V7K
@
1 2
RD12
24.9_0402_1%
@
RD12
24.9_0402_1%
@
1 2
RD17 1.8K_0402_1% RD17 1.8K_0402_1%
1 2
RD10 1.8K_0402_1% RD10 1.8K_0402_1%
1 2
RD5 1.8K_0402_1% RD5 1.8K_0402_1%
1 2
RD9 1.8K_0402_1% RD9 1.8K_0402_1%
1 2
RD13 1.8K_0402_1% RD13 1.8K_0402_1%
1 2
RD6 1.8K_0402_1% RD6 1.8K_0402_1%
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
PIN15
2132S 2132R +LCD_VDD *
* Version R internal Power Switch, can output 1A, Rds(on)=0.2 ohm
TL_ENVDD
2132R
3.3V
1.5~3.3V
* Version R has internal level shifter, remove level shifter circuit on AMD platform
1. Support LDO mode and SWR mode 2. Internal ROM 3. Support LCD_VDD(internal Power switch) 4. Integrates Level shifter
Different between 2132S and 2132R
Ac c e p t v o lt a g e in p u t ( h ig h le v e l)
PIN16 2132S
2132S 2132R
1. Support SWR mode
40mil40mil 40mil40mil 40mil
100mil
80mil 40mil
PIN30 PIN31
LDO
Use 0 ohm
mount LT7
Do not support
2132N2132S
SWR
SWR / LDO Mode select
※※※※
If use 2132N, please select LDO mode as default.
mount LT7
80mil 80mil
<CPU>
<CONN>
<CONN>
〈〈〈〈
※※※※
Default mode
〉〉〉〉
※※※※
ROM only mode : PIN 30 4.7k pull low, Pin 31 4.7k
pull high.
EP mode : PIN 30 4.7k pull high, Pin 31 4.7k pull low. EEPROM : PIN 30 4.7k pull high, Pin 31 4.7k pull high.
<EC CTRL> <RTS2132>
<LVDS Panel>
<CPU CTRL>
<CPU>
PD 100K on LVDS page
JPHW3 need to short
2132S@
2132S@
<SI> LT7 change to 0 ohm short pad use LDO mode translator only
<eDP to connector>
2
4
<CPU by PASS eDP>
<LVDS to connector>
RTD2132 SMBus revrse to PCH
Delete BKL_PWM_CPU and DP_INT_PWM 20141113
DB phase : add eDP Lan1 for FHD 20141117
DB phase : add eDP Lan1 for FHD 20141117
Layout notes CC97~CC102 must closed to connector
L
L
Layout notes RT16~RT19 must closed to connector
L
Layout notes RP6 RP9 RP10 must closed to connector
L
Layout notes RT9 close to pin15 RT10 CT23 close to CONN +DP_ENVDD 80mil trace width
L
Layout notes RT8 close to pin8
Layout notes CT16~CT18 Close to Pin3
L
Layout notes Close to LT5 Pin18 Pin13
L
Layout notes Close to Pin11 Pin27 Pin7
L
LCD_EDID_DATA LCD_EDID_CLK
LCD_EDID_DATA
MIIC_SDA MIIC_SCL
BKL_PWM_CPU
EDP_CPU_AUX# EDP_CPU_AUX EDP_CPU_LANE_N0 EDP_CPU_LANE_P0
+SWR_VDD+DP_V33
+SWR_V12
+SWR_LX
+DP_ENVDD
MIIC_SDA
MIIC_SCL
+SWR_VDD
TS_BKOFF#
+DP_V33
+SWR_V12
EDP_CPU_AUX EDP_CPU_LANE_N0 EDP_CPU_LANE_P0 EDP_CPU_AUX#
DP_INT_PWM +DP_ENVDD
LVDS_TXN1 LVDS_TXP1 LVDS_TXN0 LVDS_TXP0
LCD_EDID_CLK
LVDS_CLKN LVDS_CLKP LVDS_TXN2 LVDS_TXP2
EDP_HPD
EDP_HPD
EDP_HPD_PANEL
EC_BKOFF#
LCD_DATA LVDS_TXN2_LN0 LVDS_TXP2_LP0 LCD_CLK
EDP_AUX# EDP_AUX
EDP_LANE_N0 EDP_LANE_P0
EDP_CPU_LANE_N0 EDP_CPU_LANE_P0
EDP_CPU_AUX EDP_CPU_AUX#
EDP_LANE_N0 EDP_LANE_P0
EDP_AUX#
EDP_AUX
TS_BKOFF#
LCD_EDID_DATA LCD_EDID_CLK
LCD_CLK
LCD_DATA
LVDS_TXP2_LP0 LVDS_TXN2_LN0
LVDS_TXP2 LVDS_TXN2
CIICSCL1 CIICSDA1
CIICSCL1 CIICSDA1
EDP_CPU_LANE_N1 EDP_CPU_LANE_P1
LVDS_TXN1_LN1 LVDS_TXP1_LP1
EDP_CPU_LANE_P1 EDP_CPU_LANE_N1
LVDS_TXP1 LVDS_TXN1
LVDS_TXN1_LN1 LVDS_TXP1_LP1
LVDS_CLKN <19>
DP_INT_PWM <19> +DP_ENVDD <19>
LVDS_CLKP <19>
EDP_CPU_LANE_P0_C
<4>
EDP_CPU_AUX#_C
<4>
EDP_CPU_AUX_C
<4>
BKL_PWM_CPU <19,8>
EDP_CPU_LANE_N0_C
<4>
EC_BKOFF#
<25>
EC_TS_BKOFF# <19>
EDP_HPD
<8>
EDP_HPD_PANEL <19>
LVDS_TXP0 <19> LVDS_TXN0 <19>
LCD_CLK <19> LCD_DATA <19> LVDS_TXN2_LN0 <19> LVDS_TXP2_LP0 <19>
EC_SMB_DA2
<21,25,36,7>
EC_SMB_CK2
<21,25,36,7>
PCH_SMBDATA
<15,16,21,6,7>
PCH_SMBCLK
<15,16,21,6,7>
+3VS
<12,15,16,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+LCDVDD
<19,34>
EDP_CPU_LANE_P1_C
<4>
EDP_CPU_LANE_N1_C
<4>
LVDS_TXP1_LP1 <19> LVDS_TXN1_LN1 <19>
+3VS_RT
+3VS_RT
+3VS_RT
+3VS
+3VS_RT
+LCDVDD
+3VS_RT
+3VS
+3VS +LCDVDD
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
18
0.1
LVDS Translator-RTD2132N
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
18
0.1
LVDS Translator-RTD2132N
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
18
0.1
LVDS Translator-RTD2132N
Saturday, January 31, 2015
RT193 0_0201_5% RT193 0_0201_5%
1
2
CC97 .1U_0402_16V7K CC97 .1U_0402_16V7K
1
2
RT10 100K_0402_5% LVDS@RT10 100K_0402_5% LVDS@
1 2
RT195 0_0201_5%
@
RT195 0_0201_5%
@
1
2
CT11
0.1U_0402_16V4Z
LVDS@
CT11
0.1U_0402_16V4Z
LVDS@
1 2
CT23
4.7U_0603_6.3V6K
LVDS@
CT23
4.7U_0603_6.3V6K
LVDS@
12
CT18
0.1U_0402_16V4Z
LVDS@
CT18
0.1U_0402_16V4Z
LVDS@
1 2
RT5
4.7K_0402_5% @
RT5
4.7K_0402_5% @
12
CT14
0.1U_0402_16V4Z
LVDS@
CT14
0.1U_0402_16V4Z
LVDS@
1 2
CC100 .1U_0402_16V7K
eDP@
CC100 .1U_0402_16V7K
eDP@1
2
UT3
TC7SH08FUF_SSOP5
LVDS@
UT3
TC7SH08FUF_SSOP5
LVDS@
B
1
A
2
Y
4
P
5
G
3
RT4
4.7K_0402_5%
LVDS@
RT4
4.7K_0402_5%
LVDS@
12
CT8
0.1U_0402_16V4Z
LVDS@
CT8
0.1U_0402_16V4Z
LVDS@
1 2
RT9 0_0805_5% LVDS@RT9 0_0805_5% LVDS@
1
2
CC103 .1U_0402_16V7K
eDP@
CC103 .1U_0402_16V7K
eDP@1
2
RT6 4.7K_0402_5%
LVDS@
RT6 4.7K_0402_5%
LVDS@
1
2
CT16
10U_0603_6.3V6M
LVDS@
CT16
10U_0603_6.3V6M
LVDS@
1 2
RT34 0_0201_5%
eDP@
RT34 0_0201_5%
eDP@
1
2
CC101 .1U_0402_16V7K CC101 .1U_0402_16V7K
1
2
LT5 FBMA-L11-201209-221LMA30T_0805
LVDS@
LT5 FBMA-L11-201209-221LMA30T_0805
LVDS@
1
2
JPHW3
JUMP_43X79
@
JPHW3
JUMP_43X79
@
1
1
2
2
RT16 0_0402_5%
eDP@
RT16 0_0402_5%
eDP@
1
2
RT196 0_0201_5%
@
RT196 0_0201_5%
@
1
2
RT194 0_0201_5% RT194 0_0201_5%
1
2
RT8
12K_0402_1%
LVDS@
RT8
12K_0402_1%
LVDS@
12
CT15
0.1U_0402_16V4Z
LVDS@
CT15
0.1U_0402_16V4Z
LVDS@
1 2
RT18 0_0402_5%
LVDS@
RT18 0_0402_5%
LVDS@
1
2
CT13
0.1U_0402_16V4Z
LVDS@
CT13
0.1U_0402_16V4Z
LVDS@
1 2
RP9 0_0804_8P4R_5%
eDP@
SD309000080
RP9 0_0804_8P4R_5%
eDP@
SD309000080
1
8
2
7
3
6
4
5
RP100_0804_8P4R_5%
LVDS@
SD309000080
RP100_0804_8P4R_5%
LVDS@
SD309000080
1
8
2
7
3
6
4
5
RT17 0_0402_5%
eDP@
RT17 0_0402_5%
eDP@
1
2
RT2 4.7K_0402_5%
@
RT2 4.7K_0402_5%
@
12
LT6 FBMA-L11-201209-221LMA30T_0805
LVDS@
LT6 FBMA-L11-201209-221LMA30T_0805
LVDS@
1
2
RT19 0_0402_5%
LVDS@
RT19 0_0402_5%
LVDS@
1
2
LT7 0_1206_5%
@
LT7 0_1206_5%
@
1
2
CC102 .1U_0402_16V7K CC102 .1U_0402_16V7K
1
2
CT12
10U_0603_6.3V6M
LVDS@
CT12
10U_0603_6.3V6M
LVDS@
1 2
RT14 0_0402_5%
@
RT14 0_0402_5%
@
1
2
CT24 0.1U_0402_16V7K
@
CT24 0.1U_0402_16V7K
@
1
2
RT12 100K_0402_5% LVDS@RT12 100K_0402_5% LVDS@
1 2
CC98 .1U_0402_16V7K CC98 .1U_0402_16V7K
1
2
RT192
1K_0402_1%
LVDS@
RT192
1K_0402_1%
LVDS@
1
2
CT17
0.1U_0402_16V4Z
LVDS@
CT17
0.1U_0402_16V4Z
LVDS@
1 2
CT7
10U_0603_6.3V6M
LVDS@
CT7
10U_0603_6.3V6M
LVDS@
1 2
RT7 4.7K_0402_5%
LVDS@
RT7 4.7K_0402_5%
LVDS@
1
2
CT10
0.1U_0402_16V4Z
LVDS@
CT10
0.1U_0402_16V4Z
LVDS@
1 2
RTD2132S
LVDS
Power
DP-IN
LVDS EDID ROMGPIO
Other RTD2132N-CG QFN32
UT1
LVDS@
SA00007A300
RTD2132S
LVDS
Power
DP-IN
LVDS EDID ROMGPIO
Other RTD2132N-CG QFN32
UT1
LVDS@
SA00007A300
TXEC-
20
TXE0-
26
DP_V33
3
DP_V12
7
CIICSCL1
9
TXE1-
24
DP_REXT
8
GPIO(PW M OUT)
14
AUX_N
1
TXE2-
22
GPIO(BL_EN)
17
MI I CDA1
28
TXE2+
21
PVCC
18
AUX_P
2
MI I CSDA0
30
TXEC+
19
SW R_LX
12
TXE1+
23
TXE0+
25
MI I CSCL0
31
MI I CSCL1
29
SW R_VCCK
11
GPIO(Panel_VCC)
15
VCCK
27
LANE0P
5
CIICSDA1
10
GPIO(PW M IN)
16
LANE0N
6
GND
33
SW R_VDD
13
HPD
32
DP_GND
4
RT3 4.7K_0402_5%
LVDS@
RT3 4.7K_0402_5%
LVDS@
12
CT9
22U_0603_6.3V6M
LVDS@
CT9
22U_0603_6.3V6M
LVDS@
1 2
RT15 0_0402_5%
eDP@
RT15 0_0402_5%
eDP@
1
2
RT11 100K_0402_5% RT11 100K_0402_5%
1 2
RP60_0804_8P4R_5%
eDP@
SD309000080
RP60_0804_8P4R_5%
eDP@
SD309000080
1
8
2
7
3
6
4
5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
PIN15
2132S 2132R +LCD_VDD *
* Version R internal Power Switch, can output 1A, Rds(on)=0.2 ohm
TL_ENVDD
2132R
3.3V
1.5~3.3V
* Version R has internal level shifter, remove level shifter circuit on AMD platform
1. Support LDO mode and SWR mode 2. Internal ROM 3. Support LCD_VDD(internal Power switch) 4. Integrates Level shifter
Different between 2132S and 2132R
Ac c e p t v o lt a g e in p u t ( h ig h le v e l)
PIN16 2132S
2132S 2132R
1. Support SWR mode
40mil40mil 40mil40mil 40mil
100mil
80mil 40mil
PIN30 PIN31
LDO
Use 0 ohm
mount LT7
Do not support
2132N2132S
SWR
SWR / LDO Mode select
※※※※
If use 2132N, please select LDO mode as default.
mount LT7
80mil 80mil
<CPU>
<CONN>
<CONN>
〈〈〈〈
※※※※
Default mode
〉〉〉〉
※※※※
ROM only mode : PIN 30 4.7k pull low, Pin 31 4.7k
pull high.
EP mode : PIN 30 4.7k pull high, Pin 31 4.7k pull low. EEPROM : PIN 30 4.7k pull high, Pin 31 4.7k pull high.
<EC CTRL> <RTS2132>
<LVDS Panel>
<CPU CTRL>
<CPU>
PD 100K on LVDS page
JPHW3 need to short
2132S@
2132S@
<SI> LT7 change to 0 ohm short pad use LDO mode translator only
<eDP to connector>
2
4
<CPU by PASS eDP>
<LVDS to connector>
RTD2132 SMBus revrse to PCH
Delete BKL_PWM_CPU and DP_INT_PWM 20141113
DB phase : add eDP Lan1 for FHD 20141117
DB phase : add eDP Lan1 for FHD 20141117
Layout notes CC97~CC102 must closed to connector
L
L
Layout notes RT16~RT19 must closed to connector
L
Layout notes RP6 RP9 RP10 must closed to connector
L
Layout notes RT9 close to pin15 RT10 CT23 close to CONN +DP_ENVDD 80mil trace width
L
Layout notes RT8 close to pin8
Layout notes CT16~CT18 Close to Pin3
L
Layout notes Close to LT5 Pin18 Pin13
L
Layout notes Close to Pin11 Pin27 Pin7
L
LCD_EDID_DATA LCD_EDID_CLK
LCD_EDID_DATA
MIIC_SDA MIIC_SCL
BKL_PWM_CPU
EDP_CPU_AUX# EDP_CPU_AUX EDP_CPU_LANE_N0 EDP_CPU_LANE_P0
+SWR_VDD+DP_V33
+SWR_V12
+SWR_LX
+DP_ENVDD
MIIC_SDA
MIIC_SCL
+SWR_VDD
TS_BKOFF#
+DP_V33
+SWR_V12
EDP_CPU_AUX EDP_CPU_LANE_N0 EDP_CPU_LANE_P0 EDP_CPU_AUX#
DP_INT_PWM +DP_ENVDD
LVDS_TXN1 LVDS_TXP1 LVDS_TXN0 LVDS_TXP0
LCD_EDID_CLK
LVDS_CLKN LVDS_CLKP LVDS_TXN2 LVDS_TXP2
EDP_HPD
EDP_HPD
EDP_HPD_PANEL
EC_BKOFF#
LCD_DATA LVDS_TXN2_LN0 LVDS_TXP2_LP0 LCD_CLK
EDP_AUX# EDP_AUX
EDP_LANE_N0 EDP_LANE_P0
EDP_CPU_LANE_N0 EDP_CPU_LANE_P0
EDP_CPU_AUX EDP_CPU_AUX#
EDP_LANE_N0 EDP_LANE_P0
EDP_AUX#
EDP_AUX
TS_BKOFF#
LCD_EDID_DATA LCD_EDID_CLK
LCD_CLK
LCD_DATA
LVDS_TXP2_LP0 LVDS_TXN2_LN0
LVDS_TXP2 LVDS_TXN2
CIICSCL1 CIICSDA1
CIICSCL1 CIICSDA1
EDP_CPU_LANE_N1 EDP_CPU_LANE_P1
LVDS_TXN1_LN1 LVDS_TXP1_LP1
EDP_CPU_LANE_P1 EDP_CPU_LANE_N1
LVDS_TXP1 LVDS_TXN1
LVDS_TXN1_LN1 LVDS_TXP1_LP1
LVDS_CLKN <19>
DP_INT_PWM <19> +DP_ENVDD <19>
LVDS_CLKP <19>
EDP_CPU_LANE_P0_C
<4>
EDP_CPU_AUX#_C
<4>
EDP_CPU_AUX_C
<4>
BKL_PWM_CPU <19,8>
EDP_CPU_LANE_N0_C
<4>
EC_BKOFF#
<25>
EC_TS_BKOFF# <19>
EDP_HPD
<8>
EDP_HPD_PANEL <19>
LVDS_TXP0 <19> LVDS_TXN0 <19>
LCD_CLK <19> LCD_DATA <19> LVDS_TXN2_LN0 <19> LVDS_TXP2_LP0 <19>
EC_SMB_DA2
<21,25,36,7>
EC_SMB_CK2
<21,25,36,7>
PCH_SMBDATA
<15,16,21,6,7>
PCH_SMBCLK
<15,16,21,6,7>
+3VS
<12,15,16,19,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+LCDVDD
<19,34>
EDP_CPU_LANE_P1_C
<4>
EDP_CPU_LANE_N1_C
<4>
LVDS_TXP1_LP1 <19> LVDS_TXN1_LN1 <19>
+3VS_RT
+3VS_RT
+3VS_RT
+3VS
+3VS_RT
+LCDVDD
+3VS_RT
+3VS
+3VS +LCDVDD
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
18
0.1
LVDS Translator-RTD2132N
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
18
0.1
LVDS Translator-RTD2132N
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
18
0.1
LVDS Translator-RTD2132N
Saturday, January 31, 2015
RT193 0_0201_5% RT193 0_0201_5%
1
2
CC97 .1U_0402_16V7K CC97 .1U_0402_16V7K
1
2
RT10 100K_0402_5% LVDS@RT10 100K_0402_5% LVDS@
1 2
RT195 0_0201_5%
@
RT195 0_0201_5%
@
1
2
CT11
0.1U_0402_16V4Z
LVDS@
CT11
0.1U_0402_16V4Z
LVDS@
1 2
CT23
4.7U_0603_6.3V6K
LVDS@
CT23
4.7U_0603_6.3V6K
LVDS@
12
CT18
0.1U_0402_16V4Z
LVDS@
CT18
0.1U_0402_16V4Z
LVDS@
1 2
RT5
4.7K_0402_5% @
RT5
4.7K_0402_5% @
12
CT14
0.1U_0402_16V4Z
LVDS@
CT14
0.1U_0402_16V4Z
LVDS@
1 2
CC100 .1U_0402_16V7K
eDP@
CC100 .1U_0402_16V7K
eDP@1
2
UT3
TC7SH08FUF_SSOP5
LVDS@
UT3
TC7SH08FUF_SSOP5
LVDS@
B
1
A
2
Y
4
P
5
G
3
RT4
4.7K_0402_5%
LVDS@
RT4
4.7K_0402_5%
LVDS@
12
CT8
0.1U_0402_16V4Z
LVDS@
CT8
0.1U_0402_16V4Z
LVDS@
1 2
RT9 0_0805_5% LVDS@RT9 0_0805_5% LVDS@
1
2
CC103 .1U_0402_16V7K
eDP@
CC103 .1U_0402_16V7K
eDP@1
2
RT6 4.7K_0402_5%
LVDS@
RT6 4.7K_0402_5%
LVDS@
1
2
CT16
10U_0603_6.3V6M
LVDS@
CT16
10U_0603_6.3V6M
LVDS@
1 2
RT34 0_0201_5%
eDP@
RT34 0_0201_5%
eDP@
1
2
CC101 .1U_0402_16V7K CC101 .1U_0402_16V7K
1
2
LT5 FBMA-L11-201209-221LMA30T_0805
LVDS@
LT5 FBMA-L11-201209-221LMA30T_0805
LVDS@
1
2
JPHW3
JUMP_43X79
@
JPHW3
JUMP_43X79
@
1
1
2
2
RT16 0_0402_5%
eDP@
RT16 0_0402_5%
eDP@
1
2
RT196 0_0201_5%
@
RT196 0_0201_5%
@
1
2
RT194 0_0201_5% RT194 0_0201_5%
1
2
RT8
12K_0402_1%
LVDS@
RT8
12K_0402_1%
LVDS@
12
CT15
0.1U_0402_16V4Z
LVDS@
CT15
0.1U_0402_16V4Z
LVDS@
1 2
RT18 0_0402_5%
LVDS@
RT18 0_0402_5%
LVDS@
1
2
CT13
0.1U_0402_16V4Z
LVDS@
CT13
0.1U_0402_16V4Z
LVDS@
1 2
RP9 0_0804_8P4R_5%
eDP@
SD309000080
RP9 0_0804_8P4R_5%
eDP@
SD309000080
1
8
2
7
3
6
4
5
RP100_0804_8P4R_5%
LVDS@
SD309000080
RP100_0804_8P4R_5%
LVDS@
SD309000080
1
8
2
7
3
6
4
5
RT17 0_0402_5%
eDP@
RT17 0_0402_5%
eDP@
1
2
RT2 4.7K_0402_5%
@
RT2 4.7K_0402_5%
@
12
LT6 FBMA-L11-201209-221LMA30T_0805
LVDS@
LT6 FBMA-L11-201209-221LMA30T_0805
LVDS@
1
2
RT19 0_0402_5%
LVDS@
RT19 0_0402_5%
LVDS@
1
2
LT7 0_1206_5%
@
LT7 0_1206_5%
@
1
2
CC102 .1U_0402_16V7K CC102 .1U_0402_16V7K
1
2
CT12
10U_0603_6.3V6M
LVDS@
CT12
10U_0603_6.3V6M
LVDS@
1 2
RT14 0_0402_5%
@
RT14 0_0402_5%
@
1
2
CT24 0.1U_0402_16V7K
@
CT24 0.1U_0402_16V7K
@
1
2
RT12 100K_0402_5% LVDS@RT12 100K_0402_5% LVDS@
1 2
CC98 .1U_0402_16V7K CC98 .1U_0402_16V7K
1
2
RT192
1K_0402_1%
LVDS@
RT192
1K_0402_1%
LVDS@
1
2
CT17
0.1U_0402_16V4Z
LVDS@
CT17
0.1U_0402_16V4Z
LVDS@
1 2
CT7
10U_0603_6.3V6M
LVDS@
CT7
10U_0603_6.3V6M
LVDS@
1 2
RT7 4.7K_0402_5%
LVDS@
RT7 4.7K_0402_5%
LVDS@
1
2
CT10
0.1U_0402_16V4Z
LVDS@
CT10
0.1U_0402_16V4Z
LVDS@
1 2
RTD2132S
LVDS
Power
DP-IN
LVDS EDID ROMGPIO
Other RTD2132N-CG QFN32
UT1
LVDS@
SA00007A300
RTD2132S
LVDS
Power
DP-IN
LVDS EDID ROMGPIO
Other RTD2132N-CG QFN32
UT1
LVDS@
SA00007A300
TXEC-
20
TXE0-
26
DP_V33
3
DP_V12
7
CIICSCL1
9
TXE1-
24
DP_REXT
8
GPIO(PW M OUT)
14
AUX_N
1
TXE2-
22
GPIO(BL_EN)
17
MI I CDA1
28
TXE2+
21
PVCC
18
AUX_P
2
MI I CSDA0
30
TXEC+
19
SW R_LX
12
TXE1+
23
TXE0+
25
MI I CSCL0
31
MI I CSCL1
29
SW R_VCCK
11
GPIO(Panel_VCC)
15
VCCK
27
LANE0P
5
CIICSDA1
10
GPIO(PW M IN)
16
LANE0N
6
GND
33
SW R_VDD
13
HPD
32
DP_GND
4
RT3 4.7K_0402_5%
LVDS@
RT3 4.7K_0402_5%
LVDS@
12
CT9
22U_0603_6.3V6M
LVDS@
CT9
22U_0603_6.3V6M
LVDS@
1 2
RT15 0_0402_5%
eDP@
RT15 0_0402_5%
eDP@
1
2
RT11 100K_0402_5% RT11 100K_0402_5%
1 2
RP60_0804_8P4R_5%
eDP@
SD309000080
RP60_0804_8P4R_5%
eDP@
SD309000080
1
8
2
7
3
6
4
5
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LCD/LED PANEL Conn.
W=60mils
W=60mils
LA-C701P
Camera
EDP Power
<DB>LA1/LA2 closed to Aduio codec
Touch Screen
Touch Screen Power
Main SA000028Y10 2nd SA00006EE00
Touch screen
Camera
SI: Reserved 5V power for Touch.
PV:L1,L2 change to 0-ohm shortpad
INVTPWM DISPOFF#
DISPOFF#
INVTPWM
D_MIC_L_CLK D_MIC_L_DATA
USB20_P4_R
USB20_P4_R USB20_N4_R
EC_TS_BKOFF#
DISPOFF# INVTPWM
USB20_N4_R USB20_P4_R
D_MIC_L_CLK
D_MIC_CLK D_MIC_DATA
D_MIC_L_DATA
USB20_P5_R USB20_N5_R
USB20_P5_R USB20_N5_R
TS_GPIO
TS_GPIO_CPU
TS_GPIO
TS_GPIO_EC
USB20_P4_R USB20_N4_R
D_MIC_L_CLK D_MIC_L_DATA
USB20_N5_R USB20_N5_R USB20_P5_R
+TOUCH_VCC
EC_TS_BKOFF#
<18>
BKL_PWM_CPU
<18,8>
+DP_ENVDD
<18>
DP_INT_PWM
<18>
USB20_P4
<10>
USB20_N4
<10>
D_MIC_DATA
<23>
D_MIC_CLK
<23>
ENVDD_CPU
<8>
TS_GPIO_CPU
<9>
TS_GPIO_EC
<25>
TOUCH_ON# <25>
+3VS
<12,15,16,18,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
B+
<37,47,48,49,51,53,54>
+3VALW
<12,22,24,25,26,28,29,32,37,48,50,53,56,7>
LVDS_TXP0
<18>
LVDS_TXN0
<18>
LVDS_TXP1_LP1
<18>
LVDS_TXN1_LN1
<18>
LVDS_TXP2_LP0
<18>
LVDS_TXN2_LN0
<18>
LVDS_CLKN
<18>
LVDS_CLKP
<18>
LCD_DATA
<18>
LCD_CLK
<18>
EDP_HPD_PANEL
<18>
+LCDVDD
<18,34>
USB20_N5
<10>
USB20_P5
<10>
+5VS
<20,23,24,25,26,29,33,37,51,54>
+5VALW
<15,24,26,29,30,32,34,37,48,49,56>
INVPWR_B+
+19.5VB
+LCDVDD
+3VS
+3VALW
+VCC_TOUCH
+3VS
+3VS +19.5VB +3VALW
+LCDVDD
+3VS
+VCC_TOUCH
INVPWR_B+
+LCDVDD
+5VALW
+5VS +5VALW
+5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
19 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LVDS Connector
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
19 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LVDS Connector
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
19 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LVDS Connector
LA1 FBMA-L10-160808-301LMT_2P
EMI@
LA1 FBMA-L10-160808-301LMT_2P
EMI@
1
2
CG1
1500P_0402_50V7K
eDP@
CG1
1500P_0402_50V7K
eDP@
1 2
RTS4 0_0402_5%
eDP@
RTS4 0_0402_5%
eDP@
1
2
RTS5 0_0402_5%
@
RTS5 0_0402_5%
@
1
2
RTS3 100K_0402_5%
@
RTS3 100K_0402_5%
@
1 2
D7 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
D7 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
2 3
1
R260
0_0402_5%
@
R260
0_0402_5%
@
1
2
R258
0_0402_5%
LVDS@
R258
0_0402_5%
LVDS@
1
2
RG3 0_0402_5%
@
RG3 0_0402_5%
@
1
2
L1
0_0805_5%
short@
L1
0_0805_5%
short@
1
2
R261 0_0402_5%
short@
R261 0_0402_5%
short@
1
2
R5176 10K_0402_5% R5176 10K_0402_5%
1 2
RG1 0_0201_5%
@
RG1 0_0201_5%
@
1
2
R5175 0_0402_5% R5175 0_0402_5%
1
2
UG1
G5243AT11U SOT-23
eDP@
SA000028Y10
UG1
G5243AT11U SOT-23
eDP@
SA000028Y10
OUT
1
EN
3
IN
5
GND
2
SS
4
L2
0_0805_5%
short@
L2
0_0805_5%
short@
1
2
C594 220P_0402_50V7K C594 220P_0402_50V7K
1
2
L13 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
L13 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
R172 0_0402_5%
eDP@
R172 0_0402_5%
eDP@
1
2
C593 220P_0402_50V7K C593 220P_0402_50V7K
1
2
JLVDS1CONN@ STARC_107K40-000001-G2 SP01000XE00JLVDS1CONN@ STARC_107K40-000001-G2 SP01000XE00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
G1
41
G2
42
G3
43
G4
44
G5
45
G6
46
D
G
S
QTS2
S TR LP2301ALT1G 1P SOT-23-3
eDP@
D
G
S
QTS2
S TR LP2301ALT1G 1P SOT-23-3
eDP@
1
2
3
R171 0_0402_5% R171 0_0402_5%
1
2
R259
0_0402_5%
eDP@
R259
0_0402_5%
eDP@
1
2
CG2
4.7U_0603_6.3V6K
CG2
4.7U_0603_6.3V6K
1 2
CTS1 0.1U_0402_16V4Z eDP@ CTS1 0.1U_0402_16V4Z eDP@
1 2
C118 68P_0402_50V8J C118 68P_0402_50V8J
1 2
R170 0_0402_5% R170 0_0402_5%
1
2
RTS1 1K_0402_5%
eDP@
RTS1 1K_0402_5%
eDP@
1 2
CG3
0.1U_0402_16V7K
CG3
0.1U_0402_16V7K
1 2
R163 100K_0402_5%
LVDS@
R163 100K_0402_5%
LVDS@
1 2
RTS2 100K_0402_5%
eDP@
RTS2 100K_0402_5%
eDP@
1 2
R173
0_0402_5%
R173
0_0402_5%
1
2
R166 33_0402_5% R166 33_0402_5%
1
2
CTS2 0.047U_0402_16V7K
eDP@
CTS2 0.047U_0402_16V7K
eDP@
1
2
C117
680P_0402_50V7K
@EMI@
C117
680P_0402_50V7K
@EMI@
1 2
L12 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
L12 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
R175
0_0402_5%
short@ R175
0_0402_5%
short@
1
2
D3 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
D3 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
2 3
1
D6 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
D6 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
2 3
1
G
D S
QTS1
2N7002K_SOT23
eDP@
G
D S
QTS1
2N7002K_SOT23
eDP@
2
1 3
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LCD/LED PANEL Conn.
W=60mils
W=60mils
LA-C701P
Camera
EDP Power
<DB>LA1/LA2 closed to Aduio codec
Touch Screen
Touch Screen Power
Main SA000028Y10 2nd SA00006EE00
Touch screen
Camera
SI: Reserved 5V power for Touch.
PV:L1,L2 change to 0-ohm shortpad
INVTPWM DISPOFF#
DISPOFF#
INVTPWM
D_MIC_L_CLK D_MIC_L_DATA
USB20_P4_R
USB20_P4_R USB20_N4_R
EC_TS_BKOFF#
DISPOFF# INVTPWM
USB20_N4_R USB20_P4_R
D_MIC_L_CLK
D_MIC_CLK D_MIC_DATA
D_MIC_L_DATA
USB20_P5_R USB20_N5_R
USB20_P5_R USB20_N5_R
TS_GPIO
TS_GPIO_CPU
TS_GPIO
TS_GPIO_EC
USB20_P4_R USB20_N4_R
D_MIC_L_CLK D_MIC_L_DATA
USB20_N5_R USB20_N5_R USB20_P5_R
+TOUCH_VCC
EC_TS_BKOFF#
<18>
BKL_PWM_CPU
<18,8>
+DP_ENVDD
<18>
DP_INT_PWM
<18>
USB20_P4
<10>
USB20_N4
<10>
D_MIC_DATA
<23>
D_MIC_CLK
<23>
ENVDD_CPU
<8>
TS_GPIO_CPU
<9>
TS_GPIO_EC
<25>
TOUCH_ON# <25>
+3VS
<12,15,16,18,20,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
B+
<37,47,48,49,51,53,54>
+3VALW
<12,22,24,25,26,28,29,32,37,48,50,53,56,7>
LVDS_TXP0
<18>
LVDS_TXN0
<18>
LVDS_TXP1_LP1
<18>
LVDS_TXN1_LN1
<18>
LVDS_TXP2_LP0
<18>
LVDS_TXN2_LN0
<18>
LVDS_CLKN
<18>
LVDS_CLKP
<18>
LCD_DATA
<18>
LCD_CLK
<18>
EDP_HPD_PANEL
<18>
+LCDVDD
<18,34>
USB20_N5
<10>
USB20_P5
<10>
+5VS
<20,23,24,25,26,29,33,37,51,54>
+5VALW
<15,24,26,29,30,32,34,37,48,49,56>
INVPWR_B+
+19.5VB
+LCDVDD
+3VS
+3VALW
+VCC_TOUCH
+3VS
+3VS +19.5VB +3VALW
+LCDVDD
+3VS
+VCC_TOUCH
INVPWR_B+
+LCDVDD
+5VALW
+5VS +5VALW
+5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
19 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LVDS Connector
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
19 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LVDS Connector
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
19 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LVDS Connector
LA1 FBMA-L10-160808-301LMT_2P
EMI@
LA1 FBMA-L10-160808-301LMT_2P
EMI@
1
2
CG1
1500P_0402_50V7K
eDP@
CG1
1500P_0402_50V7K
eDP@
1 2
RTS4 0_0402_5%
eDP@
RTS4 0_0402_5%
eDP@
1
2
RTS5 0_0402_5%
@
RTS5 0_0402_5%
@
1
2
RTS3 100K_0402_5%
@
RTS3 100K_0402_5%
@
1 2
D7 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
D7 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
2 3
1
R260
0_0402_5%
@
R260
0_0402_5%
@
1
2
R258
0_0402_5%
LVDS@
R258
0_0402_5%
LVDS@
1
2
RG3 0_0402_5%
@
RG3 0_0402_5%
@
1
2
L1
0_0805_5%
short@
L1
0_0805_5%
short@
1
2
R261 0_0402_5%
short@
R261 0_0402_5%
short@
1
2
R5176 10K_0402_5% R5176 10K_0402_5%
1 2
RG1 0_0201_5%
@
RG1 0_0201_5%
@
1
2
R5175 0_0402_5% R5175 0_0402_5%
1
2
UG1
G5243AT11U SOT-23
eDP@
SA000028Y10
UG1
G5243AT11U SOT-23
eDP@
SA000028Y10
OUT
1
EN
3
IN
5
GND
2
SS
4
L2
0_0805_5%
short@
L2
0_0805_5%
short@
1
2
C594 220P_0402_50V7K C594 220P_0402_50V7K
1
2
L13 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
L13 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
R172 0_0402_5%
eDP@
R172 0_0402_5%
eDP@
1
2
C593 220P_0402_50V7K C593 220P_0402_50V7K
1
2
JLVDS1CONN@ STARC_107K40-000001-G2 SP01000XE00JLVDS1CONN@ STARC_107K40-000001-G2 SP01000XE00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
G1
41
G2
42
G3
43
G4
44
G5
45
G6
46
D
G
S
QTS2
S TR LP2301ALT1G 1P SOT-23-3
eDP@
D
G
S
QTS2
S TR LP2301ALT1G 1P SOT-23-3
eDP@
1
2
3
R171 0_0402_5% R171 0_0402_5%
1
2
R259
0_0402_5%
eDP@
R259
0_0402_5%
eDP@
1
2
CG2
4.7U_0603_6.3V6K
CG2
4.7U_0603_6.3V6K
1 2
CTS1 0.1U_0402_16V4Z eDP@ CTS1 0.1U_0402_16V4Z eDP@
1 2
C118 68P_0402_50V8J C118 68P_0402_50V8J
1 2
R170 0_0402_5% R170 0_0402_5%
1
2
RTS1 1K_0402_5%
eDP@
RTS1 1K_0402_5%
eDP@
1 2
CG3
0.1U_0402_16V7K
CG3
0.1U_0402_16V7K
1 2
R163 100K_0402_5%
LVDS@
R163 100K_0402_5%
LVDS@
1 2
RTS2 100K_0402_5%
eDP@
RTS2 100K_0402_5%
eDP@
1 2
R173
0_0402_5%
R173
0_0402_5%
1
2
R166 33_0402_5% R166 33_0402_5%
1
2
CTS2 0.047U_0402_16V7K
eDP@
CTS2 0.047U_0402_16V7K
eDP@
1
2
C117
680P_0402_50V7K
@EMI@
C117
680P_0402_50V7K
@EMI@
1 2
L12 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
L12 WCM-2012-900T_4P
@EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
R175
0_0402_5%
short@ R175
0_0402_5%
short@
1
2
D3 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
D3 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
2 3
1
D6 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
D6 PESD5V0U2BT_SOT23-3
@ESD@
SCA00000U10
2 3
1
G
D S
QTS1
2N7002K_SOT23
eDP@
G
D S
QTS1
2N7002K_SOT23
eDP@
2
1 3
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
5V Level
<CPU>
HDMI Conn.
SI : EMI request to modify HDMI schematic.
W=40mils
DB phase : For ESD request 20141117
Layout notes 40 mils
L
PCH_DDPB_DATPCH_DDPB_CLK
HDMI_SCLK
HDMI_SDATA
HP_DETECT
PCH_DPB_N3 PCH_DPB_P3PCH_DPB_P0 PCH_DPB_N0 PCH_DPB_N2 PCH_DPB_P2PCH_DPB_P1 PCH_DPB_N1
PCH_DPB_P3_CPCH_DPB_N1_C
PCH_DPB_P3_C
HDMI_R_CK+
PCH_DPB_N3_C
HDMI_R_CK-
HDMI_R_CK- HDMI_R_CK+ HDMI_R_D0+ HDMI_R_D0- HDMI_R_D1+ HDMI_R_D1- HDMI_R_D2- HDMI_R_D2+HDMI_SDATA HDMI_SCLK
HP_DETECT
PCH_DPB_N3_CPCH_DPB_N0_C PCH_DPB_P1_C
HDMI_SDATA HDMI_SCLK
HDMI_SCLKHP_DETECT HDMI_SDATA
HDMI_SCLKHP_DETECT HDMI_SDATA
PCH_DPB_N2_C PCH_DPB_P2_CPCH_DPB_P0_C
PCH_DDPB_DAT PCH_DDPB_CLK
HDMI_R_CK+ HDMI_R_CK-
HDMI_R_CK+ HDMI_R_CK-
HDMI_R_D0-
PCH_DPB_N0_C
HDMI_R_D0+
PCH_DPB_P0_C
HDMI_R_D1-
PCH_DPB_N1_C
HDMI_R_D1+
PCH_DPB_P1_C
HDMI_R_D2+ HDMI_R_D2-
PCH_DPB_P2_C
PCH_DPB_N2_C
HDMI_R_D0-
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2-
HDMI_R_D2+
HDMI_R_D2+
PCH_DDPB_CLK
<8>
PCH_DDPB_DAT
<8>
PCH_DDPB_HPD
<8>
PCH_DPB_P3
<4>
PCH_DPB_N3
<4>
PCH_DPB_P0
<4>
PCH_DPB_N0
<4>
PCH_DPB_P2
<4>
PCH_DPB_N2
<4>
PCH_DPB_P1
<4>
PCH_DPB_N1
<4>
+HDMI_CRT_5V
<21>
+3VS
<12,15,16,18,19,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+5VS
<19,23,24,25,26,29,33,37,51,54>
+HDMI_CRT_5V
+5VS
+3VS
+3VS
+3VS
+3VS
+HDMI_CRT_5V
+HDMI_CRT_5V
+3VS
+HDMI_CRT_5V +3VS +5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
20 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
HDMI Conn/Level shift
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
20 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
HDMI Conn/Level shift
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
20 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
HDMI Conn/Level shift
JHDMI ACON_HMRBL-AK120DCONN@ DC232004700JHDMI ACON_HMRBL-AK120DCONN@ DC232004700
D2+
1
D2_shield
2
D2-
3
D1+
4
D1_shield
5
D1-
6
D0+
7
D0_shield
8
D0-
9
CK+
10
CK_shield
11
CK-
12
CEC
13
Utility
14
SCL
15
SDA
16
DDC/CEC_GND
17
+5V
18
HP_DET
19
GND1
23
GND2
22
GND3
21
GND4
20
AP2330W-7_SC59-3FG1 AP2330W-7_SC59-3FG1
GND
2
OUT
3
IN
1
CG27
0.1U_0402_16V7K
CG27
0.1U_0402_16V7K
1
2
RG64 12_0402_5% RG64 12_0402_5%
1
2
RG105
2.2K_0804_8P4R_5%
RG105
2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
CG32
0.1U_0402_16V7K
CG32
0.1U_0402_16V7K
1
2
CM27
10P_0402_50V8J
@
CM27
10P_0402_50V8J
@
1 2
RG66 12_0402_5% RG66 12_0402_5%
1
2
RG60 12_0402_5% RG60 12_0402_5%
1
2
QG2A
2N7002DW H_SOT363-6
SB00000DH00
QG2A
2N7002DW H_SOT363-6
SB00000DH00
6
1
2
RP4 470_0804_8P4R_5% RP4 470_0804_8P4R_5%
18
27
36
45
RG56
20K_0402_5%
RG56
20K_0402_5%
1 2
RG61 12_0402_5% RG61 12_0402_5%
1
2
RG63 12_0402_5% RG63 12_0402_5%
1
2
CG33
0.1U_0402_16V7K
CG33
0.1U_0402_16V7K
1
2
RG47
1M_0402_5%
RG47
1M_0402_5%
1 2
CG28
0.1U_0402_16V7K
CG28
0.1U_0402_16V7K
1
2
CG34
0.1U_0402_16V7K
CG34
0.1U_0402_16V7K
1
2
RG65 12_0402_5% RG65 12_0402_5%
1
2
RG59 12_0402_5% RG59 12_0402_5%
1
2
CG46
0.1U_0402_16V7K
CG46
0.1U_0402_16V7K
1 2
CM17
220P_0402_50V7K
@
CM17
220P_0402_50V7K
@
1 2
QG1A 2N7002KDW _SOT363-6 QG1A 2N7002KDW _SOT363-6
6
1
2
CG31
0.1U_0402_16V7K
CG31
0.1U_0402_16V7K
1
2
CM26
10P_0402_50V8J
@
CM26
10P_0402_50V8J
@
1 2
RG72 150_0402_5%
@
RG72 150_0402_5%
@
12
CG30
0.1U_0402_16V7K
CG30
0.1U_0402_16V7K
1
2
QG1B
2N7002KDW _SOT363-6
QG1B
2N7002KDW _SOT363-6 3
5
4
CG29
0.1U_0402_16V7K
CG29
0.1U_0402_16V7K
1
2
QG2B
2N7002DW H_SOT363-6
SB00000DH00QG2B
2N7002DW H_SOT363-6
SB00000DH00
3
4
5
RG73 150_0402_5%
@
RG73 150_0402_5%
@
12
RG71 150_0402_5%
@
RG71 150_0402_5%
@
12
8
7 6
54 321
9 10
DG1
IP4292CZ10-TB
SC300002800
@ESD@
8
7 6
54 321
9 10
DG1
IP4292CZ10-TB
SC300002800
@ESD@
4 51
6
2
7
3
9 8
RG70 12_0402_5% RG70 12_0402_5%
1
2
8
7 6
54 321
9 10
D21 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C008
7 6
54 321
9 10
D21 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C00
4 51
6
2
7
3
9 8
RG74 150_0402_5%
@
RG74 150_0402_5%
@
12
8
7 6
54 321
9 10
D22 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C008
7 6
54 321
9 10
D22 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C00
4 51
6
2
7
3
9 8
RP3 470_0804_8P4R_5% RP3 470_0804_8P4R_5%
18
27
36
45
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
5V Level
<CPU>
HDMI Conn.
SI : EMI request to modify HDMI schematic.
W=40mils
DB phase : For ESD request 20141117
Layout notes 40 mils
L
PCH_DDPB_DATPCH_DDPB_CLK
HDMI_SCLK
HDMI_SDATA
HP_DETECT
PCH_DPB_N3 PCH_DPB_P3PCH_DPB_P0 PCH_DPB_N0 PCH_DPB_N2 PCH_DPB_P2PCH_DPB_P1 PCH_DPB_N1
PCH_DPB_P3_CPCH_DPB_N1_C
PCH_DPB_P3_C
HDMI_R_CK+
PCH_DPB_N3_C
HDMI_R_CK-
HDMI_R_CK- HDMI_R_CK+ HDMI_R_D0+ HDMI_R_D0- HDMI_R_D1+ HDMI_R_D1- HDMI_R_D2- HDMI_R_D2+HDMI_SDATA HDMI_SCLK
HP_DETECT
PCH_DPB_N3_CPCH_DPB_N0_C PCH_DPB_P1_C
HDMI_SDATA HDMI_SCLK
HDMI_SCLKHP_DETECT HDMI_SDATA
HDMI_SCLKHP_DETECT HDMI_SDATA
PCH_DPB_N2_C PCH_DPB_P2_CPCH_DPB_P0_C
PCH_DDPB_DAT PCH_DDPB_CLK
HDMI_R_CK+ HDMI_R_CK-
HDMI_R_CK+ HDMI_R_CK-
HDMI_R_D0-
PCH_DPB_N0_C
HDMI_R_D0+
PCH_DPB_P0_C
HDMI_R_D1-
PCH_DPB_N1_C
HDMI_R_D1+
PCH_DPB_P1_C
HDMI_R_D2+ HDMI_R_D2-
PCH_DPB_P2_C
PCH_DPB_N2_C
HDMI_R_D0-
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2-
HDMI_R_D2+
HDMI_R_D2+
PCH_DDPB_CLK
<8>
PCH_DDPB_DAT
<8>
PCH_DDPB_HPD
<8>
PCH_DPB_P3
<4>
PCH_DPB_N3
<4>
PCH_DPB_P0
<4>
PCH_DPB_N0
<4>
PCH_DPB_P2
<4>
PCH_DPB_N2
<4>
PCH_DPB_P1
<4>
PCH_DPB_N1
<4>
+HDMI_CRT_5V
<21>
+3VS
<12,15,16,18,19,21,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+5VS
<19,23,24,25,26,29,33,37,51,54>
+HDMI_CRT_5V
+5VS
+3VS
+3VS
+3VS
+3VS
+HDMI_CRT_5V
+HDMI_CRT_5V
+3VS
+HDMI_CRT_5V +3VS +5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
20 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
HDMI Conn/Level shift
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
20 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
HDMI Conn/Level shift
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
20 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
HDMI Conn/Level shift
JHDMI ACON_HMRBL-AK120DCONN@ DC232004700JHDMI ACON_HMRBL-AK120DCONN@ DC232004700
D2+
1
D2_shield
2
D2-
3
D1+
4
D1_shield
5
D1-
6
D0+
7
D0_shield
8
D0-
9
CK+
10
CK_shield
11
CK-
12
CEC
13
Utility
14
SCL
15
SDA
16
DDC/CEC_GND
17
+5V
18
HP_DET
19
GND1
23
GND2
22
GND3
21
GND4
20
AP2330W-7_SC59-3FG1 AP2330W-7_SC59-3FG1
GND
2
OUT
3
IN
1
CG27
0.1U_0402_16V7K
CG27
0.1U_0402_16V7K
1
2
RG64 12_0402_5% RG64 12_0402_5%
1
2
RG105
2.2K_0804_8P4R_5%
RG105
2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
CG32
0.1U_0402_16V7K
CG32
0.1U_0402_16V7K
1
2
CM27
10P_0402_50V8J
@
CM27
10P_0402_50V8J
@
1 2
RG66 12_0402_5% RG66 12_0402_5%
1
2
RG60 12_0402_5% RG60 12_0402_5%
1
2
QG2A
2N7002DW H_SOT363-6
SB00000DH00
QG2A
2N7002DW H_SOT363-6
SB00000DH00
6
1
2
RP4 470_0804_8P4R_5% RP4 470_0804_8P4R_5%
18
27
36
45
RG56
20K_0402_5%
RG56
20K_0402_5%
1 2
RG61 12_0402_5% RG61 12_0402_5%
1
2
RG63 12_0402_5% RG63 12_0402_5%
1
2
CG33
0.1U_0402_16V7K
CG33
0.1U_0402_16V7K
1
2
RG47
1M_0402_5%
RG47
1M_0402_5%
1 2
CG28
0.1U_0402_16V7K
CG28
0.1U_0402_16V7K
1
2
CG34
0.1U_0402_16V7K
CG34
0.1U_0402_16V7K
1
2
RG65 12_0402_5% RG65 12_0402_5%
1
2
RG59 12_0402_5% RG59 12_0402_5%
1
2
CG46
0.1U_0402_16V7K
CG46
0.1U_0402_16V7K
1 2
CM17
220P_0402_50V7K
@
CM17
220P_0402_50V7K
@
1 2
QG1A 2N7002KDW _SOT363-6 QG1A 2N7002KDW _SOT363-6
6
1
2
CG31
0.1U_0402_16V7K
CG31
0.1U_0402_16V7K
1
2
CM26
10P_0402_50V8J
@
CM26
10P_0402_50V8J
@
1 2
RG72 150_0402_5%
@
RG72 150_0402_5%
@
12
CG30
0.1U_0402_16V7K
CG30
0.1U_0402_16V7K
1
2
QG1B
2N7002KDW _SOT363-6
QG1B
2N7002KDW _SOT363-6 3
5
4
CG29
0.1U_0402_16V7K
CG29
0.1U_0402_16V7K
1
2
QG2B
2N7002DW H_SOT363-6
SB00000DH00QG2B
2N7002DW H_SOT363-6
SB00000DH00
3
4
5
RG73 150_0402_5%
@
RG73 150_0402_5%
@
12
RG71 150_0402_5%
@
RG71 150_0402_5%
@
12
8
7 6
54 321
9 10
DG1
IP4292CZ10-TB
SC300002800
@ESD@
8
7 6
54 321
9 10
DG1
IP4292CZ10-TB
SC300002800
@ESD@
4 51
6
2
7
3
9 8
RG70 12_0402_5% RG70 12_0402_5%
1
2
8
7 6
54 321
9 10
D21 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C008
7 6
54 321
9 10
D21 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C00
4 51
6
2
7
3
9 8
RG74 150_0402_5%
@
RG74 150_0402_5%
@
12
8
7 6
54 321
9 10
D22 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C008
7 6
54 321
9 10
D22 L05ESDL5V0NA-4_SLP2510P8-10-9
@ESD@
SC300002C00
4 51
6
2
7
3
9 8
RP3 470_0804_8P4R_5% RP3 470_0804_8P4R_5%
18
27
36
45
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
W=10mils
CRT Connector
50 impedance
|
←
→
|
DP to CRT converter
For Power consumption Measurement
PV : Remove Buffer. 2015-01-27
2014-11-24 follow vendor suggest change 36 ohm
Layout notes R61,R62,R58,R59 close to RT D2168 R55,R57,R60,R56 close to CONN
L
SI
：
Change BOM con/ig
PV:R34 change to 0-ohm shortpad
PV:R38 change pow er for SVT P 3-9.
PV:Change L7,L8,L9 value and footprint.
VGA_RE
CRT_HSYNC_2
CRT_HSYNC_2 CRT_VSYNC_2
VGA_RE
VGA_GR VGA_BL
CRT_VSYNC_2 CRT_HSYNC_2 CRT_DATA CRT_CLK
VGA_RED VGA_GRN VGA_BLU
VGA_BL
VGA_GR
CRT_DATA
CRT_VSYNC_2
CRT_CLK
LDO_E N_1V 2
XTALOUT_2168
XTALIN_2168
PCH_DPC_P0_C PCH_DPC_N0_C PCH_DPC_N1_C PCH_DPC_P1_C
+VCCK_1V2
XTALOUT_2168
DDI2_AUX_DP_C DDI2_AUX_DN_C
VSYNCHSYNCCRT_CLK CRT_DATA
XTALIN_2168POL1_SCL POL1_SDA
VGA_BLUVGA_GRNVGA_RED
LDO_E N_1V 2
RTD2168_SMB_SDA RTD2168_SMB_SCL
+VCCK_1V2
POL1_SDA
POL1_SCL
RTD2168_SMB_SCL RTD2168_SMB_SDA
HSYNC
+3VS_CRT_DVDD
VSYNC
DDI2_HPD
<8>
PCH_DPC_P0
<4>
PCH_DPC_N0
<4>
PCH_DPC_P1
<4>
PCH_DPC_N1
<4>
DDI2_AUX_DP
<8>
DDI2_AUX_DN
<8>
+5VS
<19,20,23,24,25,26,29,33,37,51,54>
+3VS
<12,15,16,18,19,20,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+HDMI_CRT_5V
<20>
EC_SMB_CK2 <18,25,36,7> EC_SMB_DA2 <18,25,36,7> PCH_SMBDATA <15,16,18,6,7> PCH_SMBCLK <15,16,18,6,7>
+HDMI_CRT_5V
+HDMI_CRT_5V
+HDMI_CRT_5V
+5VS +3VS +HDMI_CRT_5V
+3VS_CRT
+HDMI_CRT_5V
+3VS_CRT
+3VS
+3VS
+3VS_CRT_DVDD
+3VS_CRT
+3VS_CRT
+3VS_CRT
+3VS_CRT
+3VS_CRT_DVDD
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Com pal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y P R O P E R T Y O F C O MP A L E L E C T R O NI C S , I NC . A ND C O NT A I NS
C ONF I D E NT I A L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
T R A NS F E R E D F R OM T HE C US T OD Y OF T HE C OMP E T E NT D I V I S
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E US E D B Y O R D I S C L O S E D T O A NY T HI R D P A R T Y W I T H
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Custom
0.1
DP to CRT RTD2168
Compal Electronics, Inc.
LA-C701P
2014/02/18
2015/02/20
21 61
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Com pal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y P R O P E R T Y O F C O MP A L E L E C T R O NI C S , I NC . A ND C O NT A I NS
C ONF I D E NT I A L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
T R A NS F E R E D F R OM T HE C US T OD Y OF T HE C OMP E T E NT D I V I S
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E US E D B Y O R D I S C L O S E D T O A NY T HI R D P A R T Y W I T H
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Custom
0.1
DP to CRT RTD2168
Compal Electronics, Inc.
LA-C701P
2014/02/18
2015/02/20
21 61
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Com pal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y P R O P E R T Y O F C O MP A L E L E C T R O NI C S , I NC . A ND C O NT A I NS
C ONF I D E NT I A L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
T R A NS F E R E D F R OM T HE C US T OD Y OF T HE C OMP E T E NT D I V I S
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E US E D B Y O R D I S C L O S E D T O A NY T HI R D P A R T Y W I T H
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Custom
0.1
DP to CRT RTD2168
Compal Electronics, Inc.
LA-C701P
2014/02/18
2015/02/20
21 61
Saturday, January 31, 2015
C63 0. 1U_0402_16V 4Z
CRT@
C63 0. 1U_0402_16V 4Z
CRT@ 1 2
C40
10U_0603_6. 3V 6M
@
C40
10U_0603_6. 3V 6M
@
1 2
Crystal
X1
27MHZ_10P F_X 3G027000B A 1H-U
@
Crystal
X1
27MHZ_10P F_X 3G027000B A 1H-U
@
IN
1
OUT
3
GND
2
GND
4
R50 75_0402_1%
CRT@
R50 75_0402_1%
CRT@1 2
D5 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
D5 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
C69
3. 3P _0402_50V _C
EMICRT@
C69
3. 3P _0402_50V _C
EMICRT@
1 2
C47
0. 1U_0402_16V 4Z
CRT@ C47
0. 1U_0402_16V 4Z
CRT@
1 2
R35
100K _0402_5%
CRT@
R35
100K _0402_5%
CRT@
1 2
L8
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
L8
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
1
2
R39 0_0402_5%
@
R39 0_0402_5%
@
1
2
C67
3. 3P _0402_50V _C
EMICRT@
C67
3. 3P _0402_50V _C
EMICRT@
1 2
R47 1M_0402_5%
@
R47 1M_0402_5%
@
C60
0. 1U_0402_16V 4Z
CRT@C60
0. 1U_0402_16V 4Z
CRT@
1 2
C48
10U_0603_6. 3V 6M
CRT@ C48
10U_0603_6. 3V 6M
CRT@
1 2
L9
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
L9
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
1
2
R40 0_0402_5%
@
R40 0_0402_5%
@
1
2
C45
0. 1U_0402_16V 4Z
CRT@ C45
0. 1U_0402_16V 4Z
CRT@
1 2
C49 0.1U_0402_16V7K
CRT@
C49 0.1U_0402_16V7K
CRT@
1
2
C42
1U_0402_6. 3V 6K
CRT@
C42
1U_0402_6. 3V 6K
CRT@
1 2
L7
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
L7
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
1
2
C50 0.1U_0402_16V7K
CRT@
C50 0.1U_0402_16V7K
CRT@
1
2
C53 0.1U_0402_16V7K
CRT@
C53 0.1U_0402_16V7K
CRT@
1
2
R43 4.7K _0402_5% CRT@ R43 4.7K _0402_5% CRT@
1 2
C70
3. 3P _0402_50V _C
EMICRT@
C70
3. 3P _0402_50V _C
EMICRT@
1 2
C65
18P _0402_50V 8J
@C65
18P _0402_50V 8J
@
1 2
L6 36_0402_1%
CRT@
L6 36_0402_1%
CRT@
1
2
C66
3. 3P _0402_50V _C
EMICRT@
C66
3. 3P _0402_50V _C
EMICRT@
1 2
R53 0_0402_5%
CRT@
R53 0_0402_5%
CRT@
1
2
R51 75_0402_1%
CRT@
R51 75_0402_1%
CRT@1 2
L5 36_0402_1%
CRT@
L5 36_0402_1%
CRT@
1
2
R44
12K _0402_1%
CRT@
R44
12K _0402_1%
CRT@
1 2
R49 75_0402_1%
CRT@
R49 75_0402_1%
CRT@1 2
R38
2.2K _0804_8P 4R_5%
CRT@
R38
2.2K _0804_8P 4R_5%
CRT@
1 8
2 7
3 6
4 5
R46 4.7K _0402_5%
@
R46 4.7K _0402_5%
@
1 2
R34 0_0603_5%
short@
R34 0_0603_5%
short@
1
2
C46
0. 1U_0402_16V 4Z
CRT@ C46
0. 1U_0402_16V 4Z
CRT@
1 2
R42 4.7K _0402_5%
@
R42 4.7K _0402_5%
@
1 2
R54 0_0402_5%
CRT@
R54 0_0402_5%
CRT@
1
2
C57 10P _0402_50V 8J CRT@ C57 10P _0402_50V 8J CRT@
1 2
C41
0. 1U_0402_16V 4Z
CRT@ C41
0. 1U_0402_16V 4Z
CRT@
1 2
C56
10P _0402_50V 8J
CRT@
C56
10P _0402_50V 8J
CRT@
1 2
C72
0. 1U_0201_10V 6K
@
C72
0. 1U_0201_10V 6K
@
1 2
GG
JCRT1 C-K_80454-5K1-152CONN@ DC060004S10
GG
JCRT1 C-K_80454-5K1-152CONN@ DC060004S10
6
11
17
12
28
13
39
14
4
10 15
5
16 17
C61
10U_0603_6. 3V 6M
CRT@
C61
10U_0603_6. 3V 6M
CRT@
1 2
C58 2. 2U_0402_6. 3V 6MCRT@C58 2. 2U_0402_6. 3V 6MCRT@
1 2
C51 0.1U_0402_16V7K
CRT@
C51 0.1U_0402_16V7K
CRT@
1
2
R45 4.7K _0402_5% CRT@ R45 4.7K _0402_5% CRT@
1 2
R52 4.7K _0402_5% @R52 4.7K _0402_5% @
1 2
C52 0.1U_0402_16V7K
CRT@
C52 0.1U_0402_16V7K
CRT@
1
2
U4104
RTD2168-CG_QFN32_5X5
CRT@
U4104
RTD2168-CG_QFN32_5X5
CRT@
LANE1N
32
HPD
1
SMB_SCL
2
SMB_SDA
3
VGA_SCL
4
DVCC_ 3 3
5
VGA_SDA
6
VSYNC
7
HSYNC
8
VDD_DAC_33
9
BLUE_P
10
BLUE_N
11
GREEN_N
13
GND_DAC
14
RED_P
15
RED_N
16
XO
18
DVCC_ 3 3
20
VCCK_12
19
LANE1P
31
LANE0N
30
LANE0P
29
RRX
28
XI/CKIN
17
AUX_N
27
AUX_P
26
AVCC_12
25
AVCC_33
24
POL2_SCL
23
POL1_SDA
22
LDO_EN
21
GREEN_P
12
EPAD_GND
33
D4 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
D4 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
C43 0.1U_0402_25V 6 CRT@ C43 0.1U_0402_25V 6 CRT@
1 2
C68
3. 3P _0402_50V _C
EMICRT@
C68
3. 3P _0402_50V _C
EMICRT@
1 2
C54 0.1U_0402_16V7K
CRT@
C54 0.1U_0402_16V7K
CRT@
1
2
C71
3. 3P _0402_50V _C
EMICRT@
C71
3. 3P _0402_50V _C
EMICRT@
1 2
C64
18P _0402_50V 8J
@C64
18P _0402_50V 8J
@
1 2
R48 4.7K _0402_5% CRT@R48 4.7K _0402_5% CRT@
1 2
JPHW2 JUMP_43X39 JP@JPHW2 JUMP_43X39 JP@
1
1
2
2
C59 0. 1U_0402_16V 4ZCRT@C59 0. 1U_0402_16V 4ZCRT@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
W=10mils
CRT Connector
50 impedance
|
←
→
|
DP to CRT converter
For Power consumption Measurement
PV : Remove Buffer. 2015-01-27
2014-11-24 follow vendor suggest change 36 ohm
Layout notes R61,R62,R58,R59 close to RT D2168 R55,R57,R60,R56 close to CONN
L
SI
：
Change BOM con/ig
PV:R34 change to 0-ohm shortpad
PV:R38 change pow er for SVT P 3-9.
PV:Change L7,L8,L9 value and footprint.
VGA_RE
CRT_HSYNC_2
CRT_HSYNC_2 CRT_VSYNC_2
VGA_RE
VGA_GR VGA_BL
CRT_VSYNC_2 CRT_HSYNC_2 CRT_DATA CRT_CLK
VGA_RED VGA_GRN VGA_BLU
VGA_BL
VGA_GR
CRT_DATA
CRT_VSYNC_2
CRT_CLK
LDO_E N_1V 2
XTALOUT_2168
XTALIN_2168
PCH_DPC_P0_C PCH_DPC_N0_C PCH_DPC_N1_C PCH_DPC_P1_C
+VCCK_1V2
XTALOUT_2168
DDI2_AUX_DP_C DDI2_AUX_DN_C
VSYNCHSYNCCRT_CLK CRT_DATA
XTALIN_2168POL1_SCL POL1_SDA
VGA_BLUVGA_GRNVGA_RED
LDO_E N_1V 2
RTD2168_SMB_SDA RTD2168_SMB_SCL
+VCCK_1V2
POL1_SDA
POL1_SCL
RTD2168_SMB_SCL RTD2168_SMB_SDA
HSYNC
+3VS_CRT_DVDD
VSYNC
DDI2_HPD
<8>
PCH_DPC_P0
<4>
PCH_DPC_N0
<4>
PCH_DPC_P1
<4>
PCH_DPC_N1
<4>
DDI2_AUX_DP
<8>
DDI2_AUX_DN
<8>
+5VS
<19,20,23,24,25,26,29,33,37,51,54>
+3VS
<12,15,16,18,19,20,22,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+HDMI_CRT_5V
<20>
EC_SMB_CK2 <18,25,36,7> EC_SMB_DA2 <18,25,36,7> PCH_SMBDATA <15,16,18,6,7> PCH_SMBCLK <15,16,18,6,7>
+HDMI_CRT_5V
+HDMI_CRT_5V
+HDMI_CRT_5V
+5VS +3VS +HDMI_CRT_5V
+3VS_CRT
+HDMI_CRT_5V
+3VS_CRT
+3VS
+3VS
+3VS_CRT_DVDD
+3VS_CRT
+3VS_CRT
+3VS_CRT
+3VS_CRT
+3VS_CRT_DVDD
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Com pal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y P R O P E R T Y O F C O MP A L E L E C T R O NI C S , I NC . A ND C O NT A I NS
C ONF I D E NT I A L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
T R A NS F E R E D F R OM T HE C US T OD Y OF T HE C OMP E T E NT D I V I S
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E US E D B Y O R D I S C L O S E D T O A NY T HI R D P A R T Y W I T H
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Custom
0.1
DP to CRT RTD2168
Compal Electronics, Inc.
LA-C701P
2014/02/18
2015/02/20
21 61
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Com pal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y P R O P E R T Y O F C O MP A L E L E C T R O NI C S , I NC . A ND C O NT A I NS
C ONF I D E NT I A L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
T R A NS F E R E D F R OM T HE C US T OD Y OF T HE C OMP E T E NT D I V I S
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E US E D B Y O R D I S C L O S E D T O A NY T HI R D P A R T Y W I T H
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Custom
0.1
DP to CRT RTD2168
Compal Electronics, Inc.
LA-C701P
2014/02/18
2015/02/20
21 61
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Com pal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y P R O P E R T Y O F C O MP A L E L E C T R O NI C S , I NC . A ND C O NT A I NS
C ONF I D E NT I A L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
T R A NS F E R E D F R OM T HE C US T OD Y OF T HE C OMP E T E NT D I V I S
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E US E D B Y O R D I S C L O S E D T O A NY T HI R D P A R T Y W I T H
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Custom
0.1
DP to CRT RTD2168
Compal Electronics, Inc.
LA-C701P
2014/02/18
2015/02/20
21 61
Saturday, January 31, 2015
C63 0. 1U_0402_16V 4Z
CRT@
C63 0. 1U_0402_16V 4Z
CRT@ 1 2
C40
10U_0603_6. 3V 6M
@
C40
10U_0603_6. 3V 6M
@
1 2
Crystal
X1
27MHZ_10P F_X 3G027000B A 1H-U
@
Crystal
X1
27MHZ_10P F_X 3G027000B A 1H-U
@
IN
1
OUT
3
GND
2
GND
4
R50 75_0402_1%
CRT@
R50 75_0402_1%
CRT@1 2
D5 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
D5 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
C69
3. 3P _0402_50V _C
EMICRT@
C69
3. 3P _0402_50V _C
EMICRT@
1 2
C47
0. 1U_0402_16V 4Z
CRT@ C47
0. 1U_0402_16V 4Z
CRT@
1 2
R35
100K _0402_5%
CRT@
R35
100K _0402_5%
CRT@
1 2
L8
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
L8
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
1
2
R39 0_0402_5%
@
R39 0_0402_5%
@
1
2
C67
3. 3P _0402_50V _C
EMICRT@
C67
3. 3P _0402_50V _C
EMICRT@
1 2
R47 1M_0402_5%
@
R47 1M_0402_5%
@
C60
0. 1U_0402_16V 4Z
CRT@C60
0. 1U_0402_16V 4Z
CRT@
1 2
C48
10U_0603_6. 3V 6M
CRT@ C48
10U_0603_6. 3V 6M
CRT@
1 2
L9
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
L9
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
1
2
R40 0_0402_5%
@
R40 0_0402_5%
@
1
2
C45
0. 1U_0402_16V 4Z
CRT@ C45
0. 1U_0402_16V 4Z
CRT@
1 2
C49 0.1U_0402_16V7K
CRT@
C49 0.1U_0402_16V7K
CRT@
1
2
C42
1U_0402_6. 3V 6K
CRT@
C42
1U_0402_6. 3V 6K
CRT@
1 2
L7
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
L7
BLM15BA220SN1D_0402
EMICRT@
SM01000LM00
1
2
C50 0.1U_0402_16V7K
CRT@
C50 0.1U_0402_16V7K
CRT@
1
2
C53 0.1U_0402_16V7K
CRT@
C53 0.1U_0402_16V7K
CRT@
1
2
R43 4.7K _0402_5% CRT@ R43 4.7K _0402_5% CRT@
1 2
C70
3. 3P _0402_50V _C
EMICRT@
C70
3. 3P _0402_50V _C
EMICRT@
1 2
C65
18P _0402_50V 8J
@C65
18P _0402_50V 8J
@
1 2
L6 36_0402_1%
CRT@
L6 36_0402_1%
CRT@
1
2
C66
3. 3P _0402_50V _C
EMICRT@
C66
3. 3P _0402_50V _C
EMICRT@
1 2
R53 0_0402_5%
CRT@
R53 0_0402_5%
CRT@
1
2
R51 75_0402_1%
CRT@
R51 75_0402_1%
CRT@1 2
L5 36_0402_1%
CRT@
L5 36_0402_1%
CRT@
1
2
R44
12K _0402_1%
CRT@
R44
12K _0402_1%
CRT@
1 2
R49 75_0402_1%
CRT@
R49 75_0402_1%
CRT@1 2
R38
2.2K _0804_8P 4R_5%
CRT@
R38
2.2K _0804_8P 4R_5%
CRT@
1 8
2 7
3 6
4 5
R46 4.7K _0402_5%
@
R46 4.7K _0402_5%
@
1 2
R34 0_0603_5%
short@
R34 0_0603_5%
short@
1
2
C46
0. 1U_0402_16V 4Z
CRT@ C46
0. 1U_0402_16V 4Z
CRT@
1 2
R42 4.7K _0402_5%
@
R42 4.7K _0402_5%
@
1 2
R54 0_0402_5%
CRT@
R54 0_0402_5%
CRT@
1
2
C57 10P _0402_50V 8J CRT@ C57 10P _0402_50V 8J CRT@
1 2
C41
0. 1U_0402_16V 4Z
CRT@ C41
0. 1U_0402_16V 4Z
CRT@
1 2
C56
10P _0402_50V 8J
CRT@
C56
10P _0402_50V 8J
CRT@
1 2
C72
0. 1U_0201_10V 6K
@
C72
0. 1U_0201_10V 6K
@
1 2
GG
JCRT1 C-K_80454-5K1-152CONN@ DC060004S10
GG
JCRT1 C-K_80454-5K1-152CONN@ DC060004S10
6
11
17
12
28
13
39
14
4
10 15
5
16 17
C61
10U_0603_6. 3V 6M
CRT@
C61
10U_0603_6. 3V 6M
CRT@
1 2
C58 2. 2U_0402_6. 3V 6MCRT@C58 2. 2U_0402_6. 3V 6MCRT@
1 2
C51 0.1U_0402_16V7K
CRT@
C51 0.1U_0402_16V7K
CRT@
1
2
R45 4.7K _0402_5% CRT@ R45 4.7K _0402_5% CRT@
1 2
R52 4.7K _0402_5% @R52 4.7K _0402_5% @
1 2
C52 0.1U_0402_16V7K
CRT@
C52 0.1U_0402_16V7K
CRT@
1
2
U4104
RTD2168-CG_QFN32_5X5
CRT@
U4104
RTD2168-CG_QFN32_5X5
CRT@
LANE1N
32
HPD
1
SMB_SCL
2
SMB_SDA
3
VGA_SCL
4
DVCC_ 3 3
5
VGA_SDA
6
VSYNC
7
HSYNC
8
VDD_DAC_33
9
BLUE_P
10
BLUE_N
11
GREEN_N
13
GND_DAC
14
RED_P
15
RED_N
16
XO
18
DVCC_ 3 3
20
VCCK_12
19
LANE1P
31
LANE0N
30
LANE0P
29
RRX
28
XI/CKIN
17
AUX_N
27
AUX_P
26
AVCC_12
25
AVCC_33
24
POL2_SCL
23
POL1_SDA
22
LDO_EN
21
GREEN_P
12
EPAD_GND
33
D4 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
D4 AZC099-04S.R7G_SOT23-6
@ESD@ SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
C43 0.1U_0402_25V 6 CRT@ C43 0.1U_0402_25V 6 CRT@
1 2
C68
3. 3P _0402_50V _C
EMICRT@
C68
3. 3P _0402_50V _C
EMICRT@
1 2
C54 0.1U_0402_16V7K
CRT@
C54 0.1U_0402_16V7K
CRT@
1
2
C71
3. 3P _0402_50V _C
EMICRT@
C71
3. 3P _0402_50V _C
EMICRT@
1 2
C64
18P _0402_50V 8J
@C64
18P _0402_50V 8J
@
1 2
R48 4.7K _0402_5% CRT@R48 4.7K _0402_5% CRT@
1 2
JPHW2 JUMP_43X39 JP@JPHW2 JUMP_43X39 JP@
1
1
2
2
C59 0. 1U_0402_16V 4ZCRT@C59 0. 1U_0402_16V 4ZCRT@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Layout notes +VDDREG=40mil +LAN_VDD_3V3=40mil +LAN_REGOUT=60mil
L
LDO mode Switcing mode
CL2 LL2 CL3
@@ SMT SMT
@ @ @ @
RTL8166EH (LDO mode)
SP050005L00 Footprint
LL1
JPHW1 need to short
+LAN_VDD_3V3 Rising time need>0.5mS and <100mS
RJ-45 CONN.
L
LL
(SP050003P00) 10/100 (SP050006800) Giga
DB phase : Reserve PU 10K by LAN vendor suggest in CPU page 20141112
2nd SC300001400
2nd SC300001400
DB phase : For ESD request 20141117
(SA000063500) 8166GSH 10/100 LDO mode (SA000084T00) 8111HSH Giga switch mode
Main SA000028Y10 2nd SA00006EE00 3rd SA00003AR00
Layout notes CL15 & CL16 close to UL1: Pin 11,32 CL13 close to UL1: Pin 11 CL14 close to UL1: Pin 32
Layout notes CL17 & CL18 close to UL1: Pin 23 Remove for NOT using SWR mode.
Layout notes LL2, CL3, CL4 for Switcing mode CL8 & CL18 close LL2 CL3,CL4 close LL2 pin2
Layout notes Place CL5~CL6 close UL1 Pin 3 , 8 Place CL7 CL9 close UL1 Pin 22 Place CL8 CL11 close UL1 Pin 30
L
L
Layout notes CR10,CR11 close UL1 Pin17,18
DB phase : follow vender suggest reserve PU 10K to LAN_3V 20141117
SI phase : Need to pop LL3 for LAN 1V regout 20141213
SI phase : change net name form +LAN_VDD_3V3 to +VDDREG 20141213
SI
：
Change BOM con/ig
RTL8166EH (LDO mode): Pin3,22,24 is NC , Internal LDO output is Pin30. Pin30 supply 1.05V to Pin8.
PV phase : LL3,RL13 change to 0-ohm shortpad. 20150125
+LAN_REGOUT
XTLI
+VDDREG
RJ45_RX1-
LAN_MDIP2 LAN_MDIP0 LAN_MDIN0LAN_MDIN2LAN_MDIN3
RJ45_TX0-
LAN_MDIP3
RJ45_TX3+ RJ45_TX0+RJ45_TX2+ RJ45_RX1+RJ45_TX2-RJ45_TX3-
LAN_MDIN1 LAN_MDIP1
+V_DAC
EC_LAN_ISOLATEB#
RJ45_TX3+ RJ45_TX0+RJ45_RX1+RJ45_TX3- RJ45_RX1- RJ45_TX2+ RJ45_TX0-RJ45_TX2-
RSET
LAN_CLKREQ#_R
LED_LINK_LAN# LED1/GPO LAN_ACT#+LAN_REGOUT EC_LAN_ISOLATEB#
XTLI XTLO
RSET
LAN_MDIN3 LAN_MDIP3 LAN_MDIN2LAN_MDIN0 LAN_MDIP0 LAN_MDIP2 LAN_MDIN1 LAN_MDIP1
PCIE_PRX_C_DTX_P3 PCIE_PRX_C_DTX_N3
+VDDREG LANWAKEB
LAN_MDIN2
LAN_MDIP1
LAN_MDIN0
LAN_MDIN3 LAN_MDIN1
LAN_MDIP0
LAN_ACT#
XTLO
LED1/GPO
LAN_ACT#_R
LED_LINK_LAN#
LED_LINK_LAN#_CONN LED_LINK_LAN#_CONN
LAN_MDIP3
LAN_MDIP2
LAN_PWR_EN_R
LAN_PWR_EN
<9>
XTLO_R <28>
LAN_CLKREQ#
<7>
PLT_RST#
<25,27,31,35,6,8>
CLK_PCIE_LAN
<7>
CLK_PCIE_LAN#
<7>
PCIE_PTX_C_DRX_P3
<10>
PCIE_PTX_C_DRX_N3
<10>
PCIE_PRX_DTX_P3
<10>
PCIE_PRX_DTX_N3
<10>
EC_PME# <25,9>
+3VALW
<12,19,24,25,26,28,29,32,37,48,50,53,56,7>
+LAN_VDD_3V3
<28>
+3VS
<12,15,16,18,19,20,21,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+LAN_VDD_1V0
+LAN_VDD_3V3
LANGND
+3VS
+LAN_VDD_3V3
+3VALW
+LAN_VDD_3V3
+LAN_VDD_1V0
+LAN_VDD_3V3
+3VALW +LAN_VDD_3V3
+3VALW +3VALW
+3VS
+LAN_VDD_3V3
+LAN_VDD_3V3
+LAN_VDD_3V3
+LAN_VDD_3V3
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
22 61
Monday, February 02, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LAN 8166G-EH 10/100 LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
22 61
Monday, February 02, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LAN 8166G-EH 10/100 LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
22 61
Monday, February 02, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LAN 8166G-EH 10/100 LA-C701P
LL3
0_0805_5%
short@
LL3
0_0805_5%
short@
1
2
CL9
1U_0402_6.3V6K
@
CL9
1U_0402_6.3V6K
@
1 2
CL1
1500P_0402_50V7K
@
CL1
1500P_0402_50V7K
@
1 2
YL1
25MHZ 10PF 5YEA25000102IF50Q3
UMA@YL1
25MHZ 10PF 5YEA25000102IF50Q3
UMA@
OSC
1
OSC
3
GND
2
GND
4
CL14
4.7U_0603_6.3V6K
@
CL14
4.7U_0603_6.3V6K
@
1 2
RL5 10K_0402_5%
@
RL5 10K_0402_5%
@
1 2
CL8
0.1U_0402_16V7K
CL8
0.1U_0402_16V7K
1 2
UL1 RTL8111HSH-CG
8111@
SA000084T00 UL1 RTL8111HSH-CG
8111@
SA000084T00
TSL1 GIGA LAN
8111@
SP050006800 TSL1 GIGA LAN
8111@
SP050006800
CL7
0.1U_0402_16V7K
8111@
CL7
0.1U_0402_16V7K
8111@
1 2
CL19
10P_0402_50V8J
UMA@
CL19
10P_0402_50V8J
UMA@
1 2
CL25 0.01U_0402_16V7K
8111@
CL25 0.01U_0402_16V7K
8111@
12
RG119 0_0402_5%
DIS@
RG119 0_0402_5%
DIS@
1
2
CL20
10P_0402_50V8J
UMA@
CL20
10P_0402_50V8J
UMA@
1 2
CL17
4.7U_0603_6.3V6K
8111@
CL17
4.7U_0603_6.3V6K
8111@
1 2
CL15
0.1U_0402_16V7K
8111@CL15
0.1U_0402_16V7K
8111@
1 2
RL12
510_0402_5%
RL12
510_0402_5%
1
2
RL4 10K_0402_5% @RL4 10K_0402_5% @
1
2
RL7
1K_0402_5%
RL7
1K_0402_5%
1
2
CL5
1U_0402_6.3V6K
8111@CL5
1U_0402_6.3V6K
8111@
1 2
CL3
4.7U_0603_6.3V6K
8111@
CL3
4.7U_0603_6.3V6K
8111@
1 2
LL1 0_0603_5%
@
LL1 0_0603_5%
@
1
2
D28 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
D28 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
RL2
10K_0402_5%
@
RL2
10K_0402_5%
@
1
2
CR10 0.1U_0402_10V7K CR10 0.1U_0402_10V7K
1
2
TH2TH2
CL11
0.1U_0402_16V7K
CL11
0.1U_0402_16V7K
1 2
RL11
510_0402_5%
RL11
510_0402_5%
1
2
DL2 SCA00000U10 YSLC05CH_SOT23-3
@ESD@
DL2 SCA00000U10 YSLC05CH_SOT23-3
@ESD@
1
2
3
TSL1 100 LAN SP050003P00
8166@
TSL1 100 LAN SP050003P00
8166@
TCT1
1
TD1+
2
TD1-
3
TCT2
4
TD2+
5
TD2-
6
TCT3
7
TD3+
8
TD3-
9
TCT4
10
TD4+
11
TD4-
12
MX4-
13
MX4+
14
MCT 4
15
MX3-
16
MX3+
17
MCT 3
18
MX2-
19
MX2+
20
MCT 2
21
MX1-
22
MX1+
23
MCT 1
24
CL13
4.7U_0603_6.3V6K
@
CL13
4.7U_0603_6.3V6K
@
1 2
CL16
0.1U_0402_16V7K
CL16
0.1U_0402_16V7K
1 2
CL6
0.1U_0402_16V7K
CL6
0.1U_0402_16V7K
1 2
RL6
0_0201_5%
short@
RL6
0_0201_5%
short@
1
2
LL2
2.2UH +-5% NLC252018T-2R2J-N
8111@
LL2
2.2UH +-5% NLC252018T-2R2J-N
8111@ 1
2
RL9
2.49K_0402_1%
RL9
2.49K_0402_1%
12
CL22
10P_1808_3KV SE167100J80
CL22
10P_1808_3KV SE167100J80
12
RL1 0_0201_5%
@
RL1 0_0201_5%
@
1
2
RL8 15K_0402_5% RL8 15K_0402_5%
1 2
DL1
YSLC05CH_SOT23-3
ESD@
SC600001X00
DL1
YSLC05CH_SOT23-3
ESD@
SC600001X00
1
2
3
CL4
0.1U_0402_16V7K
8111@CL4
0.1U_0402_16V7K
8111@
1 2
CR11 0.1U_0402_10V7K CR11 0.1U_0402_10V7K
1
2
CL23
120P_0402_50V8 EMI@
CL23
120P_0402_50V8 EMI@
1 2
JLAN1
CONN@
JLAN1
CONN@
TX0-
2
TX0+
1
RX1+
3
TX2+
4
TX2-
5
RX1-
6
TX3+
7
TX3-
8
B1_W hiteLED-
12
B2_W hiteLED+
11
A1_AmberLED-
9
A2_AmberLED+
10
GND2
14
GND1
13
D27 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
D27 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
I/O 4
6
VDD
5
I/O 3
4
I/O 2
3
GND
2
I/O 1
1
RL3
1M_0402_5%
UMA@
RL3
1M_0402_5%
UMA@
1
2
CL18
0.1U_0402_16V7K
CL18
0.1U_0402_16V7K
1 2
UL1
RTL8166CG
SA0000635008166@ UL1
RTL8166CG
SA0000635008166@
HSIP
13
HSIN
14
REFCLK_P
15
REFCLK_N
16
HSOP
17
HSON
18
CLKREQB
12
AVDD10
3
MDIP0
1
MDIN0
2
MDIP1
4
MDIN1
5
AVDD10
8
MDIP2
6
MDIN2
7
MDIP3
9
MDIN3
10
REGOUT
24
VDDREG(VDD33)
23
LED2(LED1)
25
DVDD10
22
ISO LAT EB
20
PERST B
19
LANW AKEB
21
AVDD33
32
RSET
31
AVDD10
30
CKXTAL2
29
CKXTAL1
28
LED0
27
LED1/GPO
26
GND
33
AVDD33
11
RP8
75_0804_8P4R_1% SD300002E80
RP8
75_0804_8P4R_1% SD300002E80
1
8
2
7
3
6
4
5
CL26 0.1U_0402_16V7K CL26 0.1U_0402_16V7K
1 2
JPHW1 JUMP_43X79
JP@
JPHW1 JUMP_43X79
JP@
1
1
2
2
CL2
0.1U_0402_16V7K
@ CL2
0.1U_0402_16V7K
@
1 2
UG2
G5243AT11U SOT-23
@
SA000028Y10
UG2
G5243AT11U SOT-23
@
SA000028Y10
OUT
1
EN
3
IN
5
GND
2
SS
4
CL12
0.1U_0402_16V7K
@
CL12
0.1U_0402_16V7K
@
1 2
RL13
0_0201_5%
short@
RL13
0_0201_5%
short@
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Layout notes +VDDREG=40mil +LAN_VDD_3V3=40mil +LAN_REGOUT=60mil
L
LDO mode Switcing mode
CL2 LL2 CL3
@@ SMT SMT
@ @ @ @
RTL8166EH (LDO mode)
SP050005L00 Footprint
LL1
JPHW1 need to short
+LAN_VDD_3V3 Rising time need>0.5mS and <100mS
RJ-45 CONN.
L
LL
(SP050003P00) 10/100 (SP050006800) Giga
DB phase : Reserve PU 10K by LAN vendor suggest in CPU page 20141112
2nd SC300001400
2nd SC300001400
DB phase : For ESD request 20141117
(SA000063500) 8166GSH 10/100 LDO mode (SA000084T00) 8111HSH Giga switch mode
Main SA000028Y10 2nd SA00006EE00 3rd SA00003AR00
Layout notes CL15 & CL16 close to UL1: Pin 11,32 CL13 close to UL1: Pin 11 CL14 close to UL1: Pin 32
Layout notes CL17 & CL18 close to UL1: Pin 23 Remove for NOT using SWR mode.
Layout notes LL2, CL3, CL4 for Switcing mode CL8 & CL18 close LL2 CL3,CL4 close LL2 pin2
Layout notes Place CL5~CL6 close UL1 Pin 3 , 8 Place CL7 CL9 close UL1 Pin 22 Place CL8 CL11 close UL1 Pin 30
L
L
Layout notes CR10,CR11 close UL1 Pin17,18
DB phase : follow vender suggest reserve PU 10K to LAN_3V 20141117
SI phase : Need to pop LL3 for LAN 1V regout 20141213
SI phase : change net name form +LAN_VDD_3V3 to +VDDREG 20141213
SI
：
Change BOM con/ig
RTL8166EH (LDO mode): Pin3,22,24 is NC , Internal LDO output is Pin30. Pin30 supply 1.05V to Pin8.
PV phase : LL3,RL13 change to 0-ohm shortpad. 20150125
+LAN_REGOUT
XTLI
+VDDREG
RJ45_RX1-
LAN_MDIP2 LAN_MDIP0 LAN_MDIN0LAN_MDIN2LAN_MDIN3
RJ45_TX0-
LAN_MDIP3
RJ45_TX3+ RJ45_TX0+RJ45_TX2+ RJ45_RX1+RJ45_TX2-RJ45_TX3-
LAN_MDIN1 LAN_MDIP1
+V_DAC
EC_LAN_ISOLATEB#
RJ45_TX3+ RJ45_TX0+RJ45_RX1+RJ45_TX3- RJ45_RX1- RJ45_TX2+ RJ45_TX0-RJ45_TX2-
RSET
LAN_CLKREQ#_R
LED_LINK_LAN# LED1/GPO LAN_ACT#+LAN_REGOUT EC_LAN_ISOLATEB#
XTLI XTLO
RSET
LAN_MDIN3 LAN_MDIP3 LAN_MDIN2LAN_MDIN0 LAN_MDIP0 LAN_MDIP2 LAN_MDIN1 LAN_MDIP1
PCIE_PRX_C_DTX_P3 PCIE_PRX_C_DTX_N3
+VDDREG LANWAKEB
LAN_MDIN2
LAN_MDIP1
LAN_MDIN0
LAN_MDIN3 LAN_MDIN1
LAN_MDIP0
LAN_ACT#
XTLO
LED1/GPO
LAN_ACT#_R
LED_LINK_LAN#
LED_LINK_LAN#_CONN LED_LINK_LAN#_CONN
LAN_MDIP3
LAN_MDIP2
LAN_PWR_EN_R
LAN_PWR_EN
<9>
XTLO_R <28>
LAN_CLKREQ#
<7>
PLT_RST#
<25,27,31,35,6,8>
CLK_PCIE_LAN
<7>
CLK_PCIE_LAN#
<7>
PCIE_PTX_C_DRX_P3
<10>
PCIE_PTX_C_DRX_N3
<10>
PCIE_PRX_DTX_P3
<10>
PCIE_PRX_DTX_N3
<10>
EC_PME# <25,9>
+3VALW
<12,19,24,25,26,28,29,32,37,48,50,53,56,7>
+LAN_VDD_3V3
<28>
+3VS
<12,15,16,18,19,20,21,23,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+LAN_VDD_1V0
+LAN_VDD_3V3
LANGND
+3VS
+LAN_VDD_3V3
+3VALW
+LAN_VDD_3V3
+LAN_VDD_1V0
+LAN_VDD_3V3
+3VALW +LAN_VDD_3V3
+3VALW +3VALW
+3VS
+LAN_VDD_3V3
+LAN_VDD_3V3
+LAN_VDD_3V3
+LAN_VDD_3V3
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
22 61
Monday, February 02, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LAN 8166G-EH 10/100 LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
22 61
Monday, February 02, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LAN 8166G-EH 10/100 LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
22 61
Monday, February 02, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LAN 8166G-EH 10/100 LA-C701P
LL3
0_0805_5%
short@
LL3
0_0805_5%
short@
1
2
CL9
1U_0402_6.3V6K
@
CL9
1U_0402_6.3V6K
@
1 2
CL1
1500P_0402_50V7K
@
CL1
1500P_0402_50V7K
@
1 2
YL1
25MHZ 10PF 5YEA25000102IF50Q3
UMA@YL1
25MHZ 10PF 5YEA25000102IF50Q3
UMA@
OSC
1
OSC
3
GND
2
GND
4
CL14
4.7U_0603_6.3V6K
@
CL14
4.7U_0603_6.3V6K
@
1 2
RL5 10K_0402_5%
@
RL5 10K_0402_5%
@
1 2
CL8
0.1U_0402_16V7K
CL8
0.1U_0402_16V7K
1 2
UL1 RTL8111HSH-CG
8111@
SA000084T00 UL1 RTL8111HSH-CG
8111@
SA000084T00
TSL1 GIGA LAN
8111@
SP050006800 TSL1 GIGA LAN
8111@
SP050006800
CL7
0.1U_0402_16V7K
8111@
CL7
0.1U_0402_16V7K
8111@
1 2
CL19
10P_0402_50V8J
UMA@
CL19
10P_0402_50V8J
UMA@
1 2
CL25 0.01U_0402_16V7K
8111@
CL25 0.01U_0402_16V7K
8111@
12
RG119 0_0402_5%
DIS@
RG119 0_0402_5%
DIS@
1
2
CL20
10P_0402_50V8J
UMA@
CL20
10P_0402_50V8J
UMA@
1 2
CL17
4.7U_0603_6.3V6K
8111@
CL17
4.7U_0603_6.3V6K
8111@
1 2
CL15
0.1U_0402_16V7K
8111@CL15
0.1U_0402_16V7K
8111@
1 2
RL12
510_0402_5%
RL12
510_0402_5%
1
2
RL4 10K_0402_5% @RL4 10K_0402_5% @
1
2
RL7
1K_0402_5%
RL7
1K_0402_5%
1
2
CL5
1U_0402_6.3V6K
8111@CL5
1U_0402_6.3V6K
8111@
1 2
CL3
4.7U_0603_6.3V6K
8111@
CL3
4.7U_0603_6.3V6K
8111@
1 2
LL1 0_0603_5%
@
LL1 0_0603_5%
@
1
2
D28 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
D28 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
I/O4
6
VDD
5
I/O3
4
I/O2
3
GND
2
I/O1
1
RL2
10K_0402_5%
@
RL2
10K_0402_5%
@
1
2
CR10 0.1U_0402_10V7K CR10 0.1U_0402_10V7K
1
2
TH2TH2
CL11
0.1U_0402_16V7K
CL11
0.1U_0402_16V7K
1 2
RL11
510_0402_5%
RL11
510_0402_5%
1
2
DL2 SCA00000U10 YSLC05CH_SOT23-3
@ESD@
DL2 SCA00000U10 YSLC05CH_SOT23-3
@ESD@
1
2
3
TSL1 100 LAN SP050003P00
8166@
TSL1 100 LAN SP050003P00
8166@
TCT1
1
TD1+
2
TD1-
3
TCT2
4
TD2+
5
TD2-
6
TCT3
7
TD3+
8
TD3-
9
TCT4
10
TD4+
11
TD4-
12
MX4-
13
MX4+
14
MCT 4
15
MX3-
16
MX3+
17
MCT 3
18
MX2-
19
MX2+
20
MCT 2
21
MX1-
22
MX1+
23
MCT 1
24
CL13
4.7U_0603_6.3V6K
@
CL13
4.7U_0603_6.3V6K
@
1 2
CL16
0.1U_0402_16V7K
CL16
0.1U_0402_16V7K
1 2
CL6
0.1U_0402_16V7K
CL6
0.1U_0402_16V7K
1 2
RL6
0_0201_5%
short@
RL6
0_0201_5%
short@
1
2
LL2
2.2UH +-5% NLC252018T-2R2J-N
8111@
LL2
2.2UH +-5% NLC252018T-2R2J-N
8111@ 1
2
RL9
2.49K_0402_1%
RL9
2.49K_0402_1%
12
CL22
10P_1808_3KV SE167100J80
CL22
10P_1808_3KV SE167100J80
12
RL1 0_0201_5%
@
RL1 0_0201_5%
@
1
2
RL8 15K_0402_5% RL8 15K_0402_5%
1 2
DL1
YSLC05CH_SOT23-3
ESD@
SC600001X00
DL1
YSLC05CH_SOT23-3
ESD@
SC600001X00
1
2
3
CL4
0.1U_0402_16V7K
8111@CL4
0.1U_0402_16V7K
8111@
1 2
CR11 0.1U_0402_10V7K CR11 0.1U_0402_10V7K
1
2
CL23
120P_0402_50V8 EMI@
CL23
120P_0402_50V8 EMI@
1 2
JLAN1
CONN@
JLAN1
CONN@
TX0-
2
TX0+
1
RX1+
3
TX2+
4
TX2-
5
RX1-
6
TX3+
7
TX3-
8
B1_W hiteLED-
12
B2_W hiteLED+
11
A1_AmberLED-
9
A2_AmberLED+
10
GND2
14
GND1
13
D27 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
D27 AZC099-04S.R7G_SOT23-6
@ESD@
SC300001G00
I/O 4
6
VDD
5
I/O 3
4
I/O 2
3
GND
2
I/O 1
1
RL3
1M_0402_5%
UMA@
RL3
1M_0402_5%
UMA@
1
2
CL18
0.1U_0402_16V7K
CL18
0.1U_0402_16V7K
1 2
UL1
RTL8166CG
SA0000635008166@ UL1
RTL8166CG
SA0000635008166@
HSIP
13
HSIN
14
REFCLK_P
15
REFCLK_N
16
HSOP
17
HSON
18
CLKREQB
12
AVDD10
3
MDIP0
1
MDIN0
2
MDIP1
4
MDIN1
5
AVDD10
8
MDIP2
6
MDIN2
7
MDIP3
9
MDIN3
10
REGOUT
24
VDDREG(VDD33)
23
LED2(LED1)
25
DVDD10
22
ISO LAT EB
20
PERST B
19
LANW AKEB
21
AVDD33
32
RSET
31
AVDD10
30
CKXTAL2
29
CKXTAL1
28
LED0
27
LED1/GPO
26
GND
33
AVDD33
11
RP8
75_0804_8P4R_1% SD300002E80
RP8
75_0804_8P4R_1% SD300002E80
1
8
2
7
3
6
4
5
CL26 0.1U_0402_16V7K CL26 0.1U_0402_16V7K
1 2
JPHW1 JUMP_43X79
JP@
JPHW1 JUMP_43X79
JP@
1
1
2
2
CL2
0.1U_0402_16V7K
@ CL2
0.1U_0402_16V7K
@
1 2
UG2
G5243AT11U SOT-23
@
SA000028Y10
UG2
G5243AT11U SOT-23
@
SA000028Y10
OUT
1
EN
3
IN
5
GND
2
SS
4
CL12
0.1U_0402_16V7K
@
CL12
0.1U_0402_16V7K
@
1 2
RL13
0_0201_5%
short@
RL13
0_0201_5%
short@
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Internal Speaker
Headphone
Power down (PD#) power stage for save power 0V: Power down power stage 3.3V: Power up power stage
wide 40 MIL
Reserve for ESD request.
EC Beep SB BeepPC Beep
Jack detect Combo Mic = High Normal HP = Low
COMBO AUDIO JACK
Internal SPK
HPR, HPL, 15mil Keep 30mil
Pin6 and Pin5 Normal OPEN
<SI> QA2 change from NMOS to BJT <PV> QA2 change to QA1.
<1/25>RA2,LA4 change to 0-ohm shortpad
Need to check 20141110
Need to check 20141110
Layout notes CA5 CA6 close Pin1 CA7 CA8 close Pin9 CA9 CA10 close Pin26 CA12 CA13 close Pin40
L
Layout notes Close chip Pin12
L
add 100k from vendor suggest 20141120
change 30 ohm from vendor suggest 20141120
11/24 modify mute LED that controled by EC
SI phase : Change JSPK1 connector footprint. 20141222
SI: pop DA4
PV phase : Remove DA8. 20150119
PV:RA27,RA28 change to 0-ohm shortpad
SPK_L+ SPK_L-SPK_R-SPK_R+ HPOUT_R HPOUT_L
HP_OUTL HP_OUTR
CBN CBP SENSEA
PLUG_IN#
ALDO_CAP
PC_BEEP
HDA_RST_AUDIO#
SDATA_IN
PC_BEEP_R
PC_BEEP
MIC_JD
INT _MIC
HP_OUTR_R
INT_MICR_C INT_MICL_C
INT_MIC
HP_OUTL_R
INT_MIC_R
ACPVEE
JDREF AVREF
CPVDD
CPVDD
MIC_JD
HDA_RST_AUDIO#
PD#
HP_OUTL_R HP_OUTR_RINT_MIC_R
HP_OUTL
PLUG_IN#
HP_OUTRINT_MIC
AVREF
SPK_R+SPK_R- SPK_L+SPK_L-
SPK_R-_CONN SPK_R+_CONN SPK_L-_CONN SPK_L+_CONN
EC_BEEP#
<25>
HDA_SPKR
<9>
HDA_SDOUT_AUDIO <6> HDA_BITCLK_AUDIO <6> HDA_SDIN0 <6>
HDA_RST_AUDIO#
<6>
HDA_SYNC_AUDIO
<6>
D_MIC_CLK
<19>
D_MIC_DATA
<19>
EC_MUTE#
<25>
+3VS
<12,15,16,18,19,20,21,22,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.5VS
<12,37,53,6>
+5VS
<19,20,24,25,26,29,33,37,51,54>
MUTE_LED_IN
<25>
+5VS
+5VS
+3VS
+5VS_AVDD
+DVDD +DVDD_IO
+1.5VS
+DVDD_IO
+DVDD
+3VS
+5VS_AVDD
+5VS_PVDD
+5VS_PVDD
GNDA
GNDA
GNDA
GNDA
+MIC2_VREFO
+MIC2_VREFO
GNDA
+1.5VS
+1.5VS_AVDD
+1.5VS_AVDD
GNDA
+3VS
+1.5VS
+DVDD
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
+3VS +1.5VS +5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AUDIO ALC3227-CG
C
23 61
Saturday, January 31, 2015
2013/01/04
2015/01/04
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AUDIO ALC3227-CG
C
23 61
Saturday, January 31, 2015
2013/01/04
2015/01/04
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AUDIO ALC3227-CG
C
23 61
Saturday, January 31, 2015
2013/01/04
2015/01/04
Compal Electronics, Inc.
CA10
4.7U_0603_6.3V6K
CA10
4.7U_0603_6.3V6K
12
CA15 2.2U_0402_6.3V6M CA15 2.2U_0402_6.3V6M
1
2
RA10 39.2K_0402_1% RA10 39.2K_0402_1%
1
2
RA261K_0402_5% RA261K_0402_5%
1 2
CA33 .1U_0402_16V7K CA33 .1U_0402_16V7K
1
2
RA20 10K_0402_5% RA20 10K_0402_5%
1 2
RA15 0_0603_5% RA15 0_0603_5%
1
2
CA29 .1U_0402_16V7K
EMI@
CA29 .1U_0402_16V7K
EMI@
1
2
RA21 0_0402_5% RA21 0_0402_5%
1
2
CA6
10U_0603_6.3V6M
CA6
10U_0603_6.3V6M
1 2
RA18 22K_0402_5% RA18 22K_0402_5%
1
2
DA3 CH751H-40PT_SOD323-2
@
DA3 CH751H-40PT_SOD323-2
@
2
1
RA27 0_0402_5%
short@
RA27 0_0402_5%
short@
1
2
CA22
10U_0603_6.3V6M
CA22
10U_0603_6.3V6M
12
CA38 .1U_0402_16V7K
@EMI@
CA38 .1U_0402_16V7K
@EMI@
1
2
CA30 .1U_0402_16V7K
EMI@
CA30 .1U_0402_16V7K
EMI@
1
2
CA39 .1U_0402_16V7K
@EMI@
CA39 .1U_0402_16V7K
@EMI@
1
2
CA34 .1U_0402_16V7K CA34 .1U_0402_16V7K
1
2
CA21
.1U_0402_16V7K
CA21
.1U_0402_16V7K
1 2
CA5
.1U_0402_16V7K
CA5
.1U_0402_16V7K
1 2
DA4 YSLC05CH_SOT23-3 SCA00002900 ESD@DA4 YSLC05CH_SOT23-3 SCA00002900 ESD@
1
2
3
RA16 0_0603_5% RA16 0_0603_5%
1
2
CA24 2.2U_0402_6.3V6M CA24 2.2U_0402_6.3V6M
1
2
RA14 0_0603_5% RA14 0_0603_5%
1
2
CA14 2.2U_0402_6.3V6M CA14 2.2U_0402_6.3V6M
1
2
DA6 YSLC05CH_SOT23-3 SCA00000U10 @ESD@DA6 YSLC05CH_SOT23-3 SCA00000U10 @ESD@
1
2
3
C123
220P_0402_50V7K
@EMI@C123
220P_0402_50V7K
@EMI@
1 2
CA23
10U_0603_6.3V6M
CA23
10U_0603_6.3V6M
12
RA3 1K_0402_5% RA3 1K_0402_5%
1
2
CA11 10U_0603_6.3V6M CA11 10U_0603_6.3V6M
1
2
RA19 47K_0402_5% RA19 47K_0402_5% 1
2
CA32
10U_0603_6.3V6M
CA32
10U_0603_6.3V6M
12
RA7 22_0402_5% RA7 22_0402_5%
1
2
CA12
.1U_0402_16V7K
CA12
.1U_0402_16V7K
1 2
RA2
0_0603_5%
short@
RA2
0_0603_5%
short@
1
2
CA4 4.7U_0402_6.3V6M CA4 4.7U_0402_6.3V6M
1
2
CA35
100P_0402_50V8J
@EMI@
CA35
100P_0402_50V8J
@EMI@
1 2
RA13 0_0603_5% RA13 0_0603_5%
1
2
RA9 20K_0402_1% RA9 20K_0402_1%
1
2
JHP YUQIU_PJ750-F07J1BE-A
CONN@
DC2301411240JHP YUQIU_PJ750-F07J1BE-A
CONN@
DC2301411240
4
1
5
6
3
2
GND
7C126
220P_0402_50V7K
@EMI@C126
220P_0402_50V7K
@EMI@
1 2
CA36
10P_0402_50V8J
@EMI@
CA36
10P_0402_50V8J
@EMI@
1 2
RA5 30_0402_1% RA5 30_0402_1%
1
2
C125
220P_0402_50V7K
@EMI@C125
220P_0402_50V7K
@EMI@
1 2
RA17 2.2K_0402_5% RA17 2.2K_0402_5%
1 2
RA1110K_0402_5% RA1110K_0402_5%
1 2
CA9
.1U_0402_16V7K
CA9
.1U_0402_16V7K
1 2
RA30
10K_0402_5%
RA30
10K_0402_5%
1 2
CA13
4.7U_0603_6.3V6K
CA13
4.7U_0603_6.3V6K
12
RA4 30_0402_1% RA4 30_0402_1%
1
2
RA24
22K_0402_5%
RA24
22K_0402_5%
1 2
RA23 0_0402_5% RA23 0_0402_5%
1
2
RA28 0_0402_5%
short@
RA28 0_0402_5%
short@
1
2
LA6
TAI-TECH HCB2012VF-601T20 0805
LA6
TAI-TECH HCB2012VF-601T20 0805
1
2
CA7
.1U_0402_16V7K
CA7
.1U_0402_16V7K
1 2
RA29 100K_0402_5% RA29 100K_0402_5%
1
2
CA19 10U_0603_6.3V6M CA19 10U_0603_6.3V6M
1
2
LA3 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 LA3 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 1
2
CA8
10U_0603_6.3V6M
CA8
10U_0603_6.3V6M
1 2
LA4
0_0603_5%
short@
LA4
0_0603_5%
short@
1
2
CA37
10P_0402_50V8J
@EMI@
CA37
10P_0402_50V8J
@EMI@
1 2
JSPK1
ACES_50278-00401-001
CONN@ SP02000RR00JSPK1
ACES_50278-00401-001
CONN@ SP02000RR00
1
1
2
2
3
3
4
4
G1
5
G2
6
C124
220P_0402_50V7K
@EMI@C124
220P_0402_50V7K
@EMI@
1 2
LA5 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 LA5 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 1
2
RA6 4.7K_0402_5%
@
RA6 4.7K_0402_5%
@
1
2
CA16 .1U_0402_16V7K CA16 .1U_0402_16V7K
1
2
CA18 10U_0603_6.3V6M CA18 10U_0603_6.3V6M
1
2
RA25 2.2K_0402_5% @RA25 2.2K_0402_5% @
1 2
CA17 4.7U_0603_6.3V6K CA17 4.7U_0603_6.3V6K
12
CA20
.1U_0402_16V7K
CA20
.1U_0402_16V7K
1 2
CA40 .1U_0402_16V7K
@EMI@
CA40 .1U_0402_16V7K
@EMI@
1
2
RA22 0_0402_5% RA22 0_0402_5%
1
2
CA1 4.7U_0402_6.3V6M CA1 4.7U_0402_6.3V6M
1
2
CA31 .1U_0402_16V7K CA31 .1U_0402_16V7K
1
2
E
B
C
QA1 MMBT3904WH_SOT323-3
Part Number = SB000008E10 @
E
B
C
QA1 MMBT3904WH_SOT323-3
Part Number = SB000008E10 @
2
3
1
UA1
ALC3227-CG_MQFN48P_6X6
UA1
ALC3227-CG_MQFN48P_6X6
LINE2_L
24
LINE2_R
23
MIC2_R
18
MIC2_L
17
LINE1_R
21
LINE1_L
22
SENSE_B
14
MO NO _O UT
16
JDREF
15
MIC1_L
19
MIC1_R
20
SENSE_A
13
PCBEEP
12
CBN
35
CPVDD
36
CBP
37
RESET#
11
SYNC
10
BCLK
6
SDAT A_OUT
5
SDAT A_IN
8
GPIO0/DMIC_DATA
2
GPIO1/DMIC_CLK
3
MIC2_VREF O
29
MIC1_VREF O _R
30
LDO1_CAP
27
VREF
28
DVDD
1
DVDD_IO
9
AVDD1
26
AVDD2
40
HPOUT_L
32
PVDD1
41
PDB
47
SPDIFO/GPIO2
48
LDO3-CAP
7
DVSS
4
MIC1_VREF O _L
31
HPOUT_R
33
CPVEE
34
PVDD2
46
SPK_OUT _R-
44
SPK_OUT _R+
45
SPK_OUT _L+
42
AVSS1
25
LDO2_CAP
39
SPK_OUT _L-
43
AVSS2
38
Thermal Pad
49
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Internal Speaker
Headphone
Power down (PD#) power stage for save power 0V: Power down power stage 3.3V: Power up power stage
wide 40 MIL
Reserve for ESD request.
EC Beep SB BeepPC Beep
Jack detect Combo Mic = High Normal HP = Low
COMBO AUDIO JACK
Internal SPK
HPR, HPL, 15mil Keep 30mil
Pin6 and Pin5 Normal OPEN
<SI> QA2 change from NMOS to BJT <PV> QA2 change to QA1.
<1/25>RA2,LA4 change to 0-ohm shortpad
Need to check 20141110
Need to check 20141110
Layout notes CA5 CA6 close Pin1 CA7 CA8 close Pin9 CA9 CA10 close Pin26 CA12 CA13 close Pin40
L
Layout notes Close chip Pin12
L
add 100k from vendor suggest 20141120
change 30 ohm from vendor suggest 20141120
11/24 modify mute LED that controled by EC
SI phase : Change JSPK1 connector footprint. 20141222
SI: pop DA4
PV phase : Remove DA8. 20150119
PV:RA27,RA28 change to 0-ohm shortpad
SPK_L+ SPK_L-SPK_R-SPK_R+ HPOUT_R HPOUT_L
HP_OUTL HP_OUTR
CBN CBP SENSEA
PLUG_IN#
ALDO_CAP
PC_BEEP
HDA_RST_AUDIO#
SDATA_IN
PC_BEEP_R
PC_BEEP
MIC_JD
INT _MIC
HP_OUTR_R
INT_MICR_C INT_MICL_C
INT_MIC
HP_OUTL_R
INT_MIC_R
ACPVEE
JDREF AVREF
CPVDD
CPVDD
MIC_JD
HDA_RST_AUDIO#
PD#
HP_OUTL_R HP_OUTR_RINT_MIC_R
HP_OUTL
PLUG_IN#
HP_OUTRINT_MIC
AVREF
SPK_R+SPK_R- SPK_L+SPK_L-
SPK_R-_CONN SPK_R+_CONN SPK_L-_CONN SPK_L+_CONN
EC_BEEP#
<25>
HDA_SPKR
<9>
HDA_SDOUT_AUDIO <6> HDA_BITCLK_AUDIO <6> HDA_SDIN0 <6>
HDA_RST_AUDIO#
<6>
HDA_SYNC_AUDIO
<6>
D_MIC_CLK
<19>
D_MIC_DATA
<19>
EC_MUTE#
<25>
+3VS
<12,15,16,18,19,20,21,22,24,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.5VS
<12,37,53,6>
+5VS
<19,20,24,25,26,29,33,37,51,54>
MUTE_LED_IN
<25>
+5VS
+5VS
+3VS
+5VS_AVDD
+DVDD +DVDD_IO
+1.5VS
+DVDD_IO
+DVDD
+3VS
+5VS_AVDD
+5VS_PVDD
+5VS_PVDD
GNDA
GNDA
GNDA
GNDA
+MIC2_VREFO
+MIC2_VREFO
GNDA
+1.5VS
+1.5VS_AVDD
+1.5VS_AVDD
GNDA
+3VS
+1.5VS
+DVDD
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
GNDA
+3VS +1.5VS +5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AUDIO ALC3227-CG
C
23 61
Saturday, January 31, 2015
2013/01/04
2015/01/04
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AUDIO ALC3227-CG
C
23 61
Saturday, January 31, 2015
2013/01/04
2015/01/04
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AUDIO ALC3227-CG
C
23 61
Saturday, January 31, 2015
2013/01/04
2015/01/04
Compal Electronics, Inc.
CA10
4.7U_0603_6.3V6K
CA10
4.7U_0603_6.3V6K
12
CA15 2.2U_0402_6.3V6M CA15 2.2U_0402_6.3V6M
1
2
RA10 39.2K_0402_1% RA10 39.2K_0402_1%
1
2
RA261K_0402_5% RA261K_0402_5%
1 2
CA33 .1U_0402_16V7K CA33 .1U_0402_16V7K
1
2
RA20 10K_0402_5% RA20 10K_0402_5%
1 2
RA15 0_0603_5% RA15 0_0603_5%
1
2
CA29 .1U_0402_16V7K
EMI@
CA29 .1U_0402_16V7K
EMI@
1
2
RA21 0_0402_5% RA21 0_0402_5%
1
2
CA6
10U_0603_6.3V6M
CA6
10U_0603_6.3V6M
1 2
RA18 22K_0402_5% RA18 22K_0402_5%
1
2
DA3 CH751H-40PT_SOD323-2
@
DA3 CH751H-40PT_SOD323-2
@
2
1
RA27 0_0402_5%
short@
RA27 0_0402_5%
short@
1
2
CA22
10U_0603_6.3V6M
CA22
10U_0603_6.3V6M
12
CA38 .1U_0402_16V7K
@EMI@
CA38 .1U_0402_16V7K
@EMI@
1
2
CA30 .1U_0402_16V7K
EMI@
CA30 .1U_0402_16V7K
EMI@
1
2
CA39 .1U_0402_16V7K
@EMI@
CA39 .1U_0402_16V7K
@EMI@
1
2
CA34 .1U_0402_16V7K CA34 .1U_0402_16V7K
1
2
CA21
.1U_0402_16V7K
CA21
.1U_0402_16V7K
1 2
CA5
.1U_0402_16V7K
CA5
.1U_0402_16V7K
1 2
DA4 YSLC05CH_SOT23-3 SCA00002900 ESD@DA4 YSLC05CH_SOT23-3 SCA00002900 ESD@
1
2
3
RA16 0_0603_5% RA16 0_0603_5%
1
2
CA24 2.2U_0402_6.3V6M CA24 2.2U_0402_6.3V6M
1
2
RA14 0_0603_5% RA14 0_0603_5%
1
2
CA14 2.2U_0402_6.3V6M CA14 2.2U_0402_6.3V6M
1
2
DA6 YSLC05CH_SOT23-3 SCA00000U10 @ESD@DA6 YSLC05CH_SOT23-3 SCA00000U10 @ESD@
1
2
3
C123
220P_0402_50V7K
@EMI@C123
220P_0402_50V7K
@EMI@
1 2
CA23
10U_0603_6.3V6M
CA23
10U_0603_6.3V6M
12
RA3 1K_0402_5% RA3 1K_0402_5%
1
2
CA11 10U_0603_6.3V6M CA11 10U_0603_6.3V6M
1
2
RA19 47K_0402_5% RA19 47K_0402_5% 1
2
CA32
10U_0603_6.3V6M
CA32
10U_0603_6.3V6M
12
RA7 22_0402_5% RA7 22_0402_5%
1
2
CA12
.1U_0402_16V7K
CA12
.1U_0402_16V7K
1 2
RA2
0_0603_5%
short@
RA2
0_0603_5%
short@
1
2
CA4 4.7U_0402_6.3V6M CA4 4.7U_0402_6.3V6M
1
2
CA35
100P_0402_50V8J
@EMI@
CA35
100P_0402_50V8J
@EMI@
1 2
RA13 0_0603_5% RA13 0_0603_5%
1
2
RA9 20K_0402_1% RA9 20K_0402_1%
1
2
JHP YUQIU_PJ750-F07J1BE-A
CONN@
DC2301411240JHP YUQIU_PJ750-F07J1BE-A
CONN@
DC2301411240
4
1
5
6
3
2
GND
7C126
220P_0402_50V7K
@EMI@C126
220P_0402_50V7K
@EMI@
1 2
CA36
10P_0402_50V8J
@EMI@
CA36
10P_0402_50V8J
@EMI@
1 2
RA5 30_0402_1% RA5 30_0402_1%
1
2
C125
220P_0402_50V7K
@EMI@C125
220P_0402_50V7K
@EMI@
1 2
RA17 2.2K_0402_5% RA17 2.2K_0402_5%
1 2
RA1110K_0402_5% RA1110K_0402_5%
1 2
CA9
.1U_0402_16V7K
CA9
.1U_0402_16V7K
1 2
RA30
10K_0402_5%
RA30
10K_0402_5%
1 2
CA13
4.7U_0603_6.3V6K
CA13
4.7U_0603_6.3V6K
12
RA4 30_0402_1% RA4 30_0402_1%
1
2
RA24
22K_0402_5%
RA24
22K_0402_5%
1 2
RA23 0_0402_5% RA23 0_0402_5%
1
2
RA28 0_0402_5%
short@
RA28 0_0402_5%
short@
1
2
LA6
TAI-TECH HCB2012VF-601T20 0805
LA6
TAI-TECH HCB2012VF-601T20 0805
1
2
CA7
.1U_0402_16V7K
CA7
.1U_0402_16V7K
1 2
RA29 100K_0402_5% RA29 100K_0402_5%
1
2
CA19 10U_0603_6.3V6M CA19 10U_0603_6.3V6M
1
2
LA3 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 LA3 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 1
2
CA8
10U_0603_6.3V6M
CA8
10U_0603_6.3V6M
1 2
LA4
0_0603_5%
short@
LA4
0_0603_5%
short@
1
2
CA37
10P_0402_50V8J
@EMI@
CA37
10P_0402_50V8J
@EMI@
1 2
JSPK1
ACES_50278-00401-001
CONN@ SP02000RR00JSPK1
ACES_50278-00401-001
CONN@ SP02000RR00
1
1
2
2
3
3
4
4
G1
5
G2
6
C124
220P_0402_50V7K
@EMI@C124
220P_0402_50V7K
@EMI@
1 2
LA5 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 LA5 SUPPRE_ KC FBMA-10-100505-101T 0402 PCB Footprint = R_0402 1
2
RA6 4.7K_0402_5%
@
RA6 4.7K_0402_5%
@
1
2
CA16 .1U_0402_16V7K CA16 .1U_0402_16V7K
1
2
CA18 10U_0603_6.3V6M CA18 10U_0603_6.3V6M
1
2
RA25 2.2K_0402_5% @RA25 2.2K_0402_5% @
1 2
CA17 4.7U_0603_6.3V6K CA17 4.7U_0603_6.3V6K
12
CA20
.1U_0402_16V7K
CA20
.1U_0402_16V7K
1 2
CA40 .1U_0402_16V7K
@EMI@
CA40 .1U_0402_16V7K
@EMI@
1
2
RA22 0_0402_5% RA22 0_0402_5%
1
2
CA1 4.7U_0402_6.3V6M CA1 4.7U_0402_6.3V6M
1
2
CA31 .1U_0402_16V7K CA31 .1U_0402_16V7K
1
2
E
B
C
QA1 MMBT3904WH_SOT323-3
Part Number = SB000008E10 @
E
B
C
QA1 MMBT3904WH_SOT323-3
Part Number = SB000008E10 @
2
3
1
UA1
ALC3227-CG_MQFN48P_6X6
UA1
ALC3227-CG_MQFN48P_6X6
LINE2_L
24
LINE2_R
23
MIC2_R
18
MIC2_L
17
LINE1_R
21
LINE1_L
22
SENSE_B
14
MO NO _O UT
16
JDREF
15
MIC1_L
19
MIC1_R
20
SENSE_A
13
PCBEEP
12
CBN
35
CPVDD
36
CBP
37
RESET#
11
SYNC
10
BCLK
6
SDAT A_OUT
5
SDAT A_IN
8
GPIO0/DMIC_DATA
2
GPIO1/DMIC_CLK
3
MIC2_VREF O
29
MIC1_VREF O _R
30
LDO1_CAP
27
VREF
28
DVDD
1
DVDD_IO
9
AVDD1
26
AVDD2
40
HPOUT_L
32
PVDD1
41
PDB
47
SPDIFO/GPIO2
48
LDO3-CAP
7
DVSS
4
MIC1_VREF O _L
31
HPOUT_R
33
CPVEE
34
PVDD2
46
SPK_OUT _R-
44
SPK_OUT _R+
45
SPK_OUT _L+
42
AVSS1
25
LDO2_CAP
39
SPK_OUT _L-
43
AVSS2
38
Thermal Pad
49
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
+1.05V TO +1.05VS
J1 need to short
20mils
+3VALW TO +3V_PCH
+5VALW TO +5VS
+1.05V TO +V1.05DX_MODPHY
+3VALW TO +3VS
PV:R570 change to 0-ohm shortpad
SYSON#
SYSON
SUSP
SUSP#
SUSP# SUSP#
SYSON
SUSP SUSP#SYSON#
SYSON
<25,49>
SUSP# <25,49,50,53>
PCH_PWR_EN
<25>
+5VALW
<15,19,26,29,30,32,34,37,48,49,56>
+3VALW
<12,19,22,25,26,28,29,32,37,48,50,53,56,7>
+3VS
<12,15,16,18,19,20,21,22,23,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.05VS
<11,12,25,28,34,37,50,51>
+1.05V
<12>
+3V_PCH
<10,11,12,36,4,6,7,9>
+1.05VS_MODPHY
<12,34>
+5VALW
+1.05V
+1.05VS_MODPHY
+1.05V
+1.05VS
+5VALW
+3VALW
+3V_PCH
+3VALW
+5VALW +3VALW+3VS
+1.05VS +1.05V +3V_PCH
+1.05VS_MODPHY
+3VS
+5VALW +3VALW
+5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DC Interface
Custom
24 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DC Interface
Custom
24 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DC Interface
Custom
24 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
C575
10U_0603_6.3V6M
C575
10U_0603_6.3V6M
1 2
CC56
22U_0805_6.3V6M
@
CC56
22U_0805_6.3V6M
@
1 2
Q18A DMN66D0LDW-7_SOT363-6 Q18A DMN66D0LDW-7_SOT363-6
6 1
2
D
G
S
Q30 AO3413L_SOT23-3
D
G
S
Q30 AO3413L_SOT23-3
1
2
3
EM5209VF DFN 14PQ21 SA00007PM00 EM5209VF DFN 14PQ21 SA00007PM00
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
C570
10U_0603_6.3V6M
C570
10U_0603_6.3V6M
1 2
C554 100P_0402_50V8J C554 100P_0402_50V8J
1
2
Q18B
DMN66D0LDW-7_SOT363-6
Q18B
DMN66D0LDW-7_SOT363-6
3 4
5
R559
100K_0402_5%
R559
100K_0402_5%
12
G
D S
Q31
2N7002_SOT23-3
G
D S
Q31
2N7002_SOT23-3
2
1 3
J1 JUMP_43X79
JP@
J1 JUMP_43X79
JP@
1
1
2
2
C591
0.1U_0402_16V7K
@
C591
0.1U_0402_16V7K
@
1 2
R570 0_0805_5%
short@
R570 0_0805_5%
short@
1
2
RPH16
100K_0804_8P4R_5%
RPH16
100K_0804_8P4R_5%
1
8
2
7
3
6
4
5
C590
1U_0402_6.3V6K
C590
1U_0402_6.3V6K
1 2
C557 680P_0402_50V7K C557 680P_0402_50V7K
1
2
B B
C C
D D
E E
1
1
2
2
3
3
4
4
+1.05V TO +1.05VS
J1 need to short
20mils
+3VALW TO +3V_PCH
+5VALW TO +5VS
+1.05V TO +V1.05DX_MODPHY
+3VALW TO +3VS
PV:R570 change to 0-ohm shortpad
SYSON#
SYSON
SUSP
SUSP#
SUSP# SUSP#
SYSON
SUSP SUSP#SYSON#
SYSON
<25,49>
SUSP# <25,49,50,53>
PCH_PWR_EN
<25>
+5VALW
<15,19,26,29,30,32,34,37,48,49,56>
+3VALW
<12,19,22,25,26,28,29,32,37,48,50,53,56,7>
+3VS
<12,15,16,18,19,20,21,22,23,25,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+1.05VS
<11,12,25,28,34,37,50,51>
+1.05V
<12>
+3V_PCH
<10,11,12,36,4,6,7,9>
+1.05VS_MODPHY
<12,34>
+5VALW
+1.05V
+1.05VS_MODPHY
+1.05V
+1.05VS
+5VALW
+3VALW
+3V_PCH
+3VALW
+5VALW +3VALW+3VS
+1.05VS +1.05V +3V_PCH
+1.05VS_MODPHY
+3VS
+5VALW +3VALW
+5VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DC Interface
Custom
24 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DC Interface
Custom
24 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
DC Interface
Custom
24 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
Compal Electronics, Inc.
LA-C701P
C575
10U_0603_6.3V6M
C575
10U_0603_6.3V6M
1 2
CC56
22U_0805_6.3V6M
@
CC56
22U_0805_6.3V6M
@
1 2
Q18A DMN66D0LDW-7_SOT363-6 Q18A DMN66D0LDW-7_SOT363-6
6 1
2
D
G
S
Q30 AO3413L_SOT23-3
D
G
S
Q30 AO3413L_SOT23-3
1
2
3
EM5209VF DFN 14PQ21 SA00007PM00 EM5209VF DFN 14PQ21 SA00007PM00
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
C570
10U_0603_6.3V6M
C570
10U_0603_6.3V6M
1 2
C554 100P_0402_50V8J C554 100P_0402_50V8J
1
2
Q18B
DMN66D0LDW-7_SOT363-6
Q18B
DMN66D0LDW-7_SOT363-6
3 4
5
R559
100K_0402_5%
R559
100K_0402_5%
12
G
D S
Q31
2N7002_SOT23-3
G
D S
Q31
2N7002_SOT23-3
2
1 3
J1 JUMP_43X79
JP@
J1 JUMP_43X79
JP@
1
1
2
2
C591
0.1U_0402_16V7K
@
C591
0.1U_0402_16V7K
@
1 2
R570 0_0805_5%
short@
R570 0_0805_5%
short@
1
2
RPH16
100K_0804_8P4R_5%
RPH16
100K_0804_8P4R_5%
1
8
2
7
3
6
4
5
C590
1U_0402_6.3V6K
C590
1U_0402_6.3V6K
1 2
C557 680P_0402_50V7K C557 680P_0402_50V7K
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
20mil
Compal Electronics, Inc.
Board ID control
<PWR>
<DB>RK4 change to 12K ==>for 15" DIS <DB>RK4 change to 0 ===>for 15" UMA
RK4
PV
MV
DB SI
RK4
15K ohm 20k ohm 33k ohm 56k ohm
12k ohm
DIS
27K ohm
43K ohm
0 ohm
15" UMA
2014-11-14: 1. remove GPIO00
2014-11-13: Pin16 from MINI1_LED# to PM_SLP_SUS# Pin29 from PM_SLP_SUS# remove Pin25 from EC_INVT_PWM remove Pin19 from EC_+1.05VS_PG to GPU_HOT# Pin21 from GPU_HOT# to EC_+1.05VS_PG Pin25 from EC_INVT_PWM remove Pin122 from GPU_THERMAL_DET# to PBTN_OUT# Pin123 from X to PM_SLP_S4# Pin18 remove Pin36 remove no support USB CHR
2014-11-13: Pin64 from BOARD_ID to X no support KBL Pin66 from X to BOARD_ID Pin76 Pin97 swap Pin84 from PM_SLP_S4# to USB_ON# Pin68 from +1.05V_VS_PG_PWR to MINI1_LED# Pin70 NC , no support Pin72 NC , no support Pin86 NC , no suppout
2014-11-13: Pin108 from USB_ON# to +1.05V_VS_PG_PWR Pin106 NC , no support 2014-11-18 Pin108 from +1.05V_VS_PG_PWR to VGA_AC_BATT 2014-11-24 Pin108 from VGA_AC_BATT to 1.05V_VS_PG_PWR
DB phase : 20141117
2014-11-24 +1.05VS PU 10K From Power
2014-11-25 Reserve for co-lay Nuvoton NPCE388N
SI:Add EC_SMB_CK3/DA3 for GPU. SI:EC_MUTE# change from 83 to 72.
SI:USB_ON# change from 84 to 86.
2014-12-24 RK24 pull high +1.05VS for Nuvoton NPCE388N. Add RK28 for NPCE388N , for clean power.
SI : Add RK27 for leakage of light
UK1.124 KBC 9012/Nuvoton : +V18R KBC 9022 : +3VALW_EC
PV:RK1,RK3 change to 0-ohm shortpad
PV:RK22,RK9 change to 0-ohm shortpad
PV:RK6,RK15,RK16 change to 0-ohm shortpad
PV:R5178,RK8 change to 0-ohm shortpad
ECAGND
EC_TP_DATA EC_TP_CLK
CLK_PCI_LPC
SYSON EC_BKOFF#
FAN_SPEED1LPC_AD1 PLT_RST#
PCH_RSMRST# SUSP#
SERIRQ EC_RST#LPC_AD2
ECAGND
EC_KBRST#
ADP_I
EC_SCI#
LPC_AD3 LPC_AD0LPC_FRAME#
+EC_VCCA
PM_SLP_S5#
E51TXD_P80DATA
PM_SLP_S3#
E51RXD_P80CLK
EC_RST#
VR_HOT#
KSO1 KSO2 KSO3KSI4 KSI7KSI5 KSI6
ON/OFF# LID_SW #EC_ACINPCH_DPW ROK
PCH_DPW ROK PCH_PW ROK
KSI0 KSI1 KSI2 KSI3 KSO0 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_ON
EC_SMB_CK2_R EC_SMB_DA2_R
CAP_LOCK# PW R_LED# BAT_CHG_LED WLAN_ON_LED#
H_PROCHOT#_EC
WLAN_OFF_LED#
EC_ACIN
AOAC_PME# EC_PECI
PCH_PW ROK
PCH_PW R_ENVCIN0_PH
NMI_DBG#
BOARD_ID
+3VALW _EC
H_PROCHOT#_EC VCIN1_PHEC_TP_DATA EC_TP_CLK
SUSACK#
PCH_SUSW ARN#
KSO16 KSO17
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2PLT_RST# EC_ON
ADP_ID MAINPWONBT_ON_EC
PLT_RST#
ECAGND
AC_LED#
B/I#
PCH_PW R_EN EC_ACIN
TOUCH_ON#EC_FAN_PW M1
PM_SLP_SUS#
E51TXD_P80DATA
PBTN_OUT#
BOARD_ID ENBKL SYS_PW ROK 1.05V_VS_PG_PW R +V18RTS_GPIO_EC ME_Flash_ENEC_PME#_EC_R
PM_CLKRUN#_R
PBTN_OUT#
PM_SLP_S4#
LID_SW #
EC_SCI#
VGA_AC_BATT
MUTE_LED_OUT
1.05V_VS_PG_PW R
NMI_DBG# GPXIOD06EC_MUTE#
USB_ON#
EC_SMB_CK3 EC_SMB_DA3
MUTE_LED_OUT
LPC_FRAME#
<27,7>
LPC_AD2
<27,7>
LPC_AD0
<27,7>
LPC_AD3
<27,7>
LPC_AD1
<27,7>
EC_SMB_DA1
<46,47>
EC_KBRST#
<7,9>
FAN_SPEED1
<33>
ADP_I <45,47>
PCH_RSMRST# <8>
SYSON <24,49>
CLK_PCI_LPC
<7>
E51RXD_P80CLK
<31>
E51TXD_P80DATA
<31>
PROCHOT# <4>
VR_HOT#
<51>
ON/OFF# <32>
KSO[0..17]
<26>
KSI[0..7]
<26>
SUSP# <24,49,50,53>
SERIRQ
<27,9>
LID_SW # <32>
ACIN <36,47,8>
PM_SLP_S5#
<8>
PM_SLP_S3#
<8>
PLT_RST#
<22,27,31,35,6,8>
EC_SCI#
<9>
EC_BKOFF# <18>
BAT_CHG_LED <45>
EC_ON <48>
EC_SMB_CK2
<18,21,36,7>
EC_SMB_DA2
<18,21,36,7>
PW R_LED# <32> WLAN_ON_LED# <26>
CAP_LOCK# <26>
WLAN_OFF_LED# <26>
AOAC_PME# <8>
H_PECI <4>
PCH_PW ROK
<8>
PCH_PW R_EN <24>
NMI_DBG#_CPU <9>
VCIN0_PH <45>
VCIN1_PH <45>
SUSACK#
<8>
PCH_SUSW ARN#
<8>
EC_SMB_CK1
<46,47>
ECAGND <45>
ADP_ID <45>
MAINPWON <48>
EC_PCIE_W AKE#
<31>
BT_ON_EC <31>
EC_SPI_CLK <7> EC_SPI_CS0# <7>
PCH_DPW ROK <8>
EC_LID_OUT# <9>
EC_BEEP# <23>
AC_LED#
<45>
B/I# <46>
TOUCH_ON# <19>
EC_SPI_SO <7> EC_SPI_SI <7>
EC_FAN_PW M1 <33>
PM_SLP_SUS#
<8>
EC_+1.05VS_PG <6>
MINI1_LED# <31>
PBTN_OUT#
<6,8>
PM_SLP_S4#
<8>
ENBKL <8>
EC_PME# <22,9>
SYS_PW ROK <6,8>
1.05V_VS_PG_PW R <50>
ME_Flash_EN <6>
PM_CLKRUN#
<8>
+3VALW _EC
<45>
+3VS
<12,15,16,18,19,20,21,22,23,24,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+3VL
<28,32,46,47,48,6>
TS_GPIO_EC <19>
TP_CLK <26> TP_DATA <26>
WL_PWREN_EC <29>
VGA_AC_BATT <36>
MUTE_LED_IN
<23>
MUTE_LED_OUT
<26>
GPU_HOT#
<54>
DGPU_PW R_EN <37,54,8,9>
EC_MUTE# <23>
USB_ON# <30,32>
EC_SMB_CK3 <36> EC_SMB_DA3 <36>
+5VS
<19,20,23,24,26,29,33,37,51,54>
+3VALW
+3VALW _EC
+3VALW _EC
+3VALW _EC
+3VL
+3V_EC_VDD
+3VALW _EC
+3VL
+3VALW _EC
+3VS
+3VL
+3VALW _EC
+3VALW _EC +3VS +3VL
+1.05VS
+5VS
+5VS
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
EC ENE-KB9022
Custom
25 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
EC ENE-KB9022
Custom
25 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
EC ENE-KB9022
Custom
25 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RK9 0_0402_5%
short@
RK9 0_0402_5%
short@
1
2
CK3 0.1U_0402_16V7K CK3 0.1U_0402_16V7K
1 2
CK4 0.1U_0402_16V7K
ESD@
CK4 0.1U_0402_16V7K
ESD@
1
2
LK2
FBMA-L11-160808-800LMT_0603
LK2
FBMA-L11-160808-800LMT_0603
1
2
RK14
10K_0402_5%
@
RK14
10K_0402_5%
@
1
2
CK6 100P_0402_50V8J CK6 100P_0402_50V8J
1
2
RK8
0_0402_5%
short@
RK8
0_0402_5%
short@
1
2
RK2 100K_0402_1% RK2 100K_0402_1%
12
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface SPI Flash ROM
GPO GPI
UK1
KB9022QD_LQFP128_14X14
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface SPI Flash ROM
GPO GPI
UK1
KB9022QD_LQFP128_14X14
GATEA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ
3
LPC_FRAME#
4
LPC_AD3
5
PM_SLP_S3#/GPIO04
6
LPC_AD2
7
LPC_AD1
8
VCC_LPC
9
LPC_AD0
10
GND
11
CLK_PCI_EC
12
PCIRST#/GPIO05
13
GPIO07
14
GPIO08
15
GPIO0A
16
GPIO0B
17
GPIO0C
18
AC_PRESENT/GPIO0D
19
EC_SCI#/GPIO0E
20
EC_VCCST_PG/GPIO0F
21
VCC
22
BEEP#/GPIO10
23
GND
24
PW M2/GPIO11
25
EC_FAN_PW M/GPIO12
26
AC_OFF/GPIO13
27
FAN_SPEED1/GPIO14
28
FANFB1/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
PCH_PW ROK/GPIO18
32
VCC
33
SUSP_LED#/GPIO19
34
GND
35
NUM_LED#/GPIO1A
36
EC_RST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
VCIN1_BATT_TEMP/AD0/GPIO38
63
VCIN1_BATT_DROP/AD1/GPIO39
64
ADP_I/AD2/GPIO3A
65
AD_BID/AD3/GPIO3B
66
AVCC
67
DA0/GPIO3C
68
AGND
69
EN_DFAN1/DA1/GPIO3D
70
DA2/GPIO3E
71
DA3/GPIO3F
72
EC_CIR_RX/AD6/GPIO40
73
SYS_PW ROK/AD7/GPIO41
74
AD4/GPIO42
75
AD5/GPIO43
76
EC_SMB_CLK1/GPIO44
77
EC_SMB_DAT1/GPIO45
78
EC_SMB_CLK2/GPIO46
79
EC_SMB_DAT2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
EC_MUTE#/PSCLK1/GPIO4A
83
USB_EN#/PSDAT1/GPIO4B
84
PSCLK2/GPIO4C
85
PSDAT2/GPIO4D
86
TP_CLK/GPIO4E
87
TP_DATA/GPIO4F
88
GPIO50
89
BATT_CHG_LED#/GPIO52
90
CAPS_LED#/GPIO53
91
PW R_LED#/GPIO54
92
BATT_LOW _LED#/GPIO55
93
GND
94
SYSON/GPIO56
95
VCC
96
ENKBL/GPXIOA00
97
WOL_EN/GPXIOA01
98
ME_EN/GPXIOA02
99
EC_RSMRST#/GPXIOA03
100
GPXIOA04
101
VCIN1_ADP_PROCHOT/GPXIOA05
102
VCOUT1_PROCHOT#/GPXIOA06
103
VCOUT0_MAIN_PW R_ON/GPXIOA07
104
BKOFF#/GPXIOA08
105
GPXIOA09
106
PCH_PW R_EN/GPXIOA10
107
PW R_VCCST_PG/GPXIOA11
108
VCIN0_PH1/GPXIOD00
109
VCIN1_AC_IN/GPXIOD01
110
VCC0
111
EC_ON/GPXIOD02
112
GND
113
ON/OFF#/GPXIOD03
114
LID_SW #/GPXIOD04
115
SUSP#/GPXIOD05
116
GPXIOD06
117
PECI/GPXIOD07
118
MISO/GPIO5B
119
MOSI/GPIO5C
120
VR_ON/GPIO57
121
PBTN_OUT#/GPIO5D
122
PM_SLP_S4#/GPIO5E
123
V18R/VCC_IO2
124
VCC
125
SPICLK/GPIO58
126
DPW ROK_EC/GPIO59
127
SPICS#/GPIO5A
128
R5178
0_0201_5%
short@
R5178
0_0201_5%
short@
1
2
CK2
0.1U_0402_16V7K
CK2
0.1U_0402_16V7K
1 2
RP11
2.2K_0804_8P4R_5%
RP11
2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RK1
0_0603_5%
short@RK1
0_0603_5%
short@
1
2
RK28 0_0402_5%
9022@
RK28 0_0402_5%
9022@
1
2
RK10
0_0402_5%
@
RK10
0_0402_5%
@
1
2
RK20 100K_0402_5%
@
RK20 100K_0402_5%
@
1
2
RK18 47K_0402_5% RK18 47K_0402_5%
1
2
LK1 FBMA-L11-160808-800LMT_0603 LK1 FBMA-L11-160808-800LMT_0603
1
2
RK3 0_0402_5%
short@
RK3 0_0402_5%
short@
1
2
RK15 0_0402_5%
short@
RK15 0_0402_5%
short@
1
2
RK13 4.7K_0402_5% RK13 4.7K_0402_5%
1
2
DK1
CH751H-40PT_SOD323-2
DK1
CH751H-40PT_SOD323-2
2
1
RK22 0_0402_5%
short@
RK22 0_0402_5%
short@
1
2
CK1
0.1U_0402_16V7K
CK1
0.1U_0402_16V7K
1 2
RK23
10K_0402_5%
RK23
10K_0402_5%
1
2
RK17 43_0402_1% RK17 43_0402_1%
1
2
RK12 4.7K_0402_5% RK12 4.7K_0402_5%
1
2
CK5 0.1U_0402_16V7K CK5 0.1U_0402_16V7K
1
2
RK4
20K_0402_1%
DIS@
SD034200280
RK4
20K_0402_1%
DIS@
SD034200280
12
R295 1K_0402_5%
@
R295 1K_0402_5%
@
1
2
RK25 0_0402_5% RK25 0_0402_5%
1
2
DK2
CH751H-40PT_SOD323-2
DK2
CH751H-40PT_SOD323-2
2
1
CK7 100P_0402_50V8J CK7 100P_0402_50V8J
1
2
G
D S
QK1
2N7002_SOT23-3
G
D S
QK1
2N7002_SOT23-3
2
1 3
RK27 100K_0402_5% RK27 100K_0402_5%
1
2
RK19 100K_0402_5%
@
RK19 100K_0402_5%
@
1
2
RK24 0_0402_5%
388N@
RK24 0_0402_5%
388N@
1
2
RK7 330K_0402_5% RK7 330K_0402_5%
1
2
RK26 100K_0402_5% RK26 100K_0402_5%
1
2
RK16 0_0402_5%
short@
RK16 0_0402_5%
short@
1
2
RK6 0_0402_5%
short@
RK6 0_0402_5%
short@
1
2
RK4 15K_0402_1% UMA@ SD034150280 RK4 15K_0402_1% UMA@ SD034150280
CK8 4.7U_0603_6.3V6K CK8 4.7U_0603_6.3V6K
1 2
RP12
100K_0804_8P4R_5%
RP12
100K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RK21
10K_0402_5%
RK21
10K_0402_5%
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
20mil
Compal Electronics, Inc.
Board ID control
<PWR>
<DB>RK4 change to 12K ==>for 15" DIS <DB>RK4 change to 0 ===>for 15" UMA
RK4
PV
MV
DB SI
RK4
15K ohm 20k ohm 33k ohm 56k ohm
12k ohm
DIS
27K ohm
43K ohm
0 ohm
15" UMA
2014-11-14: 1. remove GPIO00
2014-11-13: Pin16 from MINI1_LED# to PM_SLP_SUS# Pin29 from PM_SLP_SUS# remove Pin25 from EC_INVT_PWM remove Pin19 from EC_+1.05VS_PG to GPU_HOT# Pin21 from GPU_HOT# to EC_+1.05VS_PG Pin25 from EC_INVT_PWM remove Pin122 from GPU_THERMAL_DET# to PBTN_OUT# Pin123 from X to PM_SLP_S4# Pin18 remove Pin36 remove no support USB CHR
2014-11-13: Pin64 from BOARD_ID to X no support KBL Pin66 from X to BOARD_ID Pin76 Pin97 swap Pin84 from PM_SLP_S4# to USB_ON# Pin68 from +1.05V_VS_PG_PWR to MINI1_LED# Pin70 NC , no support Pin72 NC , no support Pin86 NC , no suppout
2014-11-13: Pin108 from USB_ON# to +1.05V_VS_PG_PWR Pin106 NC , no support 2014-11-18 Pin108 from +1.05V_VS_PG_PWR to VGA_AC_BATT 2014-11-24 Pin108 from VGA_AC_BATT to 1.05V_VS_PG_PWR
DB phase : 20141117
2014-11-24 +1.05VS PU 10K From Power
2014-11-25 Reserve for co-lay Nuvoton NPCE388N
SI:Add EC_SMB_CK3/DA3 for GPU. SI:EC_MUTE# change from 83 to 72.
SI:USB_ON# change from 84 to 86.
2014-12-24 RK24 pull high +1.05VS for Nuvoton NPCE388N. Add RK28 for NPCE388N , for clean power.
SI : Add RK27 for leakage of light
UK1.124 KBC 9012/Nuvoton : +V18R KBC 9022 : +3VALW_EC
PV:RK1,RK3 change to 0-ohm shortpad
PV:RK22,RK9 change to 0-ohm shortpad
PV:RK6,RK15,RK16 change to 0-ohm shortpad
PV:R5178,RK8 change to 0-ohm shortpad
ECAGND
EC_TP_DATA EC_TP_CLK
CLK_PCI_LPC
SYSON EC_BKOFF#
FAN_SPEED1LPC_AD1 PLT_RST#
PCH_RSMRST# SUSP#
SERIRQ EC_RST#LPC_AD2
ECAGND
EC_KBRST#
ADP_I
EC_SCI#
LPC_AD3 LPC_AD0LPC_FRAME#
+EC_VCCA
PM_SLP_S5#
E51TXD_P80DATA
PM_SLP_S3#
E51RXD_P80CLK
EC_RST#
VR_HOT#
KSO1 KSO2 KSO3KSI4 KSI7KSI5 KSI6
ON/OFF# LID_SW #EC_ACINPCH_DPW ROK
PCH_DPW ROK PCH_PW ROK
KSI0 KSI1 KSI2 KSI3 KSO0 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15
EC_ON
EC_SMB_CK2_R EC_SMB_DA2_R
CAP_LOCK# PW R_LED# BAT_CHG_LED WLAN_ON_LED#
H_PROCHOT#_EC
WLAN_OFF_LED#
EC_ACIN
AOAC_PME# EC_PECI
PCH_PW ROK
PCH_PW R_ENVCIN0_PH
NMI_DBG#
BOARD_ID
+3VALW _EC
H_PROCHOT#_EC VCIN1_PHEC_TP_DATA EC_TP_CLK
SUSACK#
PCH_SUSW ARN#
KSO16 KSO17
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2PLT_RST# EC_ON
ADP_ID MAINPWONBT_ON_EC
PLT_RST#
ECAGND
AC_LED#
B/I#
PCH_PW R_EN EC_ACIN
TOUCH_ON#EC_FAN_PW M1
PM_SLP_SUS#
E51TXD_P80DATA
PBTN_OUT#
BOARD_ID ENBKL SYS_PW ROK 1.05V_VS_PG_PW R +V18RTS_GPIO_EC ME_Flash_ENEC_PME#_EC_R
PM_CLKRUN#_R
PBTN_OUT#
PM_SLP_S4#
LID_SW #
EC_SCI#
VGA_AC_BATT
MUTE_LED_OUT
1.05V_VS_PG_PW R
NMI_DBG# GPXIOD06EC_MUTE#
USB_ON#
EC_SMB_CK3 EC_SMB_DA3
MUTE_LED_OUT
LPC_FRAME#
<27,7>
LPC_AD2
<27,7>
LPC_AD0
<27,7>
LPC_AD3
<27,7>
LPC_AD1
<27,7>
EC_SMB_DA1
<46,47>
EC_KBRST#
<7,9>
FAN_SPEED1
<33>
ADP_I <45,47>
PCH_RSMRST# <8>
SYSON <24,49>
CLK_PCI_LPC
<7>
E51RXD_P80CLK
<31>
E51TXD_P80DATA
<31>
PROCHOT# <4>
VR_HOT#
<51>
ON/OFF# <32>
KSO[0..17]
<26>
KSI[0..7]
<26>
SUSP# <24,49,50,53>
SERIRQ
<27,9>
LID_SW # <32>
ACIN <36,47,8>
PM_SLP_S5#
<8>
PM_SLP_S3#
<8>
PLT_RST#
<22,27,31,35,6,8>
EC_SCI#
<9>
EC_BKOFF# <18>
BAT_CHG_LED <45>
EC_ON <48>
EC_SMB_CK2
<18,21,36,7>
EC_SMB_DA2
<18,21,36,7>
PW R_LED# <32> WLAN_ON_LED# <26>
CAP_LOCK# <26>
WLAN_OFF_LED# <26>
AOAC_PME# <8>
H_PECI <4>
PCH_PW ROK
<8>
PCH_PW R_EN <24>
NMI_DBG#_CPU <9>
VCIN0_PH <45>
VCIN1_PH <45>
SUSACK#
<8>
PCH_SUSW ARN#
<8>
EC_SMB_CK1
<46,47>
ECAGND <45>
ADP_ID <45>
MAINPWON <48>
EC_PCIE_W AKE#
<31>
BT_ON_EC <31>
EC_SPI_CLK <7> EC_SPI_CS0# <7>
PCH_DPW ROK <8>
EC_LID_OUT# <9>
EC_BEEP# <23>
AC_LED#
<45>
B/I# <46>
TOUCH_ON# <19>
EC_SPI_SO <7> EC_SPI_SI <7>
EC_FAN_PW M1 <33>
PM_SLP_SUS#
<8>
EC_+1.05VS_PG <6>
MINI1_LED# <31>
PBTN_OUT#
<6,8>
PM_SLP_S4#
<8>
ENBKL <8>
EC_PME# <22,9>
SYS_PW ROK <6,8>
1.05V_VS_PG_PW R <50>
ME_Flash_EN <6>
PM_CLKRUN#
<8>
+3VALW _EC
<45>
+3VS
<12,15,16,18,19,20,21,22,23,24,27,31,32,33,34,35,36
,37,56,6,7,8,9>
+3VL
<28,32,46,47,48,6>
TS_GPIO_EC <19>
TP_CLK <26> TP_DATA <26>
WL_PWREN_EC <29>
VGA_AC_BATT <36>
MUTE_LED_IN
<23>
MUTE_LED_OUT
<26>
GPU_HOT#
<54>
DGPU_PW R_EN <37,54,8,9>
EC_MUTE# <23>
USB_ON# <30,32>
EC_SMB_CK3 <36> EC_SMB_DA3 <36>
+5VS
<19,20,23,24,26,29,33,37,51,54>
+3VALW
+3VALW _EC
+3VALW _EC
+3VALW _EC
+3VL
+3V_EC_VDD
+3VALW _EC
+3VL
+3VALW _EC
+3VS
+3VL
+3VALW _EC
+3VALW _EC +3VS +3VL
+1.05VS
+5VS
+5VS
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
EC ENE-KB9022
Custom
25 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
EC ENE-KB9022
Custom
25 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
EC ENE-KB9022
Custom
25 61
Saturday, January 31, 2015
2011/06/29
2011/06/29
LA-C701P
RK9 0_0402_5%
short@
RK9 0_0402_5%
short@
1
2
CK3 0.1U_0402_16V7K CK3 0.1U_0402_16V7K
1 2
CK4 0.1U_0402_16V7K
ESD@
CK4 0.1U_0402_16V7K
ESD@
1
2
LK2
FBMA-L11-160808-800LMT_0603
LK2
FBMA-L11-160808-800LMT_0603
1
2
RK14
10K_0402_5%
@
RK14
10K_0402_5%
@
1
2
CK6 100P_0402_50V8J CK6 100P_0402_50V8J
1
2
RK8
0_0402_5%
short@
RK8
0_0402_5%
short@
1
2
RK2 100K_0402_1% RK2 100K_0402_1%
12
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface SPI Flash ROM
GPO GPI
UK1
KB9022QD_LQFP128_14X14
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface SPI Flash ROM
GPO GPI
UK1
KB9022QD_LQFP128_14X14
GATEA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ
3
LPC_FRAME#
4
LPC_AD3
5
PM_SLP_S3#/GPIO04
6
LPC_AD2
7
LPC_AD1
8
VCC_LPC
9
LPC_AD0
10
GND
11
CLK_PCI_EC
12
PCIRST#/GPIO05
13
GPIO07
14
GPIO08
15
GPIO0A
16
GPIO0B
17
GPIO0C
18
AC_PRESENT/GPIO0D
19
EC_SCI#/GPIO0E
20
EC_VCCST_PG/GPIO0F
21
VCC
22
BEEP#/GPIO10
23
GND
24
PW M2/GPIO11
25
EC_FAN_PW M/GPIO12
26
AC_OFF/GPIO13
27
FAN_SPEED1/GPIO14
28
FANFB1/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
PCH_PW ROK/GPIO18
32
VCC
33
SUSP_LED#/GPIO19
34
GND
35
NUM_LED#/GPIO1A
36
EC_RST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
VCIN1_BATT_TEMP/AD0/GPIO38
63
VCIN1_BATT_DROP/AD1/GPIO39
64
ADP_I/AD2/GPIO3A
65
AD_BID/AD3/GPIO3B
66
AVCC
67
DA0/GPIO3C
68
AGND
69
EN_DFAN1/DA1/GPIO3D
70
DA2/GPIO3E
71
DA3/GPIO3F
72
EC_CIR_RX/AD6/GPIO40
73
SYS_PW ROK/AD7/GPIO41
74
AD4/GPIO42
75
AD5/GPIO43
76
EC_SMB_CLK1/GPIO44
77
EC_SMB_DAT1/GPIO45
78
EC_SMB_CLK2/GPIO46
79
EC_SMB_DAT2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
EC_MUTE#/PSCLK1/GPIO4A
83
USB_EN#/PSDAT1/GPIO4B
84
PSCLK2/GPIO4C
85
PSDAT2/GPIO4D
86
TP_CLK/GPIO4E
87
TP_DATA/GPIO4F
88
GPIO50
89
BATT_CHG_LED#/GPIO52
90
CAPS_LED#/GPIO53
91
PW R_LED#/GPIO54
92
BATT_LOW _LED#/GPIO55
93
GND
94
SYSON/GPIO56
95
VCC
96
ENKBL/GPXIOA00
97
WOL_EN/GPXIOA01
98
ME_EN/GPXIOA02
99
EC_RSMRST#/GPXIOA03
100
GPXIOA04
101
VCIN1_ADP_PROCHOT/GPXIOA05
102
VCOUT1_PROCHOT#/GPXIOA06
103
VCOUT0_MAIN_PW R_ON/GPXIOA07
104
BKOFF#/GPXIOA08
105
GPXIOA09
106
PCH_PW R_EN/GPXIOA10
107
PW R_VCCST_PG/GPXIOA11
108
VCIN0_PH1/GPXIOD00
109
VCIN1_AC_IN/GPXIOD01
110
VCC0
111
EC_ON/GPXIOD02
112
GND
113
ON/OFF#/GPXIOD03
114
LID_SW #/GPXIOD04
115
SUSP#/GPXIOD05
116
GPXIOD06
117
PECI/GPXIOD07
118
MISO/GPIO5B
119
MOSI/GPIO5C
120
VR_ON/GPIO57
121
PBTN_OUT#/GPIO5D
122
PM_SLP_S4#/GPIO5E
123
V18R/VCC_IO2
124
VCC
125
SPICLK/GPIO58
126
DPW ROK_EC/GPIO59
127
SPICS#/GPIO5A
128
R5178
0_0201_5%
short@
R5178
0_0201_5%
short@
1
2
CK2
0.1U_0402_16V7K
CK2
0.1U_0402_16V7K
1 2
RP11
2.2K_0804_8P4R_5%
RP11
2.2K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RK1
0_0603_5%
short@RK1
0_0603_5%
short@
1
2
RK28 0_0402_5%
9022@
RK28 0_0402_5%
9022@
1
2
RK10
0_0402_5%
@
RK10
0_0402_5%
@
1
2
RK20 100K_0402_5%
@
RK20 100K_0402_5%
@
1
2
RK18 47K_0402_5% RK18 47K_0402_5%
1
2
LK1 FBMA-L11-160808-800LMT_0603 LK1 FBMA-L11-160808-800LMT_0603
1
2
RK3 0_0402_5%
short@
RK3 0_0402_5%
short@
1
2
RK15 0_0402_5%
short@
RK15 0_0402_5%
short@
1
2
RK13 4.7K_0402_5% RK13 4.7K_0402_5%
1
2
DK1
CH751H-40PT_SOD323-2
DK1
CH751H-40PT_SOD323-2
2
1
RK22 0_0402_5%
short@
RK22 0_0402_5%
short@
1
2
CK1
0.1U_0402_16V7K
CK1
0.1U_0402_16V7K
1 2
RK23
10K_0402_5%
RK23
10K_0402_5%
1
2
RK17 43_0402_1% RK17 43_0402_1%
1
2
RK12 4.7K_0402_5% RK12 4.7K_0402_5%
1
2
CK5 0.1U_0402_16V7K CK5 0.1U_0402_16V7K
1
2
RK4
20K_0402_1%
DIS@
SD034200280
RK4
20K_0402_1%
DIS@
SD034200280
12
R295 1K_0402_5%
@
R295 1K_0402_5%
@
1
2
RK25 0_0402_5% RK25 0_0402_5%
1
2
DK2
CH751H-40PT_SOD323-2
DK2
CH751H-40PT_SOD323-2
2
1
CK7 100P_0402_50V8J CK7 100P_0402_50V8J
1
2
G
D S
QK1
2N7002_SOT23-3
G
D S
QK1
2N7002_SOT23-3
2
1 3
RK27 100K_0402_5% RK27 100K_0402_5%
1
2
RK19 100K_0402_5%
@
RK19 100K_0402_5%
@
1
2
RK24 0_0402_5%
388N@
RK24 0_0402_5%
388N@
1
2
RK7 330K_0402_5% RK7 330K_0402_5%
1
2
RK26 100K_0402_5% RK26 100K_0402_5%
1
2
RK16 0_0402_5%
short@
RK16 0_0402_5%
short@
1
2
RK6 0_0402_5%
short@
RK6 0_0402_5%
short@
1
2
RK4 15K_0402_1% UMA@ SD034150280 RK4 15K_0402_1% UMA@ SD034150280
CK8 4.7U_0603_6.3V6K CK8 4.7U_0603_6.3V6K
1 2
RP12
100K_0804_8P4R_5%
RP12
100K_0804_8P4R_5%
1
8
2
7
3
6
4
5
RK21
10K_0402_5%
RK21
10K_0402_5%
1 2
TP Button BD Connector
Keyboard conn
PS2+SMBus
Amber
White
2014-11-24 BOM control
KSI6 KSI4 KSO0KSO9KSI1 KSI2KSI5 KSO5KSI7 KSI3
KSO13 KSO12 KSO11 KSO10
KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2
KSI5 KSI4
KSO1 KSO0
KSI3 KSI2 KSI1 KSI0
KSO15 KSO14
CAP_LOCK# MUTE_LED_OUT
KSI7 KSI6
KSI0WLAN_OFF_LED# WLAN_ON_LED#
CAP_LOCK#
KSO16KSO17
KSO17KSO12KSO4KSI0 KSO8 KSO6 KSO3KSO2 KSO7KSO1 KSO13 KSO11 KSO10 KSO15KSO14 KSO16
KSI[0..7]
<25>
KSO[0..17]
<25>
CAP_LOCK#
<25> MUTE_LED_OUT
<25>
TP_DATA
<25>
TP_CLK
<25>
+3VALW
<12,19,22,24,25,28,29,32,37,48,50,53,56,7>
+5VALW
<15,19,24,29,30,32,34,37,48,49,56>
TP_SMBDATA
<7>
TP_SMBCLK
<7>
WLAN_OFF_LED#
<25>
WLAN_ON_LED# <25>
+5VS +5VS
+3VALW
+3VALW +5VALW
+5VALW
+5VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
KB/TP
B
26 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
KB/TP
B
26 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
KB/TP
B
26 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
JKB1
ACES_50690-0320N-P01
CONN@
SP01001RG00
JKB1
ACES_50690-0320N-P01
CONN@
SP01001RG00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
G1
33
G2
34
C134 470P_0402_50V8J @EMI@ C134 470P_0402_50V8J @EMI@
1 2
R203 3.3K_0402_5% R203 3.3K_0402_5%
1
2
R157 3.3K_0402_5% R157 3.3K_0402_5%
1 2
JTP1 JXT_FP202DH-006M10MCONN@ SP01001YK00JTP1 JXT_FP202DH-006M10MCONN@ SP01001YK00
2
2
4
4
1
1
3
3
G1
7
G2
8
5
5
6
6
C193 100P_0402_50V8J
ESD@
C193 100P_0402_50V8J
ESD@
1
2
CC123 100P_0402_50V8J ESD@CC123 100P_0402_50V8J ESD@
1 2
R158 3.3K_0402_5% R158 3.3K_0402_5%
1 2
R207 3.3K_0402_5% R207 3.3K_0402_5%
1
2
DM5 YSLC05CH_SOT23-3 SCA00000U10 @ESD@DM5 YSLC05CH_SOT23-3 SCA00000U10 @ESD@
1
2
3
CC122 100P_0402_50V8J ESD@CC122 100P_0402_50V8J ESD@
1 2
Keyboard conn
PS2+SMBus
Amber
White
2014-11-24 BOM control
KSI6 KSI4 KSO0KSO9KSI1 KSI2KSI5 KSO5KSI7 KSI3
KSO13 KSO12 KSO11 KSO10
KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2
KSI5 KSI4
KSO1 KSO0
KSI3 KSI2 KSI1 KSI0
KSO15 KSO14
CAP_LOCK# MUTE_LED_OUT
KSI7 KSI6
KSI0WLAN_OFF_LED# WLAN_ON_LED#
CAP_LOCK#
KSO16KSO17
KSO17KSO12KSO4KSI0 KSO8 KSO6 KSO3KSO2 KSO7KSO1 KSO13 KSO11 KSO10 KSO15KSO14 KSO16
KSI[0..7]
<25>
KSO[0..17]
<25>
CAP_LOCK#
<25> MUTE_LED_OUT
<25>
TP_DATA
<25>
TP_CLK
<25>
+3VALW
<12,19,22,24,25,28,29,32,37,48,50,53,56,7>
+5VALW
<15,19,24,29,30,32,34,37,48,49,56>
TP_SMBDATA
<7>
TP_SMBCLK
<7>
WLAN_OFF_LED#
<25>
WLAN_ON_LED# <25>
+5VS +5VS
+3VALW
+3VALW +5VALW
+5VALW
+5VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
KB/TP
B
26 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
KB/TP
B
26 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
KB/TP
B
26 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
JKB1
ACES_50690-0320N-P01
CONN@
SP01001RG00
JKB1
ACES_50690-0320N-P01
CONN@
SP01001RG00
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
G1
33
G2
34
C134 470P_0402_50V8J @EMI@ C134 470P_0402_50V8J @EMI@
1 2
R203 3.3K_0402_5% R203 3.3K_0402_5%
1
2
R157 3.3K_0402_5% R157 3.3K_0402_5%
1 2
JTP1 JXT_FP202DH-006M10MCONN@ SP01001YK00JTP1 JXT_FP202DH-006M10MCONN@ SP01001YK00
2
2
4
4
1
1
3
3
G1
7
G2
8
5
5
6
6
C193 100P_0402_50V8J
ESD@
C193 100P_0402_50V8J
ESD@
1
2
CC123 100P_0402_50V8J ESD@CC123 100P_0402_50V8J ESD@
1 2
R158 3.3K_0402_5% R158 3.3K_0402_5%
1 2
R207 3.3K_0402_5% R207 3.3K_0402_5%
1
2
DM5 YSLC05CH_SOT23-3 SCA00000U10 @ESD@DM5 YSLC05CH_SOT23-3 SCA00000U10 @ESD@
1
2
3
CC122 100P_0402_50V8J ESD@CC122 100P_0402_50V8J ESD@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
TPM2.0
SLB9665 (SA00007XU00 )-->TPM2.0 SLB9660 (SA00007AB00 ) -->TPM1.2
Screw Hole
Change to NPTH
PLT_RST#
+3VS_TPM
LPC_AD0
<25,7>
LPC_AD1
<25,7>
LPC_AD2
<25,7>
LPC_AD3
<25,7>
LPC_FRAME#
<25,7>
PLT_RST#
<22,25,31,35,6,8>
SERIRQ
<25,9>
CLK_PCI_TPM
<7>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,31,32,33,34,35,36
,37,56,6,7,8,9>
+3VS_TPM
+3VS
+3VS
GNDA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
TPM/Screw
27 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
TPM/Screw
27 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
TPM/Screw
27 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
H6 HOLEAH_2P5
@
H6 HOLEAH_2P5
@
1
H8 HOLEAH_2P4N
@
H8 HOLEAH_2P4N
@
1
U4 SLB9665TT2.0-FW-5.00_TSSOP28
TPM@
U4 SLB9665TT2.0-FW-5.00_TSSOP28
TPM@
NC
1
NC
2
NC
3
GND
4
VDD
5
GPIO
6
PP
7
NC
8
NC
9
VDD
10
GND
11
NC
12
NC
13
NC
14
NC
15
LRESET#
16
LAD3
17
GND
18
VDD
19
LAD2
20
LCLK
21
LFRAME#
22
LAD1
23
VDD
24
GND
25
LAD0
26
SERIRQ
27
NC
28
H7 HOLEAH_2P5
@
H7 HOLEAH_2P5
@
1
H18 HOLEAH_3P0X2P4N
@
H18 HOLEAH_3P0X2P4N
@
1
C34
0.1U_0402_16V4Z
@
C34
0.1U_0402_16V4Z
@
1 2
FD2
@
FIDUCIAL_C40M80
FD2
@
FIDUCIAL_C40M80
1
H11 HOLEAH_5P0
@
H11 HOLEAH_5P0
@
1
H12 HOLEAH_2P8
@
H12 HOLEAH_2P8
@
1
C35
0.1U_0402_16V4Z
TPM@
C35
0.1U_0402_16V4Z
TPM@
1 2
R29 4.7K_0402_5%
@
R29 4.7K_0402_5%
@
1
2
FD4
@
FIDUCIAL_C40M80
FD4
@
FIDUCIAL_C40M80
1
H5 HOLEAH_2P5
@
H5 HOLEAH_2P5
@
1
H1 HOLEAH_2P5
@
H1 HOLEAH_2P5
@
1
R26 0_0402_5%
TPM@
R26 0_0402_5%
TPM@
1
2
H15 HOLEAH_5P0
@
H15 HOLEAH_5P0
@
1
H2 HOLEAH_2P5
@
H2 HOLEAH_2P5
@
1
H10 HOLEAH_5P0
@
H10 HOLEAH_5P0
@
1
H19 HOLEAH_3P0X2P4N
@
H19 HOLEAH_3P0X2P4N
@
1
H17 HOLEAH_5P0
@
H17 HOLEAH_5P0
@
1
H4 HOLEAH_2P5
@
H4 HOLEAH_2P5
@
1
FD3
@
FIDUCIAL_C40M80
FD3
@
FIDUCIAL_C40M80
1
C36
0.1U_0402_16V4Z
@
C36
0.1U_0402_16V4Z
@
1 2
H14 HOLEAH_2P8
@
H14 HOLEAH_2P8
@
1
H16 HOLEAH_5P0
@
H16 HOLEAH_5P0
@
1
R28
0_0402_5%
TPM@
R28
0_0402_5%
TPM@
1
2
FD1
@
FIDUCIAL_C40M80
FD1
@
FIDUCIAL_C40M80
1
R31 4.7K_0402_5%
TPM@
R31 4.7K_0402_5%
TPM@
1 2
H9 HOLEAH_5P0
@
H9 HOLEAH_5P0
@
1
H3 HOLEAH_2P8
@
H3 HOLEAH_2P8
@
1
R27
4.7K_0402_5% @
R27
4.7K_0402_5% @
1
2
C37
0.1U_0402_16V4Z
@
C37
0.1U_0402_16V4Z
@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
TPM2.0
SLB9665 (SA00007XU00 )-->TPM2.0 SLB9660 (SA00007AB00 ) -->TPM1.2
Screw Hole
Change to NPTH
PLT_RST#
+3VS_TPM
LPC_AD0
<25,7>
LPC_AD1
<25,7>
LPC_AD2
<25,7>
LPC_AD3
<25,7>
LPC_FRAME#
<25,7>
PLT_RST#
<22,25,31,35,6,8>
SERIRQ
<25,9>
CLK_PCI_TPM
<7>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,31,32,33,34,35,36
,37,56,6,7,8,9>
+3VS_TPM
+3VS
+3VS
GNDA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
TPM/Screw
27 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
TPM/Screw
27 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
TPM/Screw
27 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
H6 HOLEAH_2P5
@
H6 HOLEAH_2P5
@
1
H8 HOLEAH_2P4N
@
H8 HOLEAH_2P4N
@
1
U4 SLB9665TT2.0-FW-5.00_TSSOP28
TPM@
U4 SLB9665TT2.0-FW-5.00_TSSOP28
TPM@
NC
1
NC
2
NC
3
GND
4
VDD
5
GPIO
6
PP
7
NC
8
NC
9
VDD
10
GND
11
NC
12
NC
13
NC
14
NC
15
LRESET#
16
LAD3
17
GND
18
VDD
19
LAD2
20
LCLK
21
LFRAME#
22
LAD1
23
VDD
24
GND
25
LAD0
26
SERIRQ
27
NC
28
H7 HOLEAH_2P5
@
H7 HOLEAH_2P5
@
1
H18 HOLEAH_3P0X2P4N
@
H18 HOLEAH_3P0X2P4N
@
1
C34
0.1U_0402_16V4Z
@
C34
0.1U_0402_16V4Z
@
1 2
FD2
@
FIDUCIAL_C40M80
FD2
@
FIDUCIAL_C40M80
1
H11 HOLEAH_5P0
@
H11 HOLEAH_5P0
@
1
H12 HOLEAH_2P8
@
H12 HOLEAH_2P8
@
1
C35
0.1U_0402_16V4Z
TPM@
C35
0.1U_0402_16V4Z
TPM@
1 2
R29 4.7K_0402_5%
@
R29 4.7K_0402_5%
@
1
2
FD4
@
FIDUCIAL_C40M80
FD4
@
FIDUCIAL_C40M80
1
H5 HOLEAH_2P5
@
H5 HOLEAH_2P5
@
1
H1 HOLEAH_2P5
@
H1 HOLEAH_2P5
@
1
R26 0_0402_5%
TPM@
R26 0_0402_5%
TPM@
1
2
H15 HOLEAH_5P0
@
H15 HOLEAH_5P0
@
1
H2 HOLEAH_2P5
@
H2 HOLEAH_2P5
@
1
H10 HOLEAH_5P0
@
H10 HOLEAH_5P0
@
1
H19 HOLEAH_3P0X2P4N
@
H19 HOLEAH_3P0X2P4N
@
1
H17 HOLEAH_5P0
@
H17 HOLEAH_5P0
@
1
H4 HOLEAH_2P5
@
H4 HOLEAH_2P5
@
1
FD3
@
FIDUCIAL_C40M80
FD3
@
FIDUCIAL_C40M80
1
C36
0.1U_0402_16V4Z
@
C36
0.1U_0402_16V4Z
@
1 2
H14 HOLEAH_2P8
@
H14 HOLEAH_2P8
@
1
H16 HOLEAH_5P0
@
H16 HOLEAH_5P0
@
1
R28
0_0402_5%
TPM@
R28
0_0402_5%
TPM@
1
2
FD1
@
FIDUCIAL_C40M80
FD1
@
FIDUCIAL_C40M80
1
R31 4.7K_0402_5%
TPM@
R31 4.7K_0402_5%
TPM@
1 2
H9 HOLEAH_5P0
@
H9 HOLEAH_5P0
@
1
H3 HOLEAH_2P8
@
H3 HOLEAH_2P8
@
1
R27
4.7K_0402_5% @
R27
4.7K_0402_5% @
1
2
C37
0.1U_0402_16V4Z
@
C37
0.1U_0402_16V4Z
@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Depop if GCLK with UMA
<CPU> YC1 P6 <LAN> YL1 P22 <CPU> YC2 P7 <GPU> Y6 P37
Intel ULT UMA Intel ULT Dis
SLG3NB3455VTR SA00008IQ00 SLG3NB3456VTR SA00008J800
Platform Silego P/N Compal PN 25MHz(A) 32.768KHz 24MHz(B) 27 Base on A32 32.768KHz use 10ppm, G-CLK 25MHz X'TAL use 10ppm.
111 1111
XX
X
BOM control
@ DIS@
<SI> Change CG59 to 12pf , CG58 to 15pf recommend by vender
Change RG109 to 10 ohm recommend by vender
Layout notes For isolated GreenCLK tail RG110 close to Y6 (27M for GPU) RG112 close to YL1 (25M for LAN) RG115 close to YC1 (32.768k for CPU) RG116 close to YC2 (24M for CPU)
L
L
Layout notes Place CG57 between UGCLK1 and RG109 Reserve CG55 for vendor Place between UGCLK1 and
RG113
20141120 add RG115 RG116 isolated GreenCLKtail from vendor suggest
L
Layout notes Please place RG114, RG109, RG111 and RG113 close to
UGCLK1 for Impedance matching.
20141120 vendor recommend 1. AMD GPU power rail should be 1.8V, please modify
+3VS_VGA to AMD GPU power rail.
2. CG47, CG48, CG49, CG50 and CG51 must placed clos
e to UGCLK1.11, UGCLK1.3, UGCLK1.8, UGCLK1.15 and U
GCLK1.2.
3. Please place RG114, RG109, RG111 and RG113 close
to UGCLK1 for Impedance matching.
4. Modify RG114 Symbol from @ to GCLK@. 5. Change RG109 value from 33ohm to 10ohm. 6. We recommend to add RGxxx and RGyyy for isolated
32.768k and 24M clock tail.
7. We recommend to add CGxx, it is reserved for EMI
.
8. We recommend to change CG54 Symbol from GCLK@ to
@.
L
Layout notes CG47 Close UGCLK1.11 CG48 Close UGCLK1.13 CG49 Close UGCLK1.8 CG50 Close UGCLK1.15 CG41 Close UGCLK1.2
SI phase 20141225 Change YG1 PN to SJ10000FO00
PCH_X1_R
CLK_X2CLK_X1
RTC_VOUT
GCLK_VRTC
XT ALIN_R
PCH_X1_R_R
XT LI_R
VGA_X1_R
CLK_X2
PCH_RT CX1_R
CLK_X1
PCH_X1_R
PCH_RT CX1_R_R
VGA_X1_R LAN_X1_R
XT LO_R <22> XT ALIN <36>
+1.8VS_VGA
<36,37,38,56>
+1.05VS
<11,12,24,25,34,37,50,51>
+LAN_VDD_3V3
<22>
+3VL
<25,32,46,47,48,6>
+3VALW
<12,19,22,24,25,26,29,32,37,48,50,53,56,7>
+RTCBATT
<6>
+RTCVCC
<12,6,8>
PCH_RT CX1 <6> CPU_XTAL24_IN <7>
+3VL +1.05VS
+1.8VS_VGA
+LAN_VDD_3V3
+RTCBATT
+RTCVCC
+3VALW
+3VL
+1.05VS
+1.8VS_VGA
+LAN_VDD_3V3
+3VALW
+1.8VS_VGA +1.05VS +LAN_VDD_3V3 +3VL +3VALW +RTCBATT +RTCVCC
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
GCLK
61
Saturday, January 31, 2015
2013/06/10
2014/07/01
Compal Electronics, Inc.
28
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
GCLK
61
Saturday, January 31, 2015
2013/06/10
2014/07/01
Compal Electronics, Inc.
28
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
GCLK
61
Saturday, January 31, 2015
2013/06/10
2014/07/01
Compal Electronics, Inc.
28
UGCLK1 S IC SLG3NB3455VT R T QFN 16P CRYST AL @ SA00008IQ00 UGCLK1 S IC SLG3NB3455VT R T QFN 16P CRYST AL @ SA00008IQ00
RG112 0_0402_5%
DIS@
RG112 0_0402_5%
DIS@
1
2
RG111
33_0402_5%
DIS@ RG111
33_0402_5%
DIS@
1
2
CG52
22U_0805_6.3V6M
DIS@
CG52
22U_0805_6.3V6M
DIS@
1 2
RG116 0_0402_5% DIS@ RG116 0_0402_5% DIS@
1
2
CG58 15P_0402_50V8J
DIS@
CG58 15P_0402_50V8J
DIS@
12
CG54 5P_0402_50V8C @CG54 5P_0402_50V8C @
1 2
CG53
2.2U_0603_6.3V6K
DIS@
CG53
2.2U_0603_6.3V6K
DIS@
1 2
RG114 0_0402_5% DIS@ RG114 0_0402_5% DIS@
1
2
CG49
0.1U_0402_10V7K
DIS@ CG49
0.1U_0402_10V7K
DIS@
1 2
UGCLK1
S IC SLG3NB3456VT R T QFN 16P CRYST AL
DIS@
SA00008J800
UGCLK1
S IC SLG3NB3456VT R T QFN 16P CRYST AL
DIS@
SA00008J800
XT AL_IN
1
VD D
2
VD D IO_25M_B
3
GND1
4
25MHz_B
5
25MHz_A
6
GND2
7
VD D IO_25M_A
8
32kHz
9
VBAT
10
VD D IO_27M
11
27MHz
12
GND3
13
VD D _R T C _OU T
14
+V3.3A
15
XT AL_OU T
16
GND4
17
CG48
0.1U_0402_10V7K
DIS@ CG48
0.1U_0402_10V7K
DIS@
1 2
RG109 10_0402_5% DIS@ RG109 10_0402_5% DIS@
1
2
CG51
0.1U_0402_10V7K
DIS@ CG51
0.1U_0402_10V7K
DIS@
1 2
CG59 12P_0402_50V8J
DIS@
CG59 12P_0402_50V8J
DIS@
12
CG47
0.1U_0402_10V7K
DIS@
CG47
0.1U_0402_10V7K
DIS@
1 2
RG113 0_0402_5%
DIS@
RG113 0_0402_5%
DIS@
1
2
CG57 5P_0402_50V8C @CG57 5P_0402_50V8C @
1 2
RG106 330_0402_5%
DIS@
RG106 330_0402_5%
DIS@
1 2
RG115 0_0402_5% DIS@ RG115 0_0402_5% DIS@
1
2
CG50
0.1U_0402_10V7K
DIS@ CG50
0.1U_0402_10V7K
DIS@
1 2
CG55 5P_0402_50V8C @CG55 5P_0402_50V8C @
1 2
YG1
DIS@
S CRYST AL 25MHZ 12PF +-10PPM RP25000099 SJ10000FO00 YG1
DIS@
S CRYST AL 25MHZ 12PF +-10PPM RP25000099 SJ10000FO00
GND
4
IN
1
OUT
3
GND
2
RG107 0_0402_5%
@
RG107 0_0402_5%
@
1 2
RG110 0_0402_5%
DIS@
RG110 0_0402_5%
DIS@
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Depop if GCLK with UMA
<CPU> YC1 P6 <LAN> YL1 P22 <CPU> YC2 P7 <GPU> Y6 P37
Intel ULT UMA Intel ULT Dis
SLG3NB3455VTR SA00008IQ00 SLG3NB3456VTR SA00008J800
Platform Silego P/N Compal PN 25MHz(A) 32.768KHz 24MHz(B) 27 Base on A32 32.768KHz use 10ppm, G-CLK 25MHz X'TAL use 10ppm.
111 1111
XX
X
BOM control
@ DIS@
<SI> Change CG59 to 12pf , CG58 to 15pf recommend by vender
Change RG109 to 10 ohm recommend by vender
Layout notes For isolated GreenCLK tail RG110 close to Y6 (27M for GPU) RG112 close to YL1 (25M for LAN) RG115 close to YC1 (32.768k for CPU) RG116 close to YC2 (24M for CPU)
L
L
Layout notes Place CG57 between UGCLK1 and RG109 Reserve CG55 for vendor Place between UGCLK1 and
RG113
20141120 add RG115 RG116 isolated GreenCLKtail from vendor suggest
L
Layout notes Please place RG114, RG109, RG111 and RG113 close to
UGCLK1 for Impedance matching.
20141120 vendor recommend 1. AMD GPU power rail should be 1.8V, please modify
+3VS_VGA to AMD GPU power rail.
2. CG47, CG48, CG49, CG50 and CG51 must placed clos
e to UGCLK1.11, UGCLK1.3, UGCLK1.8, UGCLK1.15 and U
GCLK1.2.
3. Please place RG114, RG109, RG111 and RG113 close
to UGCLK1 for Impedance matching.
4. Modify RG114 Symbol from @ to GCLK@. 5. Change RG109 value from 33ohm to 10ohm. 6. We recommend to add RGxxx and RGyyy for isolated
32.768k and 24M clock tail.
7. We recommend to add CGxx, it is reserved for EMI
.
8. We recommend to change CG54 Symbol from GCLK@ to
@.
L
Layout notes CG47 Close UGCLK1.11 CG48 Close UGCLK1.13 CG49 Close UGCLK1.8 CG50 Close UGCLK1.15 CG41 Close UGCLK1.2
SI phase 20141225 Change YG1 PN to SJ10000FO00
PCH_X1_R
CLK_X2CLK_X1
RTC_VOUT
GCLK_VRTC
XT ALIN_R
PCH_X1_R_R
XT LI_R
VGA_X1_R
CLK_X2
PCH_RT CX1_R
CLK_X1
PCH_X1_R
PCH_RT CX1_R_R
VGA_X1_R LAN_X1_R
XT LO_R <22> XT ALIN <36>
+1.8VS_VGA
<36,37,38,56>
+1.05VS
<11,12,24,25,34,37,50,51>
+LAN_VDD_3V3
<22>
+3VL
<25,32,46,47,48,6>
+3VALW
<12,19,22,24,25,26,29,32,37,48,50,53,56,7>
+RTCBATT
<6>
+RTCVCC
<12,6,8>
PCH_RT CX1 <6> CPU_XTAL24_IN <7>
+3VL +1.05VS
+1.8VS_VGA
+LAN_VDD_3V3
+RTCBATT
+RTCVCC
+3VALW
+3VL
+1.05VS
+1.8VS_VGA
+LAN_VDD_3V3
+3VALW
+1.8VS_VGA +1.05VS +LAN_VDD_3V3 +3VL +3VALW +RTCBATT +RTCVCC
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
GCLK
61
Saturday, January 31, 2015
2013/06/10
2014/07/01
Compal Electronics, Inc.
28
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
GCLK
61
Saturday, January 31, 2015
2013/06/10
2014/07/01
Compal Electronics, Inc.
28
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
GCLK
61
Saturday, January 31, 2015
2013/06/10
2014/07/01
Compal Electronics, Inc.
28
UGCLK1 S IC SLG3NB3455VT R T QFN 16P CRYST AL @ SA00008IQ00 UGCLK1 S IC SLG3NB3455VT R T QFN 16P CRYST AL @ SA00008IQ00
RG112 0_0402_5%
DIS@
RG112 0_0402_5%
DIS@
1
2
RG111
33_0402_5%
DIS@ RG111
33_0402_5%
DIS@
1
2
CG52
22U_0805_6.3V6M
DIS@
CG52
22U_0805_6.3V6M
DIS@
1 2
RG116 0_0402_5% DIS@ RG116 0_0402_5% DIS@
1
2
CG58 15P_0402_50V8J
DIS@
CG58 15P_0402_50V8J
DIS@
12
CG54 5P_0402_50V8C @CG54 5P_0402_50V8C @
1 2
CG53
2.2U_0603_6.3V6K
DIS@
CG53
2.2U_0603_6.3V6K
DIS@
1 2
RG114 0_0402_5% DIS@ RG114 0_0402_5% DIS@
1
2
CG49
0.1U_0402_10V7K
DIS@ CG49
0.1U_0402_10V7K
DIS@
1 2
UGCLK1
S IC SLG3NB3456VT R T QFN 16P CRYST AL
DIS@
SA00008J800
UGCLK1
S IC SLG3NB3456VT R T QFN 16P CRYST AL
DIS@
SA00008J800
XT AL_IN
1
VD D
2
VD D IO_25M_B
3
GND1
4
25MHz_B
5
25MHz_A
6
GND2
7
VD D IO_25M_A
8
32kHz
9
VBAT
10
VD D IO_27M
11
27MHz
12
GND3
13
VD D _R T C _OU T
14
+V3.3A
15
XT AL_OU T
16
GND4
17
CG48
0.1U_0402_10V7K
DIS@ CG48
0.1U_0402_10V7K
DIS@
1 2
RG109 10_0402_5% DIS@ RG109 10_0402_5% DIS@
1
2
CG51
0.1U_0402_10V7K
DIS@ CG51
0.1U_0402_10V7K
DIS@
1 2
CG59 12P_0402_50V8J
DIS@
CG59 12P_0402_50V8J
DIS@
12
CG47
0.1U_0402_10V7K
DIS@
CG47
0.1U_0402_10V7K
DIS@
1 2
RG113 0_0402_5%
DIS@
RG113 0_0402_5%
DIS@
1
2
CG57 5P_0402_50V8C @CG57 5P_0402_50V8C @
1 2
RG106 330_0402_5%
DIS@
RG106 330_0402_5%
DIS@
1 2
RG115 0_0402_5% DIS@ RG115 0_0402_5% DIS@
1
2
CG50
0.1U_0402_10V7K
DIS@ CG50
0.1U_0402_10V7K
DIS@
1 2
CG55 5P_0402_50V8C @CG55 5P_0402_50V8C @
1 2
YG1
DIS@
S CRYST AL 25MHZ 12PF +-10PPM RP25000099 SJ10000FO00 YG1
DIS@
S CRYST AL 25MHZ 12PF +-10PPM RP25000099 SJ10000FO00
GND
4
IN
1
OUT
3
GND
2
RG107 0_0402_5%
@
RG107 0_0402_5%
@
1 2
RG110 0_0402_5%
DIS@
RG110 0_0402_5%
DIS@
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
2.5" SATA HDD 2.5" SATA ODD
SI : Change HDD pin define. Follow Cocoa. 12/25
HDD power on sub board.
ODD power on sub board.
SI : ESD request.
PV : Change R201,R202 to 0-ohm shortpad. 20150125
SATA_PRX_C_DTX_P0 SATA_PRX_C_DTX_N0 SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_P1 SATA_PRX_C_DTX_N1 SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1 ODD_PLUG#_R
SATA_PTX_DRX_N0
<6>
SATA_PTX_DRX_P0
<6>
SATA_PRX_DTX_N0
<6>
SATA_PRX_DTX_P0
<6>
ODD_PLUG#
<6>
SATA_PTX_DRX_N1
<6>
SATA_PTX_DRX_P1
<6>
SATA_PRX_DTX_N1
<6>
SATA_PRX_DTX_P1
<6>
ODD_DA#
<9>
+5VS
<19,20,23,24,25,26,33,37,51,54>
+5VALW
<15,19,24,26,30,32,34,37,48,49,56>
ODD_PWR
<9>
WL_PWREN_EC
<25>
+3VALW
<12,19,22,24,25,26,28,32,37,48,50,53,56,7>
+3VS_WLAN_R
<31>
+5VS_HDD1
+5VS
+5VS_HDD1
+5VS +5VALW
+5VS_ODD
+5VS
+5VALW
+3VALW
+3VS_WLAN_R
+5VS_ODD
+3VALW +3VS_WLAN_R
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
HDD/ODD Conn
B
29 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
HDD/ODD Conn
B
29 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
HDD/ODD Conn
B
29 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
C154 0.01U_0402_16V7K C154 0.01U_0402_16V7K
1
2
C229
10U_0603_6.3V6M
@
C229
10U_0603_6.3V6M
@
1 2
CS14 0.01U_0402_16V7K CS14 0.01U_0402_16V7K
1
2
C227
10U_0603_6.3V6M
C227
10U_0603_6.3V6M
1 2
C156 0.01U_0402_16V7K C156 0.01U_0402_16V7K
1
2
C224
1U_0603_10V4Z
C224
1U_0603_10V4Z
1 2
CS11 0.01U_0402_16V7K CS11 0.01U_0402_16V7K
1
2
C44 0.1U_0402_25V6
ESD@
C44 0.1U_0402_25V6
ESD@
1 2
C223
1U_0603_10V4Z
C223
1U_0603_10V4Z
1 2
CS15 0.01U_0402_16V7K CS15 0.01U_0402_16V7K
1
2
CS18 0.01U_0402_16V7K CS18 0.01U_0402_16V7K
1
2
C226 560P_0402_50V7K C226 560P_0402_50V7K 1
2
JODD
ACES_51524-0100N-001
SP01001AI00
CONN@ JODD
ACES_51524-0100N-001
SP01001AI00
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
C155 0.01U_0402_16V7K C155 0.01U_0402_16V7K
1
2
C230 100P_0402_50V8J C230 100P_0402_50V8J
1
2
JHDD
ACES_51524-0080N-001
SP01001A900
CONN@ JHDD
ACES_51524-0080N-001
SP01001A900
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1
9
G2
10
R201 0_0805_5%
short@
R201 0_0805_5%
short@
1
2
RC126 0_0201_5%
short@
RC126 0_0201_5%
short@
1
2
EM5209VF DFN 14PU20 SA00007PM00 EM5209VF DFN 14PU20 SA00007PM00
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
R202 0_0805_5%
short@
R202 0_0805_5%
short@
1
2
C153 0.01U_0402_16V7K C153 0.01U_0402_16V7K
1
2
C228
10U_0603_6.3V6M
C228
10U_0603_6.3V6M
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
2.5" SATA HDD 2.5" SATA ODD
SI : Change HDD pin define. Follow Cocoa. 12/25
HDD power on sub board.
ODD power on sub board.
SI : ESD request.
PV : Change R201,R202 to 0-ohm shortpad. 20150125
SATA_PRX_C_DTX_P0 SATA_PRX_C_DTX_N0 SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_P1 SATA_PRX_C_DTX_N1 SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1 ODD_PLUG#_R
SATA_PTX_DRX_N0
<6>
SATA_PTX_DRX_P0
<6>
SATA_PRX_DTX_N0
<6>
SATA_PRX_DTX_P0
<6>
ODD_PLUG#
<6>
SATA_PTX_DRX_N1
<6>
SATA_PTX_DRX_P1
<6>
SATA_PRX_DTX_N1
<6>
SATA_PRX_DTX_P1
<6>
ODD_DA#
<9>
+5VS
<19,20,23,24,25,26,33,37,51,54>
+5VALW
<15,19,24,26,30,32,34,37,48,49,56>
ODD_PWR
<9>
WL_PWREN_EC
<25>
+3VALW
<12,19,22,24,25,26,28,32,37,48,50,53,56,7>
+3VS_WLAN_R
<31>
+5VS_HDD1
+5VS
+5VS_HDD1
+5VS +5VALW
+5VS_ODD
+5VS
+5VALW
+3VALW
+3VS_WLAN_R
+5VS_ODD
+3VALW +3VS_WLAN_R
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
HDD/ODD Conn
B
29 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
HDD/ODD Conn
B
29 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
HDD/ODD Conn
B
29 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
C154 0.01U_0402_16V7K C154 0.01U_0402_16V7K
1
2
C229
10U_0603_6.3V6M
@
C229
10U_0603_6.3V6M
@
1 2
CS14 0.01U_0402_16V7K CS14 0.01U_0402_16V7K
1
2
C227
10U_0603_6.3V6M
C227
10U_0603_6.3V6M
1 2
C156 0.01U_0402_16V7K C156 0.01U_0402_16V7K
1
2
C224
1U_0603_10V4Z
C224
1U_0603_10V4Z
1 2
CS11 0.01U_0402_16V7K CS11 0.01U_0402_16V7K
1
2
C44 0.1U_0402_25V6
ESD@
C44 0.1U_0402_25V6
ESD@
1 2
C223
1U_0603_10V4Z
C223
1U_0603_10V4Z
1 2
CS15 0.01U_0402_16V7K CS15 0.01U_0402_16V7K
1
2
CS18 0.01U_0402_16V7K CS18 0.01U_0402_16V7K
1
2
C226 560P_0402_50V7K C226 560P_0402_50V7K 1
2
JODD
ACES_51524-0100N-001
SP01001AI00
CONN@ JODD
ACES_51524-0100N-001
SP01001AI00
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
C155 0.01U_0402_16V7K C155 0.01U_0402_16V7K
1
2
C230 100P_0402_50V8J C230 100P_0402_50V8J
1
2
JHDD
ACES_51524-0080N-001
SP01001A900
CONN@ JHDD
ACES_51524-0080N-001
SP01001A900
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1
9
G2
10
R201 0_0805_5%
short@
R201 0_0805_5%
short@
1
2
RC126 0_0201_5%
short@
RC126 0_0201_5%
short@
1
2
EM5209VF DFN 14PU20 SA00007PM00 EM5209VF DFN 14PU20 SA00007PM00
GND
11
VIN2
6
VBIAS
4
ON2
5
VOUT2
9
VIN2
7
CT1
12
VOUT1
14
VOUT2
8
VOUT1
13
VIN1
2
ON1
3
VIN1
1
CT2
10
GPAD
15
R202 0_0805_5%
short@
R202 0_0805_5%
short@
1
2
C153 0.01U_0402_16V7K C153 0.01U_0402_16V7K
1
2
C228
10U_0603_6.3V6M
C228
10U_0603_6.3V6M
1 2
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
USB2.0/USB3.0 port 1
W=100mils
W=100mils
USB2.0 port x 1
LM1,LM2 2nd : SM070003K00
LM3 2nd : SM070002J00
LM5 2nd : SM070002J00
DB Phase add CS22 reserve 20141113
USB3.0 need support 3.5A change USB PWR SW SA00007AO00 low active
SI Phase:Add CS22,CS4 20141226
SI : pop DM2.
USB3TXDP0_C_R USB3TXDN0_C_R USB3RXDN0_C USB3RXDP0_C
USB20_P0_C USB20_N0_C
USB3TXDP0_C_RUSB3RXDN0_C USB3TXDN0_C_R USB3RXDP0_C
USB20_N0_CUSB20_P0_C
USB_ON#
USB20_P1_CUSB20_N1_C
USB20_P1_C USB20_N1_C
USB3TXDP0_C_R USB3TXDN0_C_R USB3RXDN0_C USB3RXDP0_CUSB20_N0_C USB20_P0_C
USB20_N1_C USB20_P1_C
USB3RXDN0_C
USB3RXDP0_C
USB3TXDP0_C_R
USB3_TX0_PUSB3_TX0_N
USB3_TX0_C_N
USB3TXDN0_C_R
USB3_TX0_C_P
USB_ON#
<25,32>
USB20_N0
<10>
USB20_P0
<10>
USB20_P1
<10>
USB20_N1
<10>
+5VALW
<15,19,24,26,29,32,34,37,48,49,56>
USB3_RX0_P
<10>
USB3_RX0_N
<10>
USB3_TX0_P
<10>
USB3_TX0_N
<10>
+5VALW
+USB_VCCA
+USB_VCCA
+USB_VCCA
+5VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
USB 3.0/2.0 conn
B
30 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
USB 3.0/2.0 conn
B
30 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
USB 3.0/2.0 conn
B
30 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
+
CS22
150U_B2_6.3VM_R45M
SGA00002N80
+
CS22
150U_B2_6.3VM_R45M
SGA00002N80
1 2
LM1
CMMI21T-900Y-N
SM070003K00 @EMI@
LM1
CMMI21T-900Y-N
SM070003K00 @EMI@
1
1
4
4
3
3
2
2
RS4
0_0402_5%
@
RS4
0_0402_5%
@
1
2
LM2CMMI21T-900Y-N
SM070003K00
@EMI@
LM2CMMI21T-900Y-N
SM070003K00
@EMI@
1
1
4
4
3
3
2
2
CS3 0.1U_0402_16V7K CS3 0.1U_0402_16V7K
1 2
RS6 0_0402_5% RS6 0_0402_5%
1
2
DM1 YSLC05CH_SOT23-3
SCA00000U10
@ESD@ DM1 YSLC05CH_SOT23-3
SCA00000U10
@ESD@
1
2 3
CS2
0.1U_0402_16V7K
CS2
0.1U_0402_16V7K
1
2
RS15 0_0402_5%
@EMI@
RS15 0_0402_5%
@EMI@
1
2
LM5
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
LM5
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
RS2 0_0402_5% RS2 0_0402_5%
1
2
RS7 0_0402_5%
@EMI@
RS7 0_0402_5%
@EMI@
1
2
JUSB1 TAITW_PUBAU1-09FLBS1NN4H0
CONN@
JUSB1 TAITW_PUBAU1-09FLBS1NN4H0
CONN@
SSTX-
8
SSTX+
9
GND
10
GND
11
VBUS
1
D+
3
D-
2
GND
4
SSRX-
5
SSRX+
6
GND
7
GND
13
GND
12
US1
SY6288D20AAC_SOT23-5
SA00007AO00US1
SY6288D20AAC_SOT23-5
SA00007AO00
IN
5
EN
4
OUT
1
GND
2
OCB
3
CS5
0.1U_0402_16V7K
CS5
0.1U_0402_16V7K
1 2
CS6
47U_0805_6.3V6M
CS6
47U_0805_6.3V6M
1 2
LM3
WCM-2012-900T_4P
EMI@
SM070003Y00
LM3
WCM-2012-900T_4P
EMI@
SM070003Y00
1
1
4
4
3
3
2
2
CS4
1000P_0402_50V7K
CS4
1000P_0402_50V7K
1 2
RS1 0_0402_5% RS1 0_0402_5%
1
2
JUSB2 TAITW_PUBAU0-04FLBSCNN4H0Conn@ JUSB2 TAITW_PUBAU0-04FLBSCNN4H0Conn@
VBUS
1
D-
2
D+
3
SHIELD
4
GND
5
GND
6
GND
7
GND
8
RS8 0_0402_5%
@EMI@
RS8 0_0402_5%
@EMI@
1
2
RS16 0_0402_5%
@EMI@
RS16 0_0402_5%
@EMI@
1
2
CS1
0.1U_0402_16V7K
CS1
0.1U_0402_16V7K
1
2
8
7 6
54 321
9 10
DM2
IP4292CZ10-TB
SC300002C00
ESD@
8
7 6
54 321
9 10
DM2
IP4292CZ10-TB
SC300002C00
ESD@
4 51
6
2
7
3
9 8
D29
@ESD@
YSLC05CH_SOT23-3
D29
@ESD@
YSLC05CH_SOT23-3 1
2 3
RS3 0_0402_5% RS3 0_0402_5%
1
2
B B
C C
D D
E E
1
1
2
2
3
3
4
4
USB2.0/USB3.0 port 1
W=100mils
W=100mils
USB2.0 port x 1
LM1,LM2 2nd : SM070003K00
LM3 2nd : SM070002J00
LM5 2nd : SM070002J00
DB Phase add CS22 reserve 20141113
USB3.0 need support 3.5A change USB PWR SW SA00007AO00 low active
SI Phase:Add CS22,CS4 20141226
SI : pop DM2.
USB3TXDP0_C_R USB3TXDN0_C_R USB3RXDN0_C USB3RXDP0_C
USB20_P0_C USB20_N0_C
USB3TXDP0_C_RUSB3RXDN0_C USB3TXDN0_C_R USB3RXDP0_C
USB20_N0_CUSB20_P0_C
USB_ON#
USB20_P1_CUSB20_N1_C
USB20_P1_C USB20_N1_C
USB3TXDP0_C_R USB3TXDN0_C_R USB3RXDN0_C USB3RXDP0_CUSB20_N0_C USB20_P0_C
USB20_N1_C USB20_P1_C
USB3RXDN0_C
USB3RXDP0_C
USB3TXDP0_C_R
USB3_TX0_PUSB3_TX0_N
USB3_TX0_C_N
USB3TXDN0_C_R
USB3_TX0_C_P
USB_ON#
<25,32>
USB20_N0
<10>
USB20_P0
<10>
USB20_P1
<10>
USB20_N1
<10>
+5VALW
<15,19,24,26,29,32,34,37,48,49,56>
USB3_RX0_P
<10>
USB3_RX0_N
<10>
USB3_TX0_P
<10>
USB3_TX0_N
<10>
+5VALW
+USB_VCCA
+USB_VCCA
+USB_VCCA
+5VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
USB 3.0/2.0 conn
B
30 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
USB 3.0/2.0 conn
B
30 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
USB 3.0/2.0 conn
B
30 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
LA-C701P
+
CS22
150U_B2_6.3VM_R45M
SGA00002N80
+
CS22
150U_B2_6.3VM_R45M
SGA00002N80
1 2
LM1
CMMI21T-900Y-N
SM070003K00 @EMI@
LM1
CMMI21T-900Y-N
SM070003K00 @EMI@
1
1
4
4
3
3
2
2
RS4
0_0402_5%
@
RS4
0_0402_5%
@
1
2
LM2CMMI21T-900Y-N
SM070003K00
@EMI@
LM2CMMI21T-900Y-N
SM070003K00
@EMI@
1
1
4
4
3
3
2
2
CS3 0.1U_0402_16V7K CS3 0.1U_0402_16V7K
1 2
RS6 0_0402_5% RS6 0_0402_5%
1
2
DM1 YSLC05CH_SOT23-3
SCA00000U10
@ESD@ DM1 YSLC05CH_SOT23-3
SCA00000U10
@ESD@
1
2 3
CS2
0.1U_0402_16V7K
CS2
0.1U_0402_16V7K
1
2
RS15 0_0402_5%
@EMI@
RS15 0_0402_5%
@EMI@
1
2
LM5
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
LM5
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
RS2 0_0402_5% RS2 0_0402_5%
1
2
RS7 0_0402_5%
@EMI@
RS7 0_0402_5%
@EMI@
1
2
JUSB1 TAITW_PUBAU1-09FLBS1NN4H0
CONN@
JUSB1 TAITW_PUBAU1-09FLBS1NN4H0
CONN@
SSTX-
8
SSTX+
9
GND
10
GND
11
VBUS
1
D+
3
D-
2
GND
4
SSRX-
5
SSRX+
6
GND
7
GND
13
GND
12
US1
SY6288D20AAC_SOT23-5
SA00007AO00US1
SY6288D20AAC_SOT23-5
SA00007AO00
IN
5
EN
4
OUT
1
GND
2
OCB
3
CS5
0.1U_0402_16V7K
CS5
0.1U_0402_16V7K
1 2
CS6
47U_0805_6.3V6M
CS6
47U_0805_6.3V6M
1 2
LM3
WCM-2012-900T_4P
EMI@
SM070003Y00
LM3
WCM-2012-900T_4P
EMI@
SM070003Y00
1
1
4
4
3
3
2
2
CS4
1000P_0402_50V7K
CS4
1000P_0402_50V7K
1 2
RS1 0_0402_5% RS1 0_0402_5%
1
2
JUSB2 TAITW_PUBAU0-04FLBSCNN4H0Conn@ JUSB2 TAITW_PUBAU0-04FLBSCNN4H0Conn@
VBUS
1
D-
2
D+
3
SHIELD
4
GND
5
GND
6
GND
7
GND
8
RS8 0_0402_5%
@EMI@
RS8 0_0402_5%
@EMI@
1
2
RS16 0_0402_5%
@EMI@
RS16 0_0402_5%
@EMI@
1
2
CS1
0.1U_0402_16V7K
CS1
0.1U_0402_16V7K
1
2
8
7 6
54 321
9 10
DM2
IP4292CZ10-TB
SC300002C00
ESD@
8
7 6
54 321
9 10
DM2
IP4292CZ10-TB
SC300002C00
ESD@
4 51
6
2
7
3
9 8
D29
@ESD@
YSLC05CH_SOT23-3
D29
@ESD@
YSLC05CH_SOT23-3 1
2 3
RS3 0_0402_5% RS3 0_0402_5%
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
NGFF and WLAN
Unpop QB4 and RL23 for not support OBFF
DB Phase For RF request 20141117
DB Phase For RF request 20141117
DB Phase For RF request 20141117
PV:R271 change to 0-ohm shortpad
PV:RN13 change to 0-ohm shortpad
MC_WAKE#
MC_WAKE#
PCH_PCIE_WAKE#
<8>
USB20_N3
<10>
USB20_P3
<10>
PCIE_PTX_C_DRX_N6
<6>
PCIE_PTX_C_DRX_P6
<6>
PCIE_PRX_DTX_N6
<6>
PCIE_PRX_DTX_P6
<6>
CLK_PCIE_WLAN#
<7>
CLK_PCIE_WLAN
<7>
WLAN_CLKREQ#
<7>
EC_PCIE_WAKE#
<25>
MINI1_LED# <25>
E51TXD_P80DATA <25> E51RXD_P80CLK <25> PLT_RST# <22,25,27,35,6,8> WL_OFF# <10,9> SUSCLK <8>
BT_ON_EC <25>
+5VALW
<15,19,24,26,29,30,32,34,37,48,49,56>
+3VALW
<12,19,22,24,25,26,28,29,32,37,48,50,53,56,7>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,32,33,34,35,36
,37,56,6,7,8,9>
+3VS_WLAN_R
<29>
+3VS_WLAN_R
+3VS_WLAN
+3VS
+3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+5VALW +3VALW+3VS +3VS_WLAN_R
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
31 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
WLAN-BT
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
31 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
WLAN-BT
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
31 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
WLAN-BT
G
D
S
QB8
2N7002H_SOT23-3
@
G
D
S
QB8
2N7002H_SOT23-3
@
2
1
3
RN14 0_0201_5% RN14 0_0201_5%
1
2
R271
0_0805_5%
short@
R271
0_0805_5%
short@
1
2
CN2 4.7U_0603_6.3V6K @CN2 4.7U_0603_6.3V6K @
1 2
RN13 0_0201_5%
short@
RN13 0_0201_5%
short@
1
2
R5184
100P_0402_50V8J
@RF@ R5184
100P_0402_50V8J
@RF@
1 2
R5183
0.1U_0402_25V6
@RF@ R5183
0.1U_0402_25V6
@RF@
1 2
CN3
0.1U_0402_16V7K
CN3
0.1U_0402_16V7K
1 2
R5182
100P_0402_50V8J
@RF@ R5182
100P_0402_50V8J
@RF@
1 2
RL25
100K_0402_5%
@RL25
100K_0402_5%
@
12
R5181
0.1U_0402_25V6
@RF@ R5181
0.1U_0402_25V6
@RF@
1 2
JWLAN1
LOTES_APCI0019-P003H CONN@
SP070010DA0
JWLAN1
LOTES_APCI0019-P003H CONN@
SP070010DA0
1_GND
1
3.3V_2
2
3_USB_D+
3
3.3V_4
4
5_USB_D-
5
LED1#_6
6
7_GND
7
N/C_8
8
9_N/C
9
N/C_10
10
11_N/C
11
N/C_12
12
13_N/C
13
N/C_14
14
15_N/C
15
LED2#_16
16
17_N/C
17
GND_18
18
19_N/C
19
N/C_20
20
21_N/C
21
N/C_22
22
23_N/C
23
N/C_32
24
33_GND
25
N/C_34
26
35_PERp0
27
N/C_36
28
37_PERn0
29
CLink Reset_38
30
39_GND
31
CLink DATA_40
32
41_PET p0
33
CLink CLK_42
34
43_PET n0
35
COEX3_44
36
45_GND
37
COEX2_46
38
47_REFCLKP0
39
COEX1_48
40
49_REFCLKN0
41
SUSCLK_50
42
51_GND
43
PERST 0#_52
44
53_CLKREK0#
45
W_DISABLE2#_54
46
55_PEW ake0#
47
W_DISABLE1#_56
48
57_GND
49
N/C_58
50
59_N/C
51
N/C_60
52
61_N/C
53
N/C_62
54
63_GND
55
RESERVED_64
56
65_N/C
57
N/C_66
58
67_N/C
59
N/C_68
60
69_GND
61
N/C_70
62
71_N/C
63
3.3V_72
64
73_N/C
65
3.3V_74
66
75_GND
67
GND
68
GND
69
NC_70
70
NC_71
71
R5179
100P_0402_50V8J
@RF@
R5179
100P_0402_50V8J
@RF@
1 2
R5180
0.1U_0402_25V6
@RF@
R5180
0.1U_0402_25V6
@RF@
1 2
R5185
10P_0402_50V8J
@RF@
R5185
10P_0402_50V8J
@RF@
1 2
RN7 4.7K_0402_5% RN7 4.7K_0402_5%
12
RN3 10K_0402_5% RN3 10K_0402_5%
1 2
R5186
10P_0402_50V8J
@RF@
R5186
10P_0402_50V8J
@RF@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
NGFF and WLAN
Unpop QB4 and RL23 for not support OBFF
DB Phase For RF request 20141117
DB Phase For RF request 20141117
DB Phase For RF request 20141117
PV:R271 change to 0-ohm shortpad
PV:RN13 change to 0-ohm shortpad
MC_WAKE#
MC_WAKE#
PCH_PCIE_WAKE#
<8>
USB20_N3
<10>
USB20_P3
<10>
PCIE_PTX_C_DRX_N6
<6>
PCIE_PTX_C_DRX_P6
<6>
PCIE_PRX_DTX_N6
<6>
PCIE_PRX_DTX_P6
<6>
CLK_PCIE_WLAN#
<7>
CLK_PCIE_WLAN
<7>
WLAN_CLKREQ#
<7>
EC_PCIE_WAKE#
<25>
MINI1_LED# <25>
E51TXD_P80DATA <25> E51RXD_P80CLK <25> PLT_RST# <22,25,27,35,6,8> WL_OFF# <10,9> SUSCLK <8>
BT_ON_EC <25>
+5VALW
<15,19,24,26,29,30,32,34,37,48,49,56>
+3VALW
<12,19,22,24,25,26,28,29,32,37,48,50,53,56,7>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,32,33,34,35,36
,37,56,6,7,8,9>
+3VS_WLAN_R
<29>
+3VS_WLAN_R
+3VS_WLAN
+3VS
+3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+3VS_WLAN
+5VALW +3VALW+3VS +3VS_WLAN_R
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
31 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
WLAN-BT
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
31 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
WLAN-BT
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
31 61
Saturday, January 31, 2015
2013/02/26
2015/07/08
Compal Electronics, Inc.
WLAN-BT
G
D
S
QB8
2N7002H_SOT23-3
@
G
D
S
QB8
2N7002H_SOT23-3
@
2
1
3
RN14 0_0201_5% RN14 0_0201_5%
1
2
R271
0_0805_5%
short@
R271
0_0805_5%
short@
1
2
CN2 4.7U_0603_6.3V6K @CN2 4.7U_0603_6.3V6K @
1 2
RN13 0_0201_5%
short@
RN13 0_0201_5%
short@
1
2
R5184
100P_0402_50V8J
@RF@ R5184
100P_0402_50V8J
@RF@
1 2
R5183
0.1U_0402_25V6
@RF@ R5183
0.1U_0402_25V6
@RF@
1 2
CN3
0.1U_0402_16V7K
CN3
0.1U_0402_16V7K
1 2
R5182
100P_0402_50V8J
@RF@ R5182
100P_0402_50V8J
@RF@
1 2
RL25
100K_0402_5%
@RL25
100K_0402_5%
@
12
R5181
0.1U_0402_25V6
@RF@ R5181
0.1U_0402_25V6
@RF@
1 2
JWLAN1
LOTES_APCI0019-P003H CONN@
SP070010DA0
JWLAN1
LOTES_APCI0019-P003H CONN@
SP070010DA0
1_GND
1
3.3V_2
2
3_USB_D+
3
3.3V_4
4
5_USB_D-
5
LED1#_6
6
7_GND
7
N/C_8
8
9_N/C
9
N/C_10
10
11_N/C
11
N/C_12
12
13_N/C
13
N/C_14
14
15_N/C
15
LED2#_16
16
17_N/C
17
GND_18
18
19_N/C
19
N/C_20
20
21_N/C
21
N/C_22
22
23_N/C
23
N/C_32
24
33_GND
25
N/C_34
26
35_PERp0
27
N/C_36
28
37_PERn0
29
CLink Reset_38
30
39_GND
31
CLink DATA_40
32
41_PET p0
33
CLink CLK_42
34
43_PET n0
35
COEX3_44
36
45_GND
37
COEX2_46
38
47_REFCLKP0
39
COEX1_48
40
49_REFCLKN0
41
SUSCLK_50
42
51_GND
43
PERST 0#_52
44
53_CLKREK0#
45
W_DISABLE2#_54
46
55_PEW ake0#
47
W_DISABLE1#_56
48
57_GND
49
N/C_58
50
59_N/C
51
N/C_60
52
61_N/C
53
N/C_62
54
63_GND
55
RESERVED_64
56
65_N/C
57
N/C_66
58
67_N/C
59
N/C_68
60
69_GND
61
N/C_70
62
71_N/C
63
3.3V_72
64
73_N/C
65
3.3V_74
66
75_GND
67
GND
68
GND
69
NC_70
70
NC_71
71
R5179
100P_0402_50V8J
@RF@
R5179
100P_0402_50V8J
@RF@
1 2
R5180
0.1U_0402_25V6
@RF@
R5180
0.1U_0402_25V6
@RF@
1 2
R5185
10P_0402_50V8J
@RF@
R5185
10P_0402_50V8J
@RF@
1 2
RN7 4.7K_0402_5% RN7 4.7K_0402_5%
12
RN3 10K_0402_5% RN3 10K_0402_5%
1 2
R5186
10P_0402_50V8J
@RF@
R5186
10P_0402_50V8J
@RF@
1 2
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Powert Button Connector
IO BD Connector ( USB2.0,Card reader,HDD & PWR LED
)
USB2.0 ( on small BD )
Card reader
DB phase : modify pin define 20141114
L
Layout notes JPJ9 place Top layer, JPJ6 place Bottom layer
11/26 change CONN.
PV phase : Add C119 for EMI request. 20141130
LID_SW#
ON/OFF#
USB20_N6_C USB20_P6_C USB20_N2_C USB20_P2_C
USB20_P2_CUSB20_N2_C
PWR_LED# SATA_LED#
USB20_P6_CUSB20_N6_C
LID_SW#
<25>
ON/OFF#
<25>
USB_ON#
<25,30>
+3VL
<25,28,46,47,48,6>
+5VALW
<15,19,24,26,29,30,34,37,48,49,56>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,33,34,35,36
,37,56,6,7,8,9>
USB20_N2
<10>
USB20_P2
<10>
+3VALW
<12,19,22,24,25,26,28,29,37,48,50,53,56,7> PWR_LED#
<25>
SATA_LED#
<6,9>
USB20_N6
<10>
USB20_P6
<10>
+3VL
+3VL
+5VALW
+3VL +5VALW +3VS +3VALW
+3VALW
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
IO CON
B
32 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
IO CON
B
32 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
IO CON
B
32 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
CC124 100P_0402_50V8J ESD@CC124 100P_0402_50V8J ESD@
1 2
JPWR E-T_6916K-Q04N-03R CONN@
SP01000TB10
JPWR E-T_6916K-Q04N-03R CONN@
SP01000TB10
1
1
2
2
3
3
4
4
G1
5
G2
6
LM6
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
LM6
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
C119
680P_0402_50V7K
EMI@
C119
680P_0402_50V7K
EMI@
1 2
JPJ9
SHORT PADS
@
JPJ9
SHORT PADS
@
12
C166
0.1U_0402_16V7K
@EMI@ C166
0.1U_0402_16V7K
@EMI@
1 2
R215 100K_0402_5%R215 100K_0402_5%
1
2
JIO1 CVILU_CF31181D0R4-10-NHCONN@ SP011411241JIO1 CVILU_CF31181D0R4-10-NHCONN@ SP011411241
1
1
2
2
3
3
4
4
5
5
6
6
G1
19
G2
20
7
7
9
9
8
8
11
11
10
10
12
12
13
13
14
14
15
15
16
16
17
17
18
18
RS14 0_0402_5%
@EMI@
RS14 0_0402_5%
@EMI@
1
2
JPJ6
SHORT PADS
@JPJ6
SHORT PADS
@
12
RS13 0_0402_5%
@EMI@
RS13 0_0402_5%
@EMI@
1
2
RS17 0_0402_5%
@EMI@
RS17 0_0402_5%
@EMI@
1
2
LM4
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
LM4
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
RS18 0_0402_5%
@EMI@
RS18 0_0402_5%
@EMI@
1
2
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Powert Button Connector
IO BD Connector ( USB2.0,Card reader,HDD & PWR LED
)
USB2.0 ( on small BD )
Card reader
DB phase : modify pin define 20141114
L
Layout notes JPJ9 place Top layer, JPJ6 place Bottom layer
11/26 change CONN.
PV phase : Add C119 for EMI request. 20141130
LID_SW#
ON/OFF#
USB20_N6_C USB20_P6_C USB20_N2_C USB20_P2_C
USB20_P2_CUSB20_N2_C
PWR_LED# SATA_LED#
USB20_P6_CUSB20_N6_C
LID_SW#
<25>
ON/OFF#
<25>
USB_ON#
<25,30>
+3VL
<25,28,46,47,48,6>
+5VALW
<15,19,24,26,29,30,34,37,48,49,56>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,33,34,35,36
,37,56,6,7,8,9>
USB20_N2
<10>
USB20_P2
<10>
+3VALW
<12,19,22,24,25,26,28,29,37,48,50,53,56,7> PWR_LED#
<25>
SATA_LED#
<6,9>
USB20_N6
<10>
USB20_P6
<10>
+3VL
+3VL
+5VALW
+3VL +5VALW +3VS +3VALW
+3VALW
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
IO CON
B
32 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
IO CON
B
32 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
IO CON
B
32 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
CC124 100P_0402_50V8J ESD@CC124 100P_0402_50V8J ESD@
1 2
JPWR E-T_6916K-Q04N-03R CONN@
SP01000TB10
JPWR E-T_6916K-Q04N-03R CONN@
SP01000TB10
1
1
2
2
3
3
4
4
G1
5
G2
6
LM6
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
LM6
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
C119
680P_0402_50V7K
EMI@
C119
680P_0402_50V7K
EMI@
1 2
JPJ9
SHORT PADS
@
JPJ9
SHORT PADS
@
12
C166
0.1U_0402_16V7K
@EMI@ C166
0.1U_0402_16V7K
@EMI@
1 2
R215 100K_0402_5%R215 100K_0402_5%
1
2
JIO1 CVILU_CF31181D0R4-10-NHCONN@ SP011411241JIO1 CVILU_CF31181D0R4-10-NHCONN@ SP011411241
1
1
2
2
3
3
4
4
5
5
6
6
G1
19
G2
20
7
7
9
9
8
8
11
11
10
10
12
12
13
13
14
14
15
15
16
16
17
17
18
18
RS14 0_0402_5%
@EMI@
RS14 0_0402_5%
@EMI@
1
2
JPJ6
SHORT PADS
@JPJ6
SHORT PADS
@
12
RS13 0_0402_5%
@EMI@
RS13 0_0402_5%
@EMI@
1
2
RS17 0_0402_5%
@EMI@
RS17 0_0402_5%
@EMI@
1
2
LM4
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
LM4
WCM-2012-900T_4P
EMI@
Part Number = SM070003Y00
1
1
4
4
3
3
2
2
RS18 0_0402_5%
@EMI@
RS18 0_0402_5%
@EMI@
1
2
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
40 mils
1A
Close to Connector L
Layout notes C4801 C5214 close to CONN
SI phase : Modify FAN pin define 20141214
PV phase : R5177 change to 0-ohm shortpad. 20150125
EC_FAN_PWM1
+FAN1
+FAN1
+5VS
<19,20,23,24,25,26,29,37,51,54>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,34,35,36
,37,56,6,7,8,9>
FAN_SPEED1
<25>
EC_FAN_PWM1
<25>
+5VS
+5VS+3VS
+FAN1
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
FAN
B
33 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
FAN
B
33 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
FAN
B
33 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
R5177
0_0805_5%
short@ R5177
0_0805_5%
short@
1
2
RE51 10K_0402_5%
@
RE51 10K_0402_5%
@
1
2
JFAN1 ACES_50271-0040N-001
SP02000TS00
CONN@JFAN1 ACES_50271-0040N-001
SP02000TS00
CONN@
1
1
2
2
3
3
4
4
GND1
5
GND2
6
RE50 10K_0402_5% RE50 10K_0402_5%
1 2
C4801
10U_0603_6.3V6M
C4801
10U_0603_6.3V6M
1 2
C5214
0.1U_0402_16V7K
C5214
0.1U_0402_16V7K
1 2
CE24 0.01U_0402_25V7K CE24 0.01U_0402_25V7K
1 2
B B
C C
D D
E E
1
1
2
2
3
3
4
4
40 mils
1A
Close to Connector L
Layout notes C4801 C5214 close to CONN
SI phase : Modify FAN pin define 20141214
PV phase : R5177 change to 0-ohm shortpad. 20150125
EC_FAN_PWM1
+FAN1
+FAN1
+5VS
<19,20,23,24,25,26,29,37,51,54>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,34,35,36
,37,56,6,7,8,9>
FAN_SPEED1
<25>
EC_FAN_PWM1
<25>
+5VS
+5VS+3VS
+FAN1
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
FAN
B
33 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
FAN
B
33 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
FAN
B
33 61
Saturday, January 31, 2015
Compal Electronics, Inc.
2015/07/08
2013/02/26
R5177
0_0805_5%
short@ R5177
0_0805_5%
short@
1
2
RE51 10K_0402_5%
@
RE51 10K_0402_5%
@
1
2
JFAN1 ACES_50271-0040N-001
SP02000TS00
CONN@JFAN1 ACES_50271-0040N-001
SP02000TS00
CONN@
1
1
2
2
3
3
4
4
GND1
5
GND2
6
RE50 10K_0402_5% RE50 10K_0402_5%
1 2
C4801
10U_0603_6.3V6M
C4801
10U_0603_6.3V6M
1 2
C5214
0.1U_0402_16V7K
C5214
0.1U_0402_16V7K
1 2
CE24 0.01U_0402_25V7K CE24 0.01U_0402_25V7K
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DB Phase For ESD request 20141117
DB Phase For ESD request 20141117
DB phase : For ESD request 20141117
DB phase : For ESD request 20141117
DB phase : For ESD request 20141117
DB phase : For ESD request 20141117
+1.05VS_VCCSATA3PLL +1.05VS_APPLOPI
+5VALW
<15,19,24,26,29,30,32,37,48,49,56>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,35,36
,37,56,6,7,8,9>
+1.05VS_MODPHY
<12,24>
+1.05VS
<11,12,24,25,28,37,50,51>
+LCDVDD
<18,19>
+1.35V_VDDQ
<11,15,16,17,4,49>
+1.05VS_VCCSATA3PLL
<12,6>
+1.05VS_APPLOPI
<12>
+3VS
+5VALW
+1.05VS_MODPHY
+5VALW+3VS +1.05VS_MODPHY
+1.05VS
+1.05VS
+LCDVDD
+LCDVDD
+1.35V_VDDQ
+1.35V_VDDQ +1.05VS_VCCSATA3PLL +1.05VS_APPLOPI
+VCC_CORE
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
34
0.1
ESD RSVD
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
34
0.1
ESD RSVD
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
34
0.1
ESD RSVD
Saturday, January 31, 2015
D18 CK0402101V05_0402-2
@ESD@
D18 CK0402101V05_0402-2
@ESD@
1
2
D19 CK0402101V05_0402-2
@ESD@
D19 CK0402101V05_0402-2
@ESD@
1
2
D11 CK0402101V05_0402-2
@ESD@
D11 CK0402101V05_0402-2
@ESD@
1
2
D20 CK0402101V05_0402-2
@ESD@
D20 CK0402101V05_0402-2
@ESD@
1
2
D14 CK0402101V05_0402-2
@ESD@
D14 CK0402101V05_0402-2
@ESD@
1
2
D16 CK0402101V05_0402-2
@ESD@
D16 CK0402101V05_0402-2
@ESD@
1
2
D15 CK0402101V05_0402-2
@ESD@
D15 CK0402101V05_0402-2
@ESD@
1
2
D12 CK0402101V05_0402-2
@ESD@
D12 CK0402101V05_0402-2
@ESD@
1
2
D13 CK0402101V05_0402-2
@ESD@
D13 CK0402101V05_0402-2
@ESD@
1
2
D9 CK0402101V05_0402-2
@ESD@
D9 CK0402101V05_0402-2
@ESD@
1
2
D10 CK0402101V05_0402-2
@ESD@
D10 CK0402101V05_0402-2
@ESD@
1
2
D8 CK0402101V05_0402-2
@ESD@
D8 CK0402101V05_0402-2
@ESD@
1
2
D17 CK0402101V05_0402-2
@ESD@
D17 CK0402101V05_0402-2
@ESD@
1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DB Phase For ESD request 20141117
DB Phase For ESD request 20141117
DB phase : For ESD request 20141117
DB phase : For ESD request 20141117
DB phase : For ESD request 20141117
DB phase : For ESD request 20141117
+1.05VS_VCCSATA3PLL +1.05VS_APPLOPI
+5VALW
<15,19,24,26,29,30,32,37,48,49,56>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,35,36
,37,56,6,7,8,9>
+1.05VS_MODPHY
<12,24>
+1.05VS
<11,12,24,25,28,37,50,51>
+LCDVDD
<18,19>
+1.35V_VDDQ
<11,15,16,17,4,49>
+1.05VS_VCCSATA3PLL
<12,6>
+1.05VS_APPLOPI
<12>
+3VS
+5VALW
+1.05VS_MODPHY
+5VALW+3VS +1.05VS_MODPHY
+1.05VS
+1.05VS
+LCDVDD
+LCDVDD
+1.35V_VDDQ
+1.35V_VDDQ +1.05VS_VCCSATA3PLL +1.05VS_APPLOPI
+VCC_CORE
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
34
0.1
ESD RSVD
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
34
0.1
ESD RSVD
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
34
0.1
ESD RSVD
Saturday, January 31, 2015
D18 CK0402101V05_0402-2
@ESD@
D18 CK0402101V05_0402-2
@ESD@
1
2
D19 CK0402101V05_0402-2
@ESD@
D19 CK0402101V05_0402-2
@ESD@
1
2
D11 CK0402101V05_0402-2
@ESD@
D11 CK0402101V05_0402-2
@ESD@
1
2
D20 CK0402101V05_0402-2
@ESD@
D20 CK0402101V05_0402-2
@ESD@
1
2
D14 CK0402101V05_0402-2
@ESD@
D14 CK0402101V05_0402-2
@ESD@
1
2
D16 CK0402101V05_0402-2
@ESD@
D16 CK0402101V05_0402-2
@ESD@
1
2
D15 CK0402101V05_0402-2
@ESD@
D15 CK0402101V05_0402-2
@ESD@
1
2
D12 CK0402101V05_0402-2
@ESD@
D12 CK0402101V05_0402-2
@ESD@
1
2
D13 CK0402101V05_0402-2
@ESD@
D13 CK0402101V05_0402-2
@ESD@
1
2
D9 CK0402101V05_0402-2
@ESD@
D9 CK0402101V05_0402-2
@ESD@
1
2
D10 CK0402101V05_0402-2
@ESD@
D10 CK0402101V05_0402-2
@ESD@
1
2
D8 CK0402101V05_0402-2
@ESD@
D8 CK0402101V05_0402-2
@ESD@
1
2
D17 CK0402101V05_0402-2
@ESD@
D17 CK0402101V05_0402-2
@ESD@
1
2
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
No Use GPU Display Port outpud
AC Coupling Capacitor PCIe Gen3: Recommended value is 220 nF PCIe Gen1 and Gen2 only: Recommended value is 100 n
F
GPU_RST#
GPU_RST#
PCIE_CRX_GTX_C_N1 PCIE_CRX_GTX_C_P1 PCIE_CRX_GTX_C_N0 PCIE_CRX_GTX_C_P0 PCIE_CRX_GTX_C_N3 PCIE_CRX_GTX_C_P3 PCIE_CRX_GTX_C_N2 PCIE_CRX_GTX_C_P2
CLK_PCIE_GPU
<7>
CLK_PCIE_GPU#
<7>
PLT_RST#
<22,25,27,31,6,8>
DGPU_HOLD_RST#
<8,9>
PCIE_CTX_GRX_P0
<10>
PCIE_CTX_GRX_N0
<10>
PCIE_CTX_GRX_N1
<10>
PCIE_CTX_GRX_P1
<10>
PCIE_CTX_GRX_P2
<10>
PCIE_CTX_GRX_N2
<10>
PCIE_CTX_GRX_N3
<10>
PCIE_CTX_GRX_P3
<10>
PCIE_CRX_GTX_N0 <10> PCIE_CRX_GTX_P0 <10> PCIE_CRX_GTX_P1 <10> PCIE_CRX_GTX_N1 <10> PCIE_CRX_GTX_N2 <10> PCIE_CRX_GTX_P2 <10> PCIE_CRX_GTX_P3 <10> PCIE_CRX_GTX_N3 <10>
+1.05VS_VGA
<37,38>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,36
,37,56,6,7,8,9>
+3VS_VGA
<36,37,38,54>
+1.05VS_VGA
+3VS_VGA
+3VS
+1.05VS_VGA +3VS +3VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_PCIE/DP
Custom
35 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_PCIE/DP
Custom
35 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_PCIE/DP
Custom
35 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
C5189
0.1U_0402_16V7K
DIS@
C5189
0.1U_0402_16V7K
DIS@
1
2
R1681
0_0402_5% DIS@
R1681
0_0402_5% DIS@
1 2
R1400 1K_0402_5%
DIS@
R1400 1K_0402_5%
DIS@
1
2
C5194
0.1U_0402_16V7K
DIS@
C5194
0.1U_0402_16V7K
DIS@
1
2
C5190
0.1U_0402_16V7K
DIS@
C5190
0.1U_0402_16V7K
DIS@
1
2
R1631 100K_0402_5% DIS@ R1631 100K_0402_5% DIS@
1 2
R717 1K_0402_1%
DIS@
R717 1K_0402_1%
DIS@
1
2
C5187
0.1U_0402_16V7K
DIS@
C5187
0.1U_0402_16V7K
DIS@
1
2
R5159 1.69K_0402_1%
DIS@
R5159 1.69K_0402_1%
DIS@
1
2
C5192
0.1U_0402_16V7K
DIS@
C5192
0.1U_0402_16V7K
DIS@
1
2
R1691 0_0402_5% @R1691 0_0402_5% @
1 2
TMDP
?
U666F 216-0867030 EXO PRO S3
DIS@
TMDP
?
U666F 216-0867030 EXO PRO S3
DIS@
DIGON
AB12
TXCAM_DPA3N
AK14
TXCAP_DPA3P
AL15
TXCBM_DPB3N
AJ19
TXCBP_DPB3P
AH20
TX0M_DPA2N
AJ15
TX0P_DPA2P
AH16
TX1M_DPA1N
AK16
TX1P_DPA1P
AL17
TX2M_DPA0N
AJ17
TX2P_DPA0P
AH18
NC_TXOUT_L3N
AK18
NC_TXOUT_L3P
AL19
TX3M_DPB2N
AK20
TX3P_DPB2P
AL21
TX4M_DPB1N
AJ21
TX4P_DPB1P
AH22
TX5M_DPB0N
AK22
TX5P_DPB0P
AL23
NC_TXOUT_U3N
AJ23
NC_TXOUT_U3P
AK24
VARY_BL
AB11
C5193
0.1U_0402_16V7K
DIS@
C5193
0.1U_0402_16V7K
DIS@
1
2
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
U666A
DIS@
216-0867030 EXO PRO S3
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
U666A
DIS@
216-0867030 EXO PRO S3
TEST_PG
N10
PCIE_CALR_RX
AA22
PCIE_CALR_TX
Y22
PCIE_REFCLKN
AK32
PCIE_REFCLKP
AK30
PCIE_RX0N
AE31
PCIE_RX0P
AF30
NC#R31
R31
NC#T30
T30
NC#P28
P28
NC#R29
R29
NC#N31
N31
NC#P30
P30
NC#M28
M28
NC#N29
N29
NC#L31
L31
NC#M30
M30
NC#K30
K30
NC#L29
L29
PCIE_RX1N
AD28
PCIE_RX1P
AE29
PCIE_RX2N
AC31
PCIE_RX2P
AD30
PCIE_RX3N
AB28
PCIE_RX3P
AC29
PCIE_RX4N
AA31
PCIE_RX4P
AB30
PCIE_RX5N
Y28
PCIE_RX5P
AA29
PCIE_RX6N
W31
PCIE_RX6P
Y30
PCIE_RX7N
V28
PCIE_RX7P
W29
NC#U31
U31
NC#V30
V30
NC#T28
T28
NC#U29
U29
PERSTB
AL27
PCIE_TX0N
AG31
PCIE_TX0P
AH30
NC#U23
U23
NC#U24
U24
NC#T27
T27
NC#T26
T26
NC#T23
T23
NC#T24
T24
NC#P26
P26
NC#P27
P27
NC#P23
P23
NC#P24
P24
NC#N26
N26
NC#M27
M27
PCIE_TX1N
AF28
PCIE_TX1P
AG29
PCIE_TX2N
AF26
PCIE_TX2P
AF27
PCIE_TX3N
AD26
PCIE_TX3P
AD27
PCIE_TX4N
AB25
PCIE_TX4P
AC25
PCIE_TX5N
Y24
PCIE_TX5P
Y23
PCIE_TX6N
AB26
PCIE_TX6P
AB27
PCIE_TX7N
Y26
PCIE_TX7P
Y27
NC#W 23
W23
NC#W 24
W24
NC#U26
U26
NC#V27
V27
C5191
0.1U_0402_16V7K
DIS@
C5191
0.1U_0402_16V7K
DIS@
1
2
C5188
0.1U_0402_16V7K
DIS@
C5188
0.1U_0402_16V7K
DIS@
1
2
U6
MC74VHC1G08DFT2G_SC70-5
DIS@
U6
MC74VHC1G08DFT2G_SC70-5
DIS@
B
2
A
1
Y
4
P
5
G
3
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
No Use GPU Display Port outpud
AC Coupling Capacitor PCIe Gen3: Recommended value is 220 nF PCIe Gen1 and Gen2 only: Recommended value is 100 n
F
GPU_RST#
GPU_RST#
PCIE_CRX_GTX_C_N1 PCIE_CRX_GTX_C_P1 PCIE_CRX_GTX_C_N0 PCIE_CRX_GTX_C_P0 PCIE_CRX_GTX_C_N3 PCIE_CRX_GTX_C_P3 PCIE_CRX_GTX_C_N2 PCIE_CRX_GTX_C_P2
CLK_PCIE_GPU
<7>
CLK_PCIE_GPU#
<7>
PLT_RST#
<22,25,27,31,6,8>
DGPU_HOLD_RST#
<8,9>
PCIE_CTX_GRX_P0
<10>
PCIE_CTX_GRX_N0
<10>
PCIE_CTX_GRX_N1
<10>
PCIE_CTX_GRX_P1
<10>
PCIE_CTX_GRX_P2
<10>
PCIE_CTX_GRX_N2
<10>
PCIE_CTX_GRX_N3
<10>
PCIE_CTX_GRX_P3
<10>
PCIE_CRX_GTX_N0 <10> PCIE_CRX_GTX_P0 <10> PCIE_CRX_GTX_P1 <10> PCIE_CRX_GTX_N1 <10> PCIE_CRX_GTX_N2 <10> PCIE_CRX_GTX_P2 <10> PCIE_CRX_GTX_P3 <10> PCIE_CRX_GTX_N3 <10>
+1.05VS_VGA
<37,38>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,36
,37,56,6,7,8,9>
+3VS_VGA
<36,37,38,54>
+1.05VS_VGA
+3VS_VGA
+3VS
+1.05VS_VGA +3VS +3VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_PCIE/DP
Custom
35 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_PCIE/DP
Custom
35 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_PCIE/DP
Custom
35 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
C5189
0.1U_0402_16V7K
DIS@
C5189
0.1U_0402_16V7K
DIS@
1
2
R1681
0_0402_5% DIS@
R1681
0_0402_5% DIS@
1 2
R1400 1K_0402_5%
DIS@
R1400 1K_0402_5%
DIS@
1
2
C5194
0.1U_0402_16V7K
DIS@
C5194
0.1U_0402_16V7K
DIS@
1
2
C5190
0.1U_0402_16V7K
DIS@
C5190
0.1U_0402_16V7K
DIS@
1
2
R1631 100K_0402_5% DIS@ R1631 100K_0402_5% DIS@
1 2
R717 1K_0402_1%
DIS@
R717 1K_0402_1%
DIS@
1
2
C5187
0.1U_0402_16V7K
DIS@
C5187
0.1U_0402_16V7K
DIS@
1
2
R5159 1.69K_0402_1%
DIS@
R5159 1.69K_0402_1%
DIS@
1
2
C5192
0.1U_0402_16V7K
DIS@
C5192
0.1U_0402_16V7K
DIS@
1
2
R1691 0_0402_5% @R1691 0_0402_5% @
1 2
TMDP
?
U666F 216-0867030 EXO PRO S3
DIS@
TMDP
?
U666F 216-0867030 EXO PRO S3
DIS@
DIGON
AB12
TXCAM_DPA3N
AK14
TXCAP_DPA3P
AL15
TXCBM_DPB3N
AJ19
TXCBP_DPB3P
AH20
TX0M_DPA2N
AJ15
TX0P_DPA2P
AH16
TX1M_DPA1N
AK16
TX1P_DPA1P
AL17
TX2M_DPA0N
AJ17
TX2P_DPA0P
AH18
NC_TXOUT_L3N
AK18
NC_TXOUT_L3P
AL19
TX3M_DPB2N
AK20
TX3P_DPB2P
AL21
TX4M_DPB1N
AJ21
TX4P_DPB1P
AH22
TX5M_DPB0N
AK22
TX5P_DPB0P
AL23
NC_TXOUT_U3N
AJ23
NC_TXOUT_U3P
AK24
VARY_BL
AB11
C5193
0.1U_0402_16V7K
DIS@
C5193
0.1U_0402_16V7K
DIS@
1
2
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
U666A
DIS@
216-0867030 EXO PRO S3
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
U666A
DIS@
216-0867030 EXO PRO S3
TEST_PG
N10
PCIE_CALR_RX
AA22
PCIE_CALR_TX
Y22
PCIE_REFCLKN
AK32
PCIE_REFCLKP
AK30
PCIE_RX0N
AE31
PCIE_RX0P
AF30
NC#R31
R31
NC#T30
T30
NC#P28
P28
NC#R29
R29
NC#N31
N31
NC#P30
P30
NC#M28
M28
NC#N29
N29
NC#L31
L31
NC#M30
M30
NC#K30
K30
NC#L29
L29
PCIE_RX1N
AD28
PCIE_RX1P
AE29
PCIE_RX2N
AC31
PCIE_RX2P
AD30
PCIE_RX3N
AB28
PCIE_RX3P
AC29
PCIE_RX4N
AA31
PCIE_RX4P
AB30
PCIE_RX5N
Y28
PCIE_RX5P
AA29
PCIE_RX6N
W31
PCIE_RX6P
Y30
PCIE_RX7N
V28
PCIE_RX7P
W29
NC#U31
U31
NC#V30
V30
NC#T28
T28
NC#U29
U29
PERSTB
AL27
PCIE_TX0N
AG31
PCIE_TX0P
AH30
NC#U23
U23
NC#U24
U24
NC#T27
T27
NC#T26
T26
NC#T23
T23
NC#T24
T24
NC#P26
P26
NC#P27
P27
NC#P23
P23
NC#P24
P24
NC#N26
N26
NC#M27
M27
PCIE_TX1N
AF28
PCIE_TX1P
AG29
PCIE_TX2N
AF26
PCIE_TX2P
AF27
PCIE_TX3N
AD26
PCIE_TX3P
AD27
PCIE_TX4N
AB25
PCIE_TX4P
AC25
PCIE_TX5N
Y24
PCIE_TX5P
Y23
PCIE_TX6N
AB26
PCIE_TX6P
AB27
PCIE_TX7N
Y26
PCIE_TX7P
Y27
NC#W 23
W23
NC#W 24
W24
NC#U26
U26
NC#V27
V27
C5191
0.1U_0402_16V7K
DIS@
C5191
0.1U_0402_16V7K
DIS@
1
2
C5188
0.1U_0402_16V7K
DIS@
C5188
0.1U_0402_16V7K
DIS@
1
2
U6
MC74VHC1G08DFT2G_SC70-5
DIS@
U6
MC74VHC1G08DFT2G_SC70-5
DIS@
B
2
A
1
Y
4
P
5
G
3
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Enable MLPS
13mA
PS_0[3:1]=001 PS_1[3:1]=000 PS_1[5:4]=11PS_0[5:4]=11
C=NCC=NC
PS_2[3:1]=000 PS_2[5:4]=11 PS_3[3:1]=000 PS_3[5:4]=11
R=NC
C=NC
PS_0[1] ROM_CONFIG[0] PS_0[2] ROM_CONFIG[1] PS_0[3] ROM_CONFIG[2] PS_0[4] N/A PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
Strap Name :
PS_1[2] TRAP_BIF_CLK_PM_EN PS_1[1] STRAP_BIF_GEN3_EN_A
Strap Name :
PS_1[5] STRAP_TX_DEEMPH_EN PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING PS_1[3] N/A PS_2[2] N/A PS_2[3] STRAP_BIOS_ROM_EN PS_2[4] STRAP_BIF_VGA_DIS PS_2[5] N/A
Strap Name :
PS_2[1] N/A PS_3[2] BOARD_CONFIG[1] (Memory ID) PS_3[1] BOARD_CONFIG[0] (Memory ID)
Strap Name :
PS_3[5] AUD_PORT_CONN_PINSTRAP[2] PS_3[4] AUD_PORT_CONN_PINSTRAP[1] PS_3[3] BOARD_CONFIG[2] (Memory ID)
680nF NC
Cap (nF) Bitd [5:4] Capacitor Divider Lookup Lable
82nF 10nF 10
0100 11
VGA_AC_BATT_R pull up
NC
Resistor Divider Lookup Lable
R_pd (ohm)
R_pu (ohm)
6.98k4.53k8.45k 3.24k
Bitd [3:1]
2k4.75k
4.75k3.4k4.53k
NC10k5.62k4.99k4.99k2k
101 110 111000 001 010 011 100
0402 1% resistors are equired
External VGA Thermal Sensor
Address:1001100xb (x is R/W bit)
(default)
DB phase : follow AMD check list 20141113
DB phase : follow AMD check list R1445 keep GPIO_5 PU to +3VS_VGA via 4.7kohm (as d
efault)
20141113
DB phase : follow AMD check list R167 non-pop by vendor 20141113
DB phase : follow AMD check list XO_IN/XO_IN2 must PD 20141113
DB phase : follow RRR 20141118
101
SA000077K00 SA00006E8A0
Micron MT41J256M16HA-093G:E
2GB X7662732L01
3.24K 5.62K
H5TC4G63CFR-11C FBGA 96P
110
SA000076P80
K4W4G1646E-BC1A FBGA 96P
2GB 3.4K 10K X7654132L0?
X7654132L0?
X76 P/N
X7662732L02
000
X7662732L04
R5174 R5169
111
4.75K NC
1GB
SA00007PY00
Nanya NT5CB128M16FP-FL
011 100
2GB2GB
X7654132L0? X7662732L03
6.98K 4.99K 4.53K 4.99K
NC 4.75K
Micron MT41J128M16JT-093G:K
SA000067500
1GB
8.45K 2K
K4W2G1646Q-BC1A FBGA 96P Hynix H5TC2G63FR-11C
Memory Type SA000068U40SA00006H400
Configuration Size
1GB
Memory ID
1GB
001 010
2K
4.53K
X7654132L0?
Nanya NT5CB256M16DP-FL
SI:SMBus change to EC_SMB_CK3/DA3 for GPU external
sensor.
SI
：
Change BOM con/ig
PV:GPU external sensor change to unpop.
PS_0 PS_3PS_2PS_1
VGA_SM B_C K3VGA_SM B_D A3
VGA_SM B_C K3 VGA_SM B_D A3 GPU_VID2 VGA_C LKR EQ#_R XTALOUT +TSVDDGPIO19_CTF GPIO28
TESTEN
TESTENJTAG_TCK JTAG_TMS
XO_I N
JTAG_TDOJTAG_TDI JTAG_TRSTB
XO_I N2
GPU_VID4 GPU_VID3
PS_0 PS_1 PS_3PS_2
VGA_SM B_D A3
EC_SMB_DA2
VGA_SM B_C K3
EC_SMB_CK2
JTAG_TMSJTAG_TRSTB JTAG_TDI JTAG_TCK
GPU_CLKREQ#
VGA_AC _BATT_R ACIN
ACIN VGA_AC _BATT_R
GPIO19_CTF
GPU_VID1 GPU_VID5
XTALOUT
VGA_AC _BATT_R
THERM_D+ THERM_D-
GPU_GPIO17
THERM_D+ THERM_D-
GPU_GPIO17
GPU_GPIO0
XO_I N XO_I N2
GPU_CLKREQ#
DGPU_PW ROK
XTALI N
XTALI N_R _R
EC_SMB_CK3 EC_SMB_DA3
THS_SDATHS_SCL
EC_SMB_CK3 EC_SMB_DA3THS_SCL THS_SDA
GPU_VID2
<54>
EC_SMB_DA2
<18,21,25,7>
GPU_VID3
<54>
GPU_VID4
<54>
EC_SMB_CK2
<18,21,25,7>
ACIN
<25,47,8>
GPU_VID1
<54>
GPU_VID5
<54>
VGA_AC _BATT
<25>
+1.8VS_VGA
<28,37,38,56>
+3V_PCH
<10,11,12,24,4,6,7,9>
XTALI N
<28>
+3VS_VGA
<35,37,38,54>
GPU_CLKREQ#
<7>
1.8V_PW RGD
<56>
GPU_PW RGD
<54>
DGPU_PW ROK <8,9>
EC_SMB_CK3 <25> EC_SMB_DA3 <25>
+3VS_VGA
+1.8VS_VGA
+1.8VS_VGA+1.8VS_VGA +1.8VS_VGA+1.8VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+1.8VS_VGA +3V_PCH
+3V_PCH
+3VS_VGA
+3VS
+3VS_VGA
+3VS
+3VS_VGA
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MSIC
Custom
36 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MSIC
Custom
36 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MSIC
Custom
36 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
RV134 2.2K_0402_5%
@
RV134 2.2K_0402_5%
@
1
2
UV13 NCT7718W _MSOP8
@
UV13 NCT7718W _MSOP8
@
ALERT#
6
T_ CRIT#
4
GND
5
D+
2
D-
3
SCL
8
SDA
7
VDD
1
T208 T208
1
C341
8.2P_0402_50V_NPO
@
C341
8.2P_0402_50V_NPO
@
12
R349
10M_0402_5%
@
R349
10M_0402_5%
@
1
2
Q16B
ME2N7002D1KW-G 2N_SOT363-6
@
Q16B
ME2N7002D1KW-G 2N_SOT363-6
@
3
5
4
T202 T202
1
RP34
10K_8P4R_5%
@
RP34
10K_8P4R_5%
@
1
8
2
7
3
6
4
5
RP35
10K_8P4R_5%
@
RP35
10K_8P4R_5%
@
18
27
36
45
R5164 4.75K_0402_1% DIS@ R5164 4.75K_0402_1% DIS@
1 2
Q2416B
ME2N7002D1KW -G 2N_SOT363-6
DIS@
Q2416B
ME2N7002D1KW -G 2N_SOT363-6
DIS@
3
5
4
C5203
0.082U_0402_16V6K
DIS@ C5203
0.082U_0402_16V6K
DIS@
1 2
CV271 0.1U_0402_16V4Z
@
CV271 0.1U_0402_16V4Z
@
1
2
T214 T214
1
R169 0_0402_5%
@
R169 0_0402_5%
@
1
2
R1445 4.7K_0402_5%
DIS@
R1445 4.7K_0402_5%
DIS@
1
2
R174 0_0402_5%
DIS@
R174 0_0402_5%
DIS@
1
2
R1442 10K_0402_5%
DIS@
R1442 10K_0402_5%
DIS@
1
2
Q2416A
ME2N7002D1KW -G 2N_SOT363-6
DIS@
Q2416A
ME2N7002D1KW -G 2N_SOT363-6
DIS@
6
1
2
T210 T210
1
R5167 8.45K_0402_1% @R5167 8.45K_0402_1% @
1 2
RG125 0_0402_5%
@
RG125 0_0402_5%
@
1
2
R5166 2K_0402_1% DIS@ R5166 2K_0402_1% DIS@
1 2
R162 0_0402_5%
@
R162 0_0402_5%
@
1
2
C5213
68P_0402_50V8J
@DIS@
C5213
68P_0402_50V8J
@DIS@
1 2
T291 T291
1
T205 T205
1
Q4110B
ME2N7002D1KW -G 2N_SOT363-6
@
Q4110B
ME2N7002D1KW -G 2N_SOT363-6
@3
5
4
RV133 2.2K_0402_5%
@
RV133 2.2K_0402_5%
@
1
2
T206 T206
1
R168 0_0402_5%
@
R168 0_0402_5%
@
1
2
Y6
27MHZ 10PF +-10PPM 7V27000050
@ SJ100009700
Y6
27MHZ 10PF +-10PPM 7V27000050
@ SJ100009700
NC
4
OSC
1
OSC
3
NC
2
T207 T207
1
R328
10K_0402_5% DIS@
R328
10K_0402_5% DIS@
1 2
R327
10K_0402_5%
DIS@
R327
10K_0402_5%
DIS@
1 2
R1446
10K_0402_5%
DIS@
R1446
10K_0402_5%
DIS@
1
2
T216 T216
1
R1444 100K_0402_5%
@
R1444 100K_0402_5%
@
1
2
RG126 0_0402_5%
DIS@
RG126 0_0402_5%
DIS@
1
2
DPA DPB
DVO
I2C
GENERAL PURPOSE I / O
DAC1
DDC/AUX
THE RMAL
PLL/CLOCK
DPC
FutureASIC/SEYMOUR/PARK
SEYMOUR/FutureASIC
U? ?
U666B 216-0867030 EXO PRO S3
DIS@
DPA DPB
DVO
I2C
GENERAL PURPOSE I / O
DAC1
DDC/AUX
THE RMAL
PLL/CLOCK
DPC
FutureASIC/SEYMOUR/PARK
SEYMOUR/FutureASIC
U? ?
U666B 216-0867030 EXO PRO S3
DIS@
DMINUS
T2
DPLUS
T4
NC#U1
U1
DBG_DATA7
AC7
NC#Y2
Y2
NC#U5
U5
NC#AA1
AA1
NC#Y4
Y4
DBG_DATA0
Y7
NC#V2
V2
NC#AC5
AC6
NC#W 6
W6
DBG_DATA9
AD7
NC#AA3
AA3
DBG_DATA8
AC8
NC#AA5
AA5
DBG_DATA12
AE8
NC#AA6
AA6
DBG_DATA14
AE9
DBG_DATA3
AB4
DBG_DATA1
Y8
DBG_DATA11
AD9
DBG_DATA2
AB2
DBG_DATA10
AC10
NC#AC6
AC5
NC#V4
V4
DBG_DATA4
AB7
NC#W 1
W1
DBG_DATA5
AB8
NC#W 3
W3
DBG_DATA6
AB9
NC#W 5
W5
GENERICA
AB13
GENERICB
W8
GENERICC
W9
GENERICD
W7
GENERICE
AD10
GPIO_0
U6
GPIO_1
U10
GPIO_10_ROMSCK
P2
GPIO_11
N6
GPIO_12
N5
GPIO_13
N3
GPIO_14_HPD2
Y9
GPIO_15_PW RCNTL_0
N1
GPIO_16
M4
GPIO_17_THERMAL_INT
R6
GPIO_18
W10
GPIO_19_CTF
M2
GPIO_2
T1 0
GPIO_20_PW RCNTL_1
P8
GPIO_21
P7
GPIO_22_ROMCSB
N8
CLKREQB
N7
SMBDATA
U8
SMBCLK
U7
GPIO_5_AC_BATT
T9
GPIO_6
T8
GPIO_7_BLON
T7
GPIO_8_ROMSO
P10
GPIO_9_ROMSI
P4
GENLK_CLK
AL13
HPD1
AC14
HSYNC
AH26
JTAG_TCK
L3
JTAG_TDI
L5
JTAG_TDO
K4
JTAG_TMS
L1
JTAG_TRSTB
L6
NC#AC20
AC20
NC#AD20
AD20
GPIO28_FDO
R5
TS V DD
AD17
TS V S S
AC17
DBG_VREFG
AC16
VSS1DI
AD23
PS_0
AC19
XTALIN
AM28
XTALOUT
AK28
PS_3
AE20
PS_2
AE17
TS _ A
AE19
AUX1N
AD4
AUX1P
AD2
AUX2N
AD11
AUX2P
AD13
AVDD
AG24
AVSSQ
AE22
B
AH24
GPIO_29
AK10
NC#AL9
AL9
AVSSN#AG25
AG25
SW APLOCKB
AH12
NC#AJ9
AJ9
DDC1CLK
AE6
DDC1DATA
AE5
DDC2CLK
AC11
DDC2DATA
AC13
DDCVGACLK
AC1
DDCVGADATA
AC3
NC#AD16
AD16
NC#AE16
AE16
G
AL25
RSVD#AL11
AL11
RSVD#AJ11
AJ11
AVSSN#AJ25
AJ25
R
AM26
CEC_1
AM12
RSVD#AK12
AK12
SW APLOCKA
AG13
AVSSN#AK26
AK26
RSET
AD22
SCL
R1
SDA
R3
NC#AG5
AG5
NC#AG3
AG3
NC#AH1
AH1
NC#AH3
AH3
NC#AK1
AK1
NC#AK3
AK3
NC#AM5
AM5
NC#AK6
AK6
NC#AH6
AH6
NC#AJ7
AJ7
NC#AL7
AL7
NC#AK8
AK8
NC#AF4
AF4
NC#AF2
AF2
NC#AM3
AM3
NC#AK5
AK5
GENLK_VSYNC
AJ13
VDD1DI
AE23
PS_1
AD19
VSYNC
AJ27
GPIO_30
AM10
XO_IN2
AB22
XO_IN
AC22
NC#AF24
AF24
DBG_DATA16
N9
NC#U3
U3
NC#V6
V6
NC#Y6
Y6
DBG_DATA15
L9
DBG_DATA13
Y11
NC#J8
J8
PX_EN
AB16
TE S TE N
K7
R1443
10K_0402_5%
DIS@
R1443
10K_0402_5%
DIS@
1
2
T70T70
1
R5169 4.75K_0402_1% X76@ R5169 4.75K_0402_1% X76@
1 2
C421 1U_0402_6.3V4Z
DIS@
C421 1U_0402_6.3V4Z
DIS@
1
2
R5165 8.45K_0402_1% DIS@ R5165 8.45K_0402_1% DIS@
1 2
RG118 0_0402_5%
@
RG118 0_0402_5%
@
1
2
R1447
10K_0402_5%
DIS@
R1447
10K_0402_5%
DIS@
1
2
Q16A
ME2N7002D1KW-G 2N_SOT363-6
@
Q16A
ME2N7002D1KW-G 2N_SOT363-6
@
6 1
2
C414 10U_0603_6.3V6M
DIS@
C414 10U_0603_6.3V6M
DIS@
1
2
R5121 10K_0402_5% @DIS@R5121 10K_0402_5% @DIS@
12
T212 T212
1
T213 T213
1
R164 0_0402_5%
@
R164 0_0402_5%
@
1
2
Q4110A
ME2N7002D1KW -G 2N_SOT363-6
@
Q4110A
ME2N7002D1KW -G 2N_SOT363-6
@6
1
2
T204 T204
1
C438 0.1U_0402_10V6K
DIS@
C438 0.1U_0402_10V6K
DIS@
1
2
R165 0_0402_5%
@
R165 0_0402_5%
@
1
2
RP13
2.2K_0804_8P4R_5%
@
RP13
2.2K_0804_8P4R_5%
@
1
8
2
7
3
6
4
5
T215 T215
1
Q4109B
ME2N7002D1KW -G 2N_SOT363-6
@DIS@
Q4109B
ME2N7002D1KW -G 2N_SOT363-6
@DIS@
3
5
4
R1448
10K_0402_5%
DIS@
R1448
10K_0402_5%
DIS@
1
2
T211 T211
1
T217 T217
1
U4107
MC74VHC1G08DFT2G_SC70-5
@
U4107
MC74VHC1G08DFT2G_SC70-5
@
B
2
A
1
Y
4
P
5
G
3
T209 T209
1
R5168 4.75K_0402_1% DIS@ R5168 4.75K_0402_1% DIS@
1 2
R5174 8.45K_0402_1% X76@ R5174 8.45K_0402_1% X76@
1 2
R5122 10K_0402_5%
@
R5122 10K_0402_5%
@
12
R1661 0_0402_5%
DIS@
R1661 0_0402_5%
DIS@
1
2
T203T203
1
T218 T218
1
R1439
1K_0402_5%
DIS@
R1439
1K_0402_5%
DIS@
1
2
C350
8.2P_0402_50V_NPO @
C350
8.2P_0402_50V_NPO @
12
T292T292
1
T201 T201
1
R167 0_0402_5%
@DIS@
R167 0_0402_5%
@DIS@
1
2
T221 T221
1
L54
BLM15BD121SN1D_0402
DIS@
L54
BLM15BD121SN1D_0402
DIS@
1
2
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Enable MLPS
13mA
PS_0[3:1]=001 PS_1[3:1]=000 PS_1[5:4]=11PS_0[5:4]=11
C=NCC=NC
PS_2[3:1]=000 PS_2[5:4]=11 PS_3[3:1]=000 PS_3[5:4]=11
R=NC
C=NC
PS_0[1] ROM_CONFIG[0] PS_0[2] ROM_CONFIG[1] PS_0[3] ROM_CONFIG[2] PS_0[4] N/A PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
Strap Name :
PS_1[2] TRAP_BIF_CLK_PM_EN PS_1[1] STRAP_BIF_GEN3_EN_A
Strap Name :
PS_1[5] STRAP_TX_DEEMPH_EN PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING PS_1[3] N/A PS_2[2] N/A PS_2[3] STRAP_BIOS_ROM_EN PS_2[4] STRAP_BIF_VGA_DIS PS_2[5] N/A
Strap Name :
PS_2[1] N/A PS_3[2] BOARD_CONFIG[1] (Memory ID) PS_3[1] BOARD_CONFIG[0] (Memory ID)
Strap Name :
PS_3[5] AUD_PORT_CONN_PINSTRAP[2] PS_3[4] AUD_PORT_CONN_PINSTRAP[1] PS_3[3] BOARD_CONFIG[2] (Memory ID)
680nF NC
Cap (nF) Bitd [5:4] Capacitor Divider Lookup Lable
82nF 10nF 10
0100 11
VGA_AC_BATT_R pull up
NC
Resistor Divider Lookup Lable
R_pd (ohm)
R_pu (ohm)
6.98k4.53k8.45k 3.24k
Bitd [3:1]
2k4.75k
4.75k3.4k4.53k
NC10k5.62k4.99k4.99k2k
101 110 111000 001 010 011 100
0402 1% resistors are equired
External VGA Thermal Sensor
Address:1001100xb (x is R/W bit)
(default)
DB phase : follow AMD check list 20141113
DB phase : follow AMD check list R1445 keep GPIO_5 PU to +3VS_VGA via 4.7kohm (as d
efault)
20141113
DB phase : follow AMD check list R167 non-pop by vendor 20141113
DB phase : follow AMD check list XO_IN/XO_IN2 must PD 20141113
DB phase : follow RRR 20141118
101
SA000077K00 SA00006E8A0
Micron MT41J256M16HA-093G:E
2GB X7662732L01
3.24K 5.62K
H5TC4G63CFR-11C FBGA 96P
110
SA000076P80
K4W4G1646E-BC1A FBGA 96P
2GB 3.4K 10K X7654132L0?
X7654132L0?
X76 P/N
X7662732L02
000
X7662732L04
R5174 R5169
111
4.75K NC
1GB
SA00007PY00
Nanya NT5CB128M16FP-FL
011 100
2GB2GB
X7654132L0? X7662732L03
6.98K 4.99K 4.53K 4.99K
NC 4.75K
Micron MT41J128M16JT-093G:K
SA000067500
1GB
8.45K 2K
K4W2G1646Q-BC1A FBGA 96P Hynix H5TC2G63FR-11C
Memory Type SA000068U40SA00006H400
Configuration Size
1GB
Memory ID
1GB
001 010
2K
4.53K
X7654132L0?
Nanya NT5CB256M16DP-FL
SI:SMBus change to EC_SMB_CK3/DA3 for GPU external
sensor.
SI
：
Change BOM con/ig
PV:GPU external sensor change to unpop.
PS_0 PS_3PS_2PS_1
VGA_SM B_C K3VGA_SM B_D A3
VGA_SM B_C K3 VGA_SM B_D A3 GPU_VID2 VGA_C LKR EQ#_R XTALOUT +TSVDDGPIO19_CTF GPIO28
TESTEN
TESTENJTAG_TCK JTAG_TMS
XO_I N
JTAG_TDOJTAG_TDI JTAG_TRSTB
XO_I N2
GPU_VID4 GPU_VID3
PS_0 PS_1 PS_3PS_2
VGA_SM B_D A3
EC_SMB_DA2
VGA_SM B_C K3
EC_SMB_CK2
JTAG_TMSJTAG_TRSTB JTAG_TDI JTAG_TCK
GPU_CLKREQ#
VGA_AC _BATT_R ACIN
ACIN VGA_AC _BATT_R
GPIO19_CTF
GPU_VID1 GPU_VID5
XTALOUT
VGA_AC _BATT_R
THERM_D+ THERM_D-
GPU_GPIO17
THERM_D+ THERM_D-
GPU_GPIO17
GPU_GPIO0
XO_I N XO_I N2
GPU_CLKREQ#
DGPU_PW ROK
XTALI N
XTALI N_R _R
EC_SMB_CK3 EC_SMB_DA3
THS_SDATHS_SCL
EC_SMB_CK3 EC_SMB_DA3THS_SCL THS_SDA
GPU_VID2
<54>
EC_SMB_DA2
<18,21,25,7>
GPU_VID3
<54>
GPU_VID4
<54>
EC_SMB_CK2
<18,21,25,7>
ACIN
<25,47,8>
GPU_VID1
<54>
GPU_VID5
<54>
VGA_AC _BATT
<25>
+1.8VS_VGA
<28,37,38,56>
+3V_PCH
<10,11,12,24,4,6,7,9>
XTALI N
<28>
+3VS_VGA
<35,37,38,54>
GPU_CLKREQ#
<7>
1.8V_PW RGD
<56>
GPU_PW RGD
<54>
DGPU_PW ROK <8,9>
EC_SMB_CK3 <25> EC_SMB_DA3 <25>
+3VS_VGA
+1.8VS_VGA
+1.8VS_VGA+1.8VS_VGA +1.8VS_VGA+1.8VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+3VS_VGA
+1.8VS_VGA +3V_PCH
+3V_PCH
+3VS_VGA
+3VS
+3VS_VGA
+3VS
+3VS_VGA
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MSIC
Custom
36 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MSIC
Custom
36 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title
Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MSIC
Custom
36 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
RV134 2.2K_0402_5%
@
RV134 2.2K_0402_5%
@
1
2
UV13 NCT7718W _MSOP8
@
UV13 NCT7718W _MSOP8
@
ALERT#
6
T_ CRIT#
4
GND
5
D+
2
D-
3
SCL
8
SDA
7
VDD
1
T208 T208
1
C341
8.2P_0402_50V_NPO
@
C341
8.2P_0402_50V_NPO
@
12
R349
10M_0402_5%
@
R349
10M_0402_5%
@
1
2
Q16B
ME2N7002D1KW-G 2N_SOT363-6
@
Q16B
ME2N7002D1KW-G 2N_SOT363-6
@
3
5
4
T202 T202
1
RP34
10K_8P4R_5%
@
RP34
10K_8P4R_5%
@
1
8
2
7
3
6
4
5
RP35
10K_8P4R_5%
@
RP35
10K_8P4R_5%
@
18
27
36
45
R5164 4.75K_0402_1% DIS@ R5164 4.75K_0402_1% DIS@
1 2
Q2416B
ME2N7002D1KW -G 2N_SOT363-6
DIS@
Q2416B
ME2N7002D1KW -G 2N_SOT363-6
DIS@
3
5
4
C5203
0.082U_0402_16V6K
DIS@ C5203
0.082U_0402_16V6K
DIS@
1 2
CV271 0.1U_0402_16V4Z
@
CV271 0.1U_0402_16V4Z
@
1
2
T214 T214
1
R169 0_0402_5%
@
R169 0_0402_5%
@
1
2
R1445 4.7K_0402_5%
DIS@
R1445 4.7K_0402_5%
DIS@
1
2
R174 0_0402_5%
DIS@
R174 0_0402_5%
DIS@
1
2
R1442 10K_0402_5%
DIS@
R1442 10K_0402_5%
DIS@
1
2
Q2416A
ME2N7002D1KW -G 2N_SOT363-6
DIS@
Q2416A
ME2N7002D1KW -G 2N_SOT363-6
DIS@
6
1
2
T210 T210
1
R5167 8.45K_0402_1% @R5167 8.45K_0402_1% @
1 2
RG125 0_0402_5%
@
RG125 0_0402_5%
@
1
2
R5166 2K_0402_1% DIS@ R5166 2K_0402_1% DIS@
1 2
R162 0_0402_5%
@
R162 0_0402_5%
@
1
2
C5213
68P_0402_50V8J
@DIS@
C5213
68P_0402_50V8J
@DIS@
1 2
T291 T291
1
T205 T205
1
Q4110B
ME2N7002D1KW -G 2N_SOT363-6
@
Q4110B
ME2N7002D1KW -G 2N_SOT363-6
@3
5
4
RV133 2.2K_0402_5%
@
RV133 2.2K_0402_5%
@
1
2
T206 T206
1
R168 0_0402_5%
@
R168 0_0402_5%
@
1
2
Y6
27MHZ 10PF +-10PPM 7V27000050
@ SJ100009700
Y6
27MHZ 10PF +-10PPM 7V27000050
@ SJ100009700
NC
4
OSC
1
OSC
3
NC
2
T207 T207
1
R328
10K_0402_5% DIS@
R328
10K_0402_5% DIS@
1 2
R327
10K_0402_5%
DIS@
R327
10K_0402_5%
DIS@
1 2
R1446
10K_0402_5%
DIS@
R1446
10K_0402_5%
DIS@
1
2
T216 T216
1
R1444 100K_0402_5%
@
R1444 100K_0402_5%
@
1
2
RG126 0_0402_5%
DIS@
RG126 0_0402_5%
DIS@
1
2
DPA DPB
DVO
I2C
GENERAL PURPOSE I / O
DAC1
DDC/AUX
THE RMAL
PLL/CLOCK
DPC
FutureASIC/SEYMOUR/PARK
SEYMOUR/FutureASIC
U? ?
U666B 216-0867030 EXO PRO S3
DIS@
DPA DPB
DVO
I2C
GENERAL PURPOSE I / O
DAC1
DDC/AUX
THE RMAL
PLL/CLOCK
DPC
FutureASIC/SEYMOUR/PARK
SEYMOUR/FutureASIC
U? ?
U666B 216-0867030 EXO PRO S3
DIS@
DMINUS
T2
DPLUS
T4
NC#U1
U1
DBG_DATA7
AC7
NC#Y2
Y2
NC#U5
U5
NC#AA1
AA1
NC#Y4
Y4
DBG_DATA0
Y7
NC#V2
V2
NC#AC5
AC6
NC#W 6
W6
DBG_DATA9
AD7
NC#AA3
AA3
DBG_DATA8
AC8
NC#AA5
AA5
DBG_DATA12
AE8
NC#AA6
AA6
DBG_DATA14
AE9
DBG_DATA3
AB4
DBG_DATA1
Y8
DBG_DATA11
AD9
DBG_DATA2
AB2
DBG_DATA10
AC10
NC#AC6
AC5
NC#V4
V4
DBG_DATA4
AB7
NC#W 1
W1
DBG_DATA5
AB8
NC#W 3
W3
DBG_DATA6
AB9
NC#W 5
W5
GENERICA
AB13
GENERICB
W8
GENERICC
W9
GENERICD
W7
GENERICE
AD10
GPIO_0
U6
GPIO_1
U10
GPIO_10_ROMSCK
P2
GPIO_11
N6
GPIO_12
N5
GPIO_13
N3
GPIO_14_HPD2
Y9
GPIO_15_PW RCNTL_0
N1
GPIO_16
M4
GPIO_17_THERMAL_INT
R6
GPIO_18
W10
GPIO_19_CTF
M2
GPIO_2
T1 0
GPIO_20_PW RCNTL_1
P8
GPIO_21
P7
GPIO_22_ROMCSB
N8
CLKREQB
N7
SMBDATA
U8
SMBCLK
U7
GPIO_5_AC_BATT
T9
GPIO_6
T8
GPIO_7_BLON
T7
GPIO_8_ROMSO
P10
GPIO_9_ROMSI
P4
GENLK_CLK
AL13
HPD1
AC14
HSYNC
AH26
JTAG_TCK
L3
JTAG_TDI
L5
JTAG_TDO
K4
JTAG_TMS
L1
JTAG_TRSTB
L6
NC#AC20
AC20
NC#AD20
AD20
GPIO28_FDO
R5
TS V DD
AD17
TS V S S
AC17
DBG_VREFG
AC16
VSS1DI
AD23
PS_0
AC19
XTALIN
AM28
XTALOUT
AK28
PS_3
AE20
PS_2
AE17
TS _ A
AE19
AUX1N
AD4
AUX1P
AD2
AUX2N
AD11
AUX2P
AD13
AVDD
AG24
AVSSQ
AE22
B
AH24
GPIO_29
AK10
NC#AL9
AL9
AVSSN#AG25
AG25
SW APLOCKB
AH12
NC#AJ9
AJ9
DDC1CLK
AE6
DDC1DATA
AE5
DDC2CLK
AC11
DDC2DATA
AC13
DDCVGACLK
AC1
DDCVGADATA
AC3
NC#AD16
AD16
NC#AE16
AE16
G
AL25
RSVD#AL11
AL11
RSVD#AJ11
AJ11
AVSSN#AJ25
AJ25
R
AM26
CEC_1
AM12
RSVD#AK12
AK12
SW APLOCKA
AG13
AVSSN#AK26
AK26
RSET
AD22
SCL
R1
SDA
R3
NC#AG5
AG5
NC#AG3
AG3
NC#AH1
AH1
NC#AH3
AH3
NC#AK1
AK1
NC#AK3
AK3
NC#AM5
AM5
NC#AK6
AK6
NC#AH6
AH6
NC#AJ7
AJ7
NC#AL7
AL7
NC#AK8
AK8
NC#AF4
AF4
NC#AF2
AF2
NC#AM3
AM3
NC#AK5
AK5
GENLK_VSYNC
AJ13
VDD1DI
AE23
PS_1
AD19
VSYNC
AJ27
GPIO_30
AM10
XO_IN2
AB22
XO_IN
AC22
NC#AF24
AF24
DBG_DATA16
N9
NC#U3
U3
NC#V6
V6
NC#Y6
Y6
DBG_DATA15
L9
DBG_DATA13
Y11
NC#J8
J8
PX_EN
AB16
TE S TE N
K7
R1443
10K_0402_5%
DIS@
R1443
10K_0402_5%
DIS@
1
2
T70T70
1
R5169 4.75K_0402_1% X76@ R5169 4.75K_0402_1% X76@
1 2
C421 1U_0402_6.3V4Z
DIS@
C421 1U_0402_6.3V4Z
DIS@
1
2
R5165 8.45K_0402_1% DIS@ R5165 8.45K_0402_1% DIS@
1 2
RG118 0_0402_5%
@
RG118 0_0402_5%
@
1
2
R1447
10K_0402_5%
DIS@
R1447
10K_0402_5%
DIS@
1
2
Q16A
ME2N7002D1KW-G 2N_SOT363-6
@
Q16A
ME2N7002D1KW-G 2N_SOT363-6
@
6 1
2
C414 10U_0603_6.3V6M
DIS@
C414 10U_0603_6.3V6M
DIS@
1
2
R5121 10K_0402_5% @DIS@R5121 10K_0402_5% @DIS@
12
T212 T212
1
T213 T213
1
R164 0_0402_5%
@
R164 0_0402_5%
@
1
2
Q4110A
ME2N7002D1KW -G 2N_SOT363-6
@
Q4110A
ME2N7002D1KW -G 2N_SOT363-6
@6
1
2
T204 T204
1
C438 0.1U_0402_10V6K
DIS@
C438 0.1U_0402_10V6K
DIS@
1
2
R165 0_0402_5%
@
R165 0_0402_5%
@
1
2
RP13
2.2K_0804_8P4R_5%
@
RP13
2.2K_0804_8P4R_5%
@
1
8
2
7
3
6
4
5
T215 T215
1
Q4109B
ME2N7002D1KW -G 2N_SOT363-6
@DIS@
Q4109B
ME2N7002D1KW -G 2N_SOT363-6
@DIS@
3
5
4
R1448
10K_0402_5%
DIS@
R1448
10K_0402_5%
DIS@
1
2
T211 T211
1
T217 T217
1
U4107
MC74VHC1G08DFT2G_SC70-5
@
U4107
MC74VHC1G08DFT2G_SC70-5
@
B
2
A
1
Y
4
P
5
G
3
T209 T209
1
R5168 4.75K_0402_1% DIS@ R5168 4.75K_0402_1% DIS@
1 2
R5174 8.45K_0402_1% X76@ R5174 8.45K_0402_1% X76@
1 2
R5122 10K_0402_5%
@
R5122 10K_0402_5%
@
12
R1661 0_0402_5%
DIS@
R1661 0_0402_5%
DIS@
1
2
T203T203
1
T218 T218
1
R1439
1K_0402_5%
DIS@
R1439
1K_0402_5%
DIS@
1
2
C350
8.2P_0402_50V_NPO @
C350
8.2P_0402_50V_NPO @
12
T292T292
1
T201 T201
1
R167 0_0402_5%
@DIS@
R167 0_0402_5%
@DIS@
1
2
T221 T221
1
L54
BLM15BD121SN1D_0402
DIS@
L54
BLM15BD121SN1D_0402
DIS@
1
2
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
No Use GPU Display Port outpud
+1.05VS to +1.05VS_VGA (2A)
+3VS to +3VS_VGA (25mA)
+1.5VS to +1.5VS_VGA (2.096A)
370mA (HDMI) 188mA (Display Port)
280mA
AMD feedback : Exo ASIC normally is 0.95v , can support to 1.05v functionally.
60mA
SI phase : Change R4109 from 200K to 6.98K 20141214
SI phase : Change C4122 from 0.01u to 0.22u 20141214
SI phase : Change C4109 from 0.01u to 0.027u 20141214
PV phase : R319,R320 Change to 0-ohm shortpad. 20150125
0.95VSG_1.8VGS_GATE
PXS_PWREN#
PXS_PWREN#
PXS_PWREN#
DGPU_PWR_EN
PXS_PWREN#
1.5VSG_GATE
PXS_PWREN#
PXS_PWREN#
+DP_VDDR +DP_VDDC
DGPU_PWR_EN
DGPU_PWR_EN
<25,54,8,9>
+1.5VS
<12,23,53,6>
+1.5VS_VGA
<38,39,40,41>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,56,6,7,8,9>
+3VS_VGA
<35,36,38,54>
+5VALW
<15,19,24,26,29,30,32,34,48,49,56>
+VGA_CORE
<38,54,55>
+1.05VS
<11,12,24,25,28,34,50,51>
+1.05VS_VGA
<35,38>
+19.5VB
<19,47,48,49,51,53,54>
+5VS
<19,20,23,24,25,26,29,33,51,54>
+3VALW
<12,19,22,24,25,26,28,29,32,48,50,53,56,7>
0.95VSG_1.8VGS_GATE
<56>
+1.05VS
+5VS
+1.05VS_VGA
+VGA_CORE
+5VALW
+1.5VS
+19.5VB
+1.5VS_VGA
+1.8VS_VGA
+1.05VS_VGA
+1.5VS +1.5VS_VGA +3VS +3VS_VGA
+5VALW +VGA_CORE
+1.05VS +1.05VS_VGA +19.5VB
+5VS
+3VS_VGA
+3VALW
+3VS
+3VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power/GND
Custom
37 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power/GND
Custom
37 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power/GND
Custom
37 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
GND
U? ?
U666E 216-0867030 EXO PRO S3
DIS@
GND
U? ?
U666E 216-0867030 EXO PRO S3
DIS@
GND
AA27
GND
AF32
GND
AG27
GND
AH32
GND
K28
GND
K32
GND
L27
GND
M32
GND
N25
GND
N27
GND
P25
GND
AB24
GND
P32
GND
R27
GND
T25
GND
T32
GND
U25
GND
U27
GND
V32
GND
W25
GND
W26
GND
W27
GND
AB32
GND
Y25
GND
Y32
GND
AC24
GND
AC26
GND
AC27
GND
AD25
GND
AD32
GND
AE27
VSS_MECH
A32
VSS_MECH
AM1
VSS_MECH
AM32
GND
A3
GND
AD8
GND
AE7
GND
AG12
GND
AH10
GND
AH28
GND
B10
GND
B12
GND
B14
GND
B16
GND
B18
GND
A30
GND
B20
GND
B22
GND
B24
GND
B26
GND
B6
GND
B8
GND
C1
GND
C32
GND
E28
GND
F10
GND
AA13
GND
F12
GND
F14
GND
F16
GND
F18
GND
F2
GND
F20
GND
F22
GND
F24
GND
F26
GND
F6
GND
AA16
GND
F8
GND
G10
GND
G27
GND
G31
GND
G8
GND
H14
GND
H17
GND
H2
GND
H20
GND
H6
GND
AB10
GND
J27
GND
J31
GND
K11
GND
K2
GND
K22
GND
K6
GND
M6
GND
N13
GND
AB15
GND
N16
GND
N18
GND
N21
GND
P6
GND
P9
GND
R12
GND
R15
GND
R17
GND
R20
GND
T13
GND
AB6
GND
T16
GND
T18
GND
T21
GND
T6
GND
U15
GND
U17
GND
U20
GND
U9
GND
V13
GND
AC9
GND
V16
GND
V18
GND
Y10
GND
Y15
GND
Y17
GND
Y20
GND
AD6
GND
R11
GND
T11
GND
N11
GND
M12
GND
AA11
GND
V11
Q4105B
ME2N7002D1KW-G 2N_SOT363-6
DIS@
Q4105B
ME2N7002D1KW-G 2N_SOT363-6
DIS@
3
5
4
C4107
1U_0402_6.3V4Z
DIS@
C4107
1U_0402_6.3V4Z
DIS@
1 2
C450 1U_0402_6.3V4Z
@
C450 1U_0402_6.3V4Z
@
1 2
NC/DP POWER
DP POWER
U? ?
U666G 216-0867030 EXO PRO S3
DIS@
NC/DP POWER
DP POWER
U? ?
U666G 216-0867030 EXO PRO S3
DIS@
NC#AG8
AG8
NC#AG7
AG7
NC#AF6
AF6
NC#AF7
AF7
NC#AE11
AE11
NC#AF11
AF11
NC#AE1
AE1
NC#AE3
AE3
NC#AG1
AG1
NC#AG6
AG6
NC#AH5
AH5
NC#AE10
AE10
NC#AG10
AG10
NC#AG11
AG11
NC#AF8
AF8
NC#AF9
AF9
NC#AF10
AF10
NC#AG9
AG9
NC#AH8
AH8
NC#AM6
AM6
NC#AM8
AM8
NC#AE13
AE13
NC#AF13
AF13
DP_VDDR#AG18
AG18
DP_VSSR
AF19
DP_VDDC#AG20
AG20
DP_VDDC#AG21
AG21
DP_VDDR#AG15
AG15
DP_VDDR#AG16
AG16
DP_VSSR
AG14
DP_VSSR
AH14
DP_VSSR
AM14
DP_VSSR
AM16
DP_VSSR
AM18
DPAB_CALR
AF17
DP_VDDR#AG19
AG19
DP_VSSR
AF20
DP_VDDC#AF22
AF22
DP_VDDC#AG22
AG22
DP_VDDR#AF16
AF16
DP_VDDR#AG17
AG17
DP_VSSR
AF23
DP_VSSR
AG23
DP_VSSR
AM20
DP_VSSR
AM22
DP_VSSR
AM24
DP_VDDR#AF14
AF14
DP_VSSR
AE14
DP_VDDC#AD14
AD14
R4114 470_0603_5% DIS@ R4114 470_0603_5% DIS@
12
C4115
1U_0402_6.3V4Z
DIS@
C4115
1U_0402_6.3V4Z
DIS@
1 2
R4101 200K_0402_5%
DIS@
R4101 200K_0402_5%
DIS@
1
2
R319
0_0603_5%
short@R319
0_0603_5%
short@
1
2
R4107 10_0603_5% DIS@ R4107 10_0603_5% DIS@
12
C4105
0.1U_0402_16V7K
DIS@
C4105
0.1U_0402_16V7K
DIS@
1 2
U4102 AO4354_SO8 DIS@ U4102 AO4354_SO8 DIS@
6
2
4
1 3
578
C4122
0.22U_0402_10V DIS@
C4122
0.22U_0402_10V DIS@
1 2
R4102 10_0603_5% DIS@ R4102 10_0603_5% DIS@
12
R4113 100K_0402_5% DIS@ R4113 100K_0402_5% DIS@
12
R4103 1.5M_0402_5%
@
R4103 1.5M_0402_5%
@
1 2
R4109 6.98K_0402_5%
DIS@
R4109 6.98K_0402_5%
DIS@
1
2
C4113
0.1U_0402_16V7K
DIS@
C4113
0.1U_0402_16V7K
DIS@
1 2
QV4101A ME2N7002D1KW-G 2N_SOT363-6 DIS@ QV4101A ME2N7002D1KW-G 2N_SOT363-6 DIS@
6 1
2
QV4101B ME2N7002D1KW-G 2N_SOT363-6 DIS@QV4101B ME2N7002D1KW-G 2N_SOT363-6 DIS@
3
5
4
C447 0.1U_0402_10V6K
@
C447 0.1U_0402_10V6K
@
1 2
C446 1U_0402_6.3V4Z
@
C446 1U_0402_6.3V4Z
@
1 2
C4111
0.1U_0402_16V7K
DIS@
C4111
0.1U_0402_16V7K
DIS@
1 2
Q4105A
ME2N7002D1KW-G 2N_SOT363-6
DIS@ Q4105A
ME2N7002D1KW-G 2N_SOT363-6
DIS@
6 1
2
U4101 AO4354_SO8 DIS@ U4101 AO4354_SO8 DIS@
6
2
4
1 3
578
Q4102A ME2N7002D1KW-G 2N_SOT363-6 DIS@ Q4102A ME2N7002D1KW-G 2N_SOT363-6 DIS@
6 1
2
C4114
10U_0603_6.3V6M
DIS@
C4114
10U_0603_6.3V6M
DIS@
1 2
JG3
JUMP_43X39
@
JG3
JUMP_43X39
@
1
1
2
2
R320
0_0603_5%
short@R320
0_0603_5%
short@
1
2
R4115
100K_0402_5% DIS@
R4115
100K_0402_5% DIS@
1 2
C4109 0.027U_0402_16V DIS@ C4109 0.027U_0402_16V DIS@
1 2
Q4102B
ME2N7002D1KW-G 2N_SOT363-6 DIS@
Q4102B
ME2N7002D1KW-G 2N_SOT363-6 DIS@
3
5
4
C4124
0.1U_0402_16V7K
DIS@
C4124
0.1U_0402_16V7K
DIS@
1 2
R4104
1.5M_0402_5%
@
R4104
1.5M_0402_5%
@
1 2
C451 0.1U_0402_10V6K
@
C451 0.1U_0402_10V6K
@
1 2
C4106
10U_0603_6.3V6M
DIS@
C4106
10U_0603_6.3V6M
DIS@
1 2
C4112 470P_0402_50V7K
DIS@
C4112 470P_0402_50V7K
DIS@
1
2
AOZ1336DI DFN 8PU4103 SA00006U600
DIS@
AOZ1336DI DFN 8PU4103 SA00006U600
DIS@
CT
6
VBIAS
4
GND
5
GND
9
VOUT
7
VOUT
8
VIN
2
ON
3
VIN
1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
No Use GPU Display Port outpud
+1.05VS to +1.05VS_VGA (2A)
+3VS to +3VS_VGA (25mA)
+1.5VS to +1.5VS_VGA (2.096A)
370mA (HDMI) 188mA (Display Port)
280mA
AMD feedback : Exo ASIC normally is 0.95v , can support to 1.05v functionally.
60mA
SI phase : Change R4109 from 200K to 6.98K 20141214
SI phase : Change C4122 from 0.01u to 0.22u 20141214
SI phase : Change C4109 from 0.01u to 0.027u 20141214
PV phase : R319,R320 Change to 0-ohm shortpad. 20150125
0.95VSG_1.8VGS_GATE
PXS_PWREN#
PXS_PWREN#
PXS_PWREN#
DGPU_PWR_EN
PXS_PWREN#
1.5VSG_GATE
PXS_PWREN#
PXS_PWREN#
+DP_VDDR +DP_VDDC
DGPU_PWR_EN
DGPU_PWR_EN
<25,54,8,9>
+1.5VS
<12,23,53,6>
+1.5VS_VGA
<38,39,40,41>
+3VS
<12,15,16,18,19,20,21,22,23,24,25,27,31,32,33,34,35
,36,56,6,7,8,9>
+3VS_VGA
<35,36,38,54>
+5VALW
<15,19,24,26,29,30,32,34,48,49,56>
+VGA_CORE
<38,54,55>
+1.05VS
<11,12,24,25,28,34,50,51>
+1.05VS_VGA
<35,38>
+19.5VB
<19,47,48,49,51,53,54>
+5VS
<19,20,23,24,25,26,29,33,51,54>
+3VALW
<12,19,22,24,25,26,28,29,32,48,50,53,56,7>
0.95VSG_1.8VGS_GATE
<56>
+1.05VS
+5VS
+1.05VS_VGA
+VGA_CORE
+5VALW
+1.5VS
+19.5VB
+1.5VS_VGA
+1.8VS_VGA
+1.05VS_VGA
+1.5VS +1.5VS_VGA +3VS +3VS_VGA
+5VALW +VGA_CORE
+1.05VS +1.05VS_VGA +19.5VB
+5VS
+3VS_VGA
+3VALW
+3VS
+3VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power/GND
Custom
37 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power/GND
Custom
37 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power/GND
Custom
37 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
GND
U? ?
U666E 216-0867030 EXO PRO S3
DIS@
GND
U? ?
U666E 216-0867030 EXO PRO S3
DIS@
GND
AA27
GND
AF32
GND
AG27
GND
AH32
GND
K28
GND
K32
GND
L27
GND
M32
GND
N25
GND
N27
GND
P25
GND
AB24
GND
P32
GND
R27
GND
T25
GND
T32
GND
U25
GND
U27
GND
V32
GND
W25
GND
W26
GND
W27
GND
AB32
GND
Y25
GND
Y32
GND
AC24
GND
AC26
GND
AC27
GND
AD25
GND
AD32
GND
AE27
VSS_MECH
A32
VSS_MECH
AM1
VSS_MECH
AM32
GND
A3
GND
AD8
GND
AE7
GND
AG12
GND
AH10
GND
AH28
GND
B10
GND
B12
GND
B14
GND
B16
GND
B18
GND
A30
GND
B20
GND
B22
GND
B24
GND
B26
GND
B6
GND
B8
GND
C1
GND
C32
GND
E28
GND
F10
GND
AA13
GND
F12
GND
F14
GND
F16
GND
F18
GND
F2
GND
F20
GND
F22
GND
F24
GND
F26
GND
F6
GND
AA16
GND
F8
GND
G10
GND
G27
GND
G31
GND
G8
GND
H14
GND
H17
GND
H2
GND
H20
GND
H6
GND
AB10
GND
J27
GND
J31
GND
K11
GND
K2
GND
K22
GND
K6
GND
M6
GND
N13
GND
AB15
GND
N16
GND
N18
GND
N21
GND
P6
GND
P9
GND
R12
GND
R15
GND
R17
GND
R20
GND
T13
GND
AB6
GND
T16
GND
T18
GND
T21
GND
T6
GND
U15
GND
U17
GND
U20
GND
U9
GND
V13
GND
AC9
GND
V16
GND
V18
GND
Y10
GND
Y15
GND
Y17
GND
Y20
GND
AD6
GND
R11
GND
T11
GND
N11
GND
M12
GND
AA11
GND
V11
Q4105B
ME2N7002D1KW-G 2N_SOT363-6
DIS@
Q4105B
ME2N7002D1KW-G 2N_SOT363-6
DIS@
3
5
4
C4107
1U_0402_6.3V4Z
DIS@
C4107
1U_0402_6.3V4Z
DIS@
1 2
C450 1U_0402_6.3V4Z
@
C450 1U_0402_6.3V4Z
@
1 2
NC/DP POWER
DP POWER
U? ?
U666G 216-0867030 EXO PRO S3
DIS@
NC/DP POWER
DP POWER
U? ?
U666G 216-0867030 EXO PRO S3
DIS@
NC#AG8
AG8
NC#AG7
AG7
NC#AF6
AF6
NC#AF7
AF7
NC#AE11
AE11
NC#AF11
AF11
NC#AE1
AE1
NC#AE3
AE3
NC#AG1
AG1
NC#AG6
AG6
NC#AH5
AH5
NC#AE10
AE10
NC#AG10
AG10
NC#AG11
AG11
NC#AF8
AF8
NC#AF9
AF9
NC#AF10
AF10
NC#AG9
AG9
NC#AH8
AH8
NC#AM6
AM6
NC#AM8
AM8
NC#AE13
AE13
NC#AF13
AF13
DP_VDDR#AG18
AG18
DP_VSSR
AF19
DP_VDDC#AG20
AG20
DP_VDDC#AG21
AG21
DP_VDDR#AG15
AG15
DP_VDDR#AG16
AG16
DP_VSSR
AG14
DP_VSSR
AH14
DP_VSSR
AM14
DP_VSSR
AM16
DP_VSSR
AM18
DPAB_CALR
AF17
DP_VDDR#AG19
AG19
DP_VSSR
AF20
DP_VDDC#AF22
AF22
DP_VDDC#AG22
AG22
DP_VDDR#AF16
AF16
DP_VDDR#AG17
AG17
DP_VSSR
AF23
DP_VSSR
AG23
DP_VSSR
AM20
DP_VSSR
AM22
DP_VSSR
AM24
DP_VDDR#AF14
AF14
DP_VSSR
AE14
DP_VDDC#AD14
AD14
R4114 470_0603_5% DIS@ R4114 470_0603_5% DIS@
12
C4115
1U_0402_6.3V4Z
DIS@
C4115
1U_0402_6.3V4Z
DIS@
1 2
R4101 200K_0402_5%
DIS@
R4101 200K_0402_5%
DIS@
1
2
R319
0_0603_5%
short@R319
0_0603_5%
short@
1
2
R4107 10_0603_5% DIS@ R4107 10_0603_5% DIS@
12
C4105
0.1U_0402_16V7K
DIS@
C4105
0.1U_0402_16V7K
DIS@
1 2
U4102 AO4354_SO8 DIS@ U4102 AO4354_SO8 DIS@
6
2
4
1 3
578
C4122
0.22U_0402_10V DIS@
C4122
0.22U_0402_10V DIS@
1 2
R4102 10_0603_5% DIS@ R4102 10_0603_5% DIS@
12
R4113 100K_0402_5% DIS@ R4113 100K_0402_5% DIS@
12
R4103 1.5M_0402_5%
@
R4103 1.5M_0402_5%
@
1 2
R4109 6.98K_0402_5%
DIS@
R4109 6.98K_0402_5%
DIS@
1
2
C4113
0.1U_0402_16V7K
DIS@
C4113
0.1U_0402_16V7K
DIS@
1 2
QV4101A ME2N7002D1KW-G 2N_SOT363-6 DIS@ QV4101A ME2N7002D1KW-G 2N_SOT363-6 DIS@
6 1
2
QV4101B ME2N7002D1KW-G 2N_SOT363-6 DIS@QV4101B ME2N7002D1KW-G 2N_SOT363-6 DIS@
3
5
4
C447 0.1U_0402_10V6K
@
C447 0.1U_0402_10V6K
@
1 2
C446 1U_0402_6.3V4Z
@
C446 1U_0402_6.3V4Z
@
1 2
C4111
0.1U_0402_16V7K
DIS@
C4111
0.1U_0402_16V7K
DIS@
1 2
Q4105A
ME2N7002D1KW-G 2N_SOT363-6
DIS@ Q4105A
ME2N7002D1KW-G 2N_SOT363-6
DIS@
6 1
2
U4101 AO4354_SO8 DIS@ U4101 AO4354_SO8 DIS@
6
2
4
1 3
578
Q4102A ME2N7002D1KW-G 2N_SOT363-6 DIS@ Q4102A ME2N7002D1KW-G 2N_SOT363-6 DIS@
6 1
2
C4114
10U_0603_6.3V6M
DIS@
C4114
10U_0603_6.3V6M
DIS@
1 2
JG3
JUMP_43X39
@
JG3
JUMP_43X39
@
1
1
2
2
R320
0_0603_5%
short@R320
0_0603_5%
short@
1
2
R4115
100K_0402_5% DIS@
R4115
100K_0402_5% DIS@
1 2
C4109 0.027U_0402_16V DIS@ C4109 0.027U_0402_16V DIS@
1 2
Q4102B
ME2N7002D1KW-G 2N_SOT363-6 DIS@
Q4102B
ME2N7002D1KW-G 2N_SOT363-6 DIS@
3
5
4
C4124
0.1U_0402_16V7K
DIS@
C4124
0.1U_0402_16V7K
DIS@
1 2
R4104
1.5M_0402_5%
@
R4104
1.5M_0402_5%
@
1 2
C451 0.1U_0402_10V6K
@
C451 0.1U_0402_10V6K
@
1 2
C4106
10U_0603_6.3V6M
DIS@
C4106
10U_0603_6.3V6M
DIS@
1 2
C4112 470P_0402_50V7K
DIS@
C4112 470P_0402_50V7K
DIS@
1
2
AOZ1336DI DFN 8PU4103 SA00006U600
DIS@
AOZ1336DI DFN 8PU4103 SA00006U600
DIS@
CT
6
VBIAS
4
GND
5
GND
9
VOUT
7
VOUT
8
VIN
2
ON
3
VIN
1
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
VDDR1 VDD_CT VDDR3VDDR4MPLL_PVDD SPLL_PVDDSPLL_VDDC PCIE_PVDDPCIE_VDDCVDDC BIF_VDDCVDDCI
355
1.5A
13mA 25mA
(300mA)
130mA
75mA
100mA 100mA
2.5ATBD 1.4A3.5A
111 0 2 (1@) 1
0
00
1
1
1
11
1
1
11
11
12 (1@) 5 (1@) 05 (1@) 10 (2@) 0
0
00130
+DP_VDDR +DP_VDDC
0.1uF
1uF
10uF
+VGA_CORE +TSVDD 13mA 1 1
110uF 1uF 0.1uF
+0.95VS_VGA
10uF 1uF 0.1uF
+1.5VS_VGA
10uF
+1.8VS_VGA
0.1uF
1uF
0.1uF
1uF
10uF
+3VS_VGA
0
00
00
0
1.4A
21A (VDDC + VDDCI (Merged) - PRO S3 (DDR3))
1A 13mA 25mA 90mA 75mA 100mA
+PCIE_PVDD: 50mA (PCIE2.0) 80mA (PCIE3.0)
+PCIE_VDDC: 1.88A (PCIE2.0) 2.5A (PCIE3.0)
PV:R398 change to 0-ohm shortpad
+MPLL_PVDD +SPLL_PVDD
+SPLL_VDDC+VDD_CT
+BIF_VDDC
+VDDR3
+1.05VS_VGA
<35,37>
+3VS_VGA
<35,36,37,54>
+VGA_CORE
<37,54,55>
+1.8VS_VGA
<28,36,37,56>
+1.5VS_VGA
<37,39,40,41>
+VGA_CORE
+1.05VS_VGA
+1.8VS_VGA
+1.05VS_VGA
+VGA_CORE
+3VS_VGA
+1.8VS_VGA
+1.8VS_VGA
+1.8VS_VGA
+1.05VS_VGA
+1.5VS_VGA
+1.05VS_VGA +3VS_VGA +VGA_CORE+1.8VS_VGA +1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power
Custom
38 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power
Custom
38 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power
Custom
38 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
POWER
PLL
PCIE
CORE
ME M I/ O
I/ O
LEVEL TRANSLATIO N
ISO LATED CORE I/O
U? ?
U666D 216-0867030 EXO PRO S3
DIS@
POWER
PLL
PCIE
CORE
ME M I/ O
I/ O
LEVEL TRANSLATIO N
ISO LATED CORE I/O
U? ?
U666D 216-0867030 EXO PRO S3
DIS@
PCIE_PVDD
AM30
MPLL_PVDD
L8
SPLL_PVDD
H7
PCIE_VDDC
L23
PCIE_VDDC
T22
PCIE_VDDC
U22
PCIE_VDDC
V22
PCIE_VDDC
L24
PCIE_VDDC
L25
PCIE_VDDC
L26
PCIE_VDDC
M22
PCIE_VDDC
N22
PCIE_VDDC
N23
PCIE_VDDC
N24
PCIE_VDDC
R22
NC#AB23
AB23
NC#AC23
AC23
NC#AD24
AD24
NC#AE24
AE24
NC#AE25
AE25
NC#AE26
AE26
NC#AF25
AF25
NC#AG26
AG26
SPLL_VDDC
H8
SPLL_PVSS
J7
VDDR1
H13
VDDR1
K24
VDDR1
K9
VDDR1
L11
VDDR1
L12
VDDR1
L13
VDDR1
L20
VDDR1
L21
VDDR1
L22
VDDR1
H16
VDDR1
H19
VDDR1
J10
VDDR1
J23
VDDR1
J24
VDDR1
J9
VDDR1
K10
VDDR1
K23
VDDR3
AA17
VDDR3
AA18
VDDR3
AB17
VDDR3
AB18
VDDR4
V12
VDDR4
Y12
VDD_CT
AA20
VDD_CT
AA21
VDD_CT
AB20
VDD_CT
AB21
VDDC
AA15
VDDC
T17
VDDC
T20
VDDC
U13
VDDC
U16
VDDC
U18
BIF_VDDC
U21
VDDC
V15
VDDC
V17
VDDC
V20
VDDC
V21
VDDC
N15
VDDC
Y13
VDDC
Y16
VDDC
Y18
VDDC
Y21
VDDC
N17
VDDC
R13
VDDC
R16
VDDC
R18
BIF_VDDC
R21
VDDC
T12
VDDC
T15
VDDCI
M13
VDDCI
M15
VDDCI
M16
VDDCI
M17
VDDC
M11
VDDCI
M18
VDDCI
M21
VDDCI
M20
VDDCI
N20
VDDC
U11
VDDR4
U12
VDDC
AA12
VDDC
N12
C380 10U_0603_6.3V6M
DIS@
C380 10U_0603_6.3V6M
DIS@
1 2
C398 1U_0402_6.3V4Z
DIS@
C398 1U_0402_6.3V4Z
DIS@
1 2
C416 1U_0402_6.3V4Z
@
C416 1U_0402_6.3V4Z
@
1 2
C389 0.1U_0402_10V6K
DIS@
C389 0.1U_0402_10V6K
DIS@
1 2
C390 0.1U_0402_10V6K
DIS@
C390 0.1U_0402_10V6K
DIS@
1 2
C407 1U_0402_6.3V4Z
DIS@
C407 1U_0402_6.3V4Z
DIS@
1 2
C435 0.1U_0402_10V6K
DIS@
C435 0.1U_0402_10V6K
DIS@
1 2
L24
BLM15BD121SN1D_0402
DIS@
L24
BLM15BD121SN1D_0402
DIS@
1
2
L47
MBK1608221YZF_2P
DIS@
L47
MBK1608221YZF_2P
DIS@
1
2
C433 0.1U_0402_10V6K
DIS@
C433 0.1U_0402_10V6K
DIS@
1 2
C409 1U_0402_6.3V4Z
DIS@
C409 1U_0402_6.3V4Z
DIS@
1 2
C375 10U_0603_6.3V6M
DIS@
C375 10U_0603_6.3V6M
DIS@
1 2
C417 10U_0603_6.3V6M
DIS@
C417 10U_0603_6.3V6M
DIS@
1 2
C428 1U_0402_6.3V4Z
@
C428 1U_0402_6.3V4Z
@
1 2
L56
BLM15BD121SN1D_0402
DIS@
L56
BLM15BD121SN1D_0402
DIS@
1
2
C386 10U_0603_6.3V6M
@
C386 10U_0603_6.3V6M
@
1 2
C381 0.1U_0402_10V6K
DIS@
C381 0.1U_0402_10V6K
DIS@
1 2
C412 1U_0402_6.3V4Z
DIS@
C412 1U_0402_6.3V4Z
DIS@
1 2
C367 10U_0603_6.3V6M
DIS@
C367 10U_0603_6.3V6M
DIS@
1 2
C408 10U_0603_6.3V6M
DIS@
C408 10U_0603_6.3V6M
DIS@
1 2
C411 10U_0603_6.3V6M
DIS@
C411 10U_0603_6.3V6M
DIS@
1 2
L48
BLM15BD121SN1D_0402
DIS@
L48
BLM15BD121SN1D_0402
DIS@
1
2C3720
0.01U_0402_16V7K
DIS@C3720
0.01U_0402_16V7K
DIS@
12
C434 0.1U_0402_10V6K
DIS@
C434 0.1U_0402_10V6K
DIS@
1 2
C384 10U_0603_6.3V6M
DIS@
C384 10U_0603_6.3V6M
DIS@
1 2
C403 1U_0402_6.3V4Z
DIS@
C403 1U_0402_6.3V4Z
DIS@
1 2
C3719
0.01U_0402_16V7K
DIS@C3719
0.01U_0402_16V7K
DIS@
12
C3721
0.01U_0402_16V7K
DIS@C3721
0.01U_0402_16V7K
DIS@
12
C365 10U_0603_6.3V6M
DIS@
C365 10U_0603_6.3V6M
DIS@
1 2
C422 0.1U_0402_10V6K
DIS@
C422 0.1U_0402_10V6K
DIS@
1 2
C405 1U_0402_6.3V4Z
DIS@
C405 1U_0402_6.3V4Z
DIS@
1 2
C429 1U_0402_6.3V4Z
DIS@
C429 1U_0402_6.3V4Z
DIS@
1 2
C372 2.2U_0402_6.3V5M
DIS@
C372 2.2U_0402_6.3V5M
DIS@
1 2
C404 10U_0603_6.3V6M
DIS@
C404 10U_0603_6.3V6M
DIS@
1 2
C392 0.1U_0402_10V6K
DIS@
C392 0.1U_0402_10V6K
DIS@
1 2
C391 0.1U_0402_10V6K
DIS@
C391 0.1U_0402_10V6K
DIS@
1 2
C415 1U_0402_6.3V4Z
@
C415 1U_0402_6.3V4Z
@
1 2
C373 2.2U_0402_6.3V5M
DIS@
C373 2.2U_0402_6.3V5M
DIS@
1 2
C383 1U_0402_6.3V4Z
DIS@
C383 1U_0402_6.3V4Z
DIS@
1 2
C3725
1U_0402_6.3V6K
DIS@C3725
1U_0402_6.3V6K
DIS@
1 2
C388 1U_0402_6.3V4Z
@
C388 1U_0402_6.3V4Z
@
1 2
C406 10U_0603_6.3V6M
DIS@
C406 10U_0603_6.3V6M
DIS@
1 2
R398
0_0805_5%
short@
R398
0_0805_5%
short@
1
2
C3722
0.01U_0402_16V7K
DIS@C3722
0.01U_0402_16V7K
DIS@
12
C3724
1U_0402_6.3V6K
DIS@C3724
1U_0402_6.3V6K
DIS@
1 2
C399 1U_0402_6.3V4Z
DIS@
C399 1U_0402_6.3V4Z
DIS@
1 2
C387 1U_0402_6.3V4Z
DIS@
C387 1U_0402_6.3V4Z
DIS@
1 2
C371 2.2U_0402_6.3V5M
DIS@
C371 2.2U_0402_6.3V5M
DIS@
1 2
C370 2.2U_0402_6.3V5M
DIS@
C370 2.2U_0402_6.3V5M
DIS@
1 2
C374 2.2U_0402_6.3V5M
DIS@
C374 2.2U_0402_6.3V5M
DIS@
1 2
C410 1U_0402_6.3V4Z
DIS@
C410 1U_0402_6.3V4Z
DIS@
1 2
C3723
0.01U_0402_16V7K
DIS@C3723
0.01U_0402_16V7K
DIS@
12
L53
BLM15BD121SN1D_0402
DIS@
L53
BLM15BD121SN1D_0402
DIS@
1
2
C394 0.1U_0402_10V6K
DIS@
C394 0.1U_0402_10V6K
DIS@
1 2
C413 10U_0603_6.3V6M
@
C413 10U_0603_6.3V6M
@
1 2
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
VDDR1 VDD_CT VDDR3VDDR4MPLL_PVDD SPLL_PVDDSPLL_VDDC PCIE_PVDDPCIE_VDDCVDDC BIF_VDDCVDDCI
355
1.5A
13mA 25mA
(300mA)
130mA
75mA
100mA 100mA
2.5ATBD 1.4A3.5A
111 0 2 (1@) 1
0
00
1
1
1
11
1
1
11
11
12 (1@) 5 (1@) 05 (1@) 10 (2@) 0
0
00130
+DP_VDDR +DP_VDDC
0.1uF
1uF
10uF
+VGA_CORE +TSVDD 13mA 1 1
110uF 1uF 0.1uF
+0.95VS_VGA
10uF 1uF 0.1uF
+1.5VS_VGA
10uF
+1.8VS_VGA
0.1uF
1uF
0.1uF
1uF
10uF
+3VS_VGA
0
00
00
0
1.4A
21A (VDDC + VDDCI (Merged) - PRO S3 (DDR3))
1A 13mA 25mA 90mA 75mA 100mA
+PCIE_PVDD: 50mA (PCIE2.0) 80mA (PCIE3.0)
+PCIE_VDDC: 1.88A (PCIE2.0) 2.5A (PCIE3.0)
PV:R398 change to 0-ohm shortpad
+MPLL_PVDD +SPLL_PVDD
+SPLL_VDDC+VDD_CT
+BIF_VDDC
+VDDR3
+1.05VS_VGA
<35,37>
+3VS_VGA
<35,36,37,54>
+VGA_CORE
<37,54,55>
+1.8VS_VGA
<28,36,37,56>
+1.5VS_VGA
<37,39,40,41>
+VGA_CORE
+1.05VS_VGA
+1.8VS_VGA
+1.05VS_VGA
+VGA_CORE
+3VS_VGA
+1.8VS_VGA
+1.8VS_VGA
+1.8VS_VGA
+1.05VS_VGA
+1.5VS_VGA
+1.05VS_VGA +3VS_VGA +VGA_CORE+1.8VS_VGA +1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power
Custom
38 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power
Custom
38 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_Power
Custom
38 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
POWER
PLL
PCIE
CORE
ME M I/ O
I/ O
LEVEL TRANSLATIO N
ISO LATED CORE I/O
U? ?
U666D 216-0867030 EXO PRO S3
DIS@
POWER
PLL
PCIE
CORE
ME M I/ O
I/ O
LEVEL TRANSLATIO N
ISO LATED CORE I/O
U? ?
U666D 216-0867030 EXO PRO S3
DIS@
PCIE_PVDD
AM30
MPLL_PVDD
L8
SPLL_PVDD
H7
PCIE_VDDC
L23
PCIE_VDDC
T22
PCIE_VDDC
U22
PCIE_VDDC
V22
PCIE_VDDC
L24
PCIE_VDDC
L25
PCIE_VDDC
L26
PCIE_VDDC
M22
PCIE_VDDC
N22
PCIE_VDDC
N23
PCIE_VDDC
N24
PCIE_VDDC
R22
NC#AB23
AB23
NC#AC23
AC23
NC#AD24
AD24
NC#AE24
AE24
NC#AE25
AE25
NC#AE26
AE26
NC#AF25
AF25
NC#AG26
AG26
SPLL_VDDC
H8
SPLL_PVSS
J7
VDDR1
H13
VDDR1
K24
VDDR1
K9
VDDR1
L11
VDDR1
L12
VDDR1
L13
VDDR1
L20
VDDR1
L21
VDDR1
L22
VDDR1
H16
VDDR1
H19
VDDR1
J10
VDDR1
J23
VDDR1
J24
VDDR1
J9
VDDR1
K10
VDDR1
K23
VDDR3
AA17
VDDR3
AA18
VDDR3
AB17
VDDR3
AB18
VDDR4
V12
VDDR4
Y12
VDD_CT
AA20
VDD_CT
AA21
VDD_CT
AB20
VDD_CT
AB21
VDDC
AA15
VDDC
T17
VDDC
T20
VDDC
U13
VDDC
U16
VDDC
U18
BIF_VDDC
U21
VDDC
V15
VDDC
V17
VDDC
V20
VDDC
V21
VDDC
N15
VDDC
Y13
VDDC
Y16
VDDC
Y18
VDDC
Y21
VDDC
N17
VDDC
R13
VDDC
R16
VDDC
R18
BIF_VDDC
R21
VDDC
T12
VDDC
T15
VDDCI
M13
VDDCI
M15
VDDCI
M16
VDDCI
M17
VDDC
M11
VDDCI
M18
VDDCI
M21
VDDCI
M20
VDDCI
N20
VDDC
U11
VDDR4
U12
VDDC
AA12
VDDC
N12
C380 10U_0603_6.3V6M
DIS@
C380 10U_0603_6.3V6M
DIS@
1 2
C398 1U_0402_6.3V4Z
DIS@
C398 1U_0402_6.3V4Z
DIS@
1 2
C416 1U_0402_6.3V4Z
@
C416 1U_0402_6.3V4Z
@
1 2
C389 0.1U_0402_10V6K
DIS@
C389 0.1U_0402_10V6K
DIS@
1 2
C390 0.1U_0402_10V6K
DIS@
C390 0.1U_0402_10V6K
DIS@
1 2
C407 1U_0402_6.3V4Z
DIS@
C407 1U_0402_6.3V4Z
DIS@
1 2
C435 0.1U_0402_10V6K
DIS@
C435 0.1U_0402_10V6K
DIS@
1 2
L24
BLM15BD121SN1D_0402
DIS@
L24
BLM15BD121SN1D_0402
DIS@
1
2
L47
MBK1608221YZF_2P
DIS@
L47
MBK1608221YZF_2P
DIS@
1
2
C433 0.1U_0402_10V6K
DIS@
C433 0.1U_0402_10V6K
DIS@
1 2
C409 1U_0402_6.3V4Z
DIS@
C409 1U_0402_6.3V4Z
DIS@
1 2
C375 10U_0603_6.3V6M
DIS@
C375 10U_0603_6.3V6M
DIS@
1 2
C417 10U_0603_6.3V6M
DIS@
C417 10U_0603_6.3V6M
DIS@
1 2
C428 1U_0402_6.3V4Z
@
C428 1U_0402_6.3V4Z
@
1 2
L56
BLM15BD121SN1D_0402
DIS@
L56
BLM15BD121SN1D_0402
DIS@
1
2
C386 10U_0603_6.3V6M
@
C386 10U_0603_6.3V6M
@
1 2
C381 0.1U_0402_10V6K
DIS@
C381 0.1U_0402_10V6K
DIS@
1 2
C412 1U_0402_6.3V4Z
DIS@
C412 1U_0402_6.3V4Z
DIS@
1 2
C367 10U_0603_6.3V6M
DIS@
C367 10U_0603_6.3V6M
DIS@
1 2
C408 10U_0603_6.3V6M
DIS@
C408 10U_0603_6.3V6M
DIS@
1 2
C411 10U_0603_6.3V6M
DIS@
C411 10U_0603_6.3V6M
DIS@
1 2
L48
BLM15BD121SN1D_0402
DIS@
L48
BLM15BD121SN1D_0402
DIS@
1
2C3720
0.01U_0402_16V7K
DIS@C3720
0.01U_0402_16V7K
DIS@
12
C434 0.1U_0402_10V6K
DIS@
C434 0.1U_0402_10V6K
DIS@
1 2
C384 10U_0603_6.3V6M
DIS@
C384 10U_0603_6.3V6M
DIS@
1 2
C403 1U_0402_6.3V4Z
DIS@
C403 1U_0402_6.3V4Z
DIS@
1 2
C3719
0.01U_0402_16V7K
DIS@C3719
0.01U_0402_16V7K
DIS@
12
C3721
0.01U_0402_16V7K
DIS@C3721
0.01U_0402_16V7K
DIS@
12
C365 10U_0603_6.3V6M
DIS@
C365 10U_0603_6.3V6M
DIS@
1 2
C422 0.1U_0402_10V6K
DIS@
C422 0.1U_0402_10V6K
DIS@
1 2
C405 1U_0402_6.3V4Z
DIS@
C405 1U_0402_6.3V4Z
DIS@
1 2
C429 1U_0402_6.3V4Z
DIS@
C429 1U_0402_6.3V4Z
DIS@
1 2
C372 2.2U_0402_6.3V5M
DIS@
C372 2.2U_0402_6.3V5M
DIS@
1 2
C404 10U_0603_6.3V6M
DIS@
C404 10U_0603_6.3V6M
DIS@
1 2
C392 0.1U_0402_10V6K
DIS@
C392 0.1U_0402_10V6K
DIS@
1 2
C391 0.1U_0402_10V6K
DIS@
C391 0.1U_0402_10V6K
DIS@
1 2
C415 1U_0402_6.3V4Z
@
C415 1U_0402_6.3V4Z
@
1 2
C373 2.2U_0402_6.3V5M
DIS@
C373 2.2U_0402_6.3V5M
DIS@
1 2
C383 1U_0402_6.3V4Z
DIS@
C383 1U_0402_6.3V4Z
DIS@
1 2
C3725
1U_0402_6.3V6K
DIS@C3725
1U_0402_6.3V6K
DIS@
1 2
C388 1U_0402_6.3V4Z
@
C388 1U_0402_6.3V4Z
@
1 2
C406 10U_0603_6.3V6M
DIS@
C406 10U_0603_6.3V6M
DIS@
1 2
R398
0_0805_5%
short@
R398
0_0805_5%
short@
1
2
C3722
0.01U_0402_16V7K
DIS@C3722
0.01U_0402_16V7K
DIS@
12
C3724
1U_0402_6.3V6K
DIS@C3724
1U_0402_6.3V6K
DIS@
1 2
C399 1U_0402_6.3V4Z
DIS@
C399 1U_0402_6.3V4Z
DIS@
1 2
C387 1U_0402_6.3V4Z
DIS@
C387 1U_0402_6.3V4Z
DIS@
1 2
C371 2.2U_0402_6.3V5M
DIS@
C371 2.2U_0402_6.3V5M
DIS@
1 2
C370 2.2U_0402_6.3V5M
DIS@
C370 2.2U_0402_6.3V5M
DIS@
1 2
C374 2.2U_0402_6.3V5M
DIS@
C374 2.2U_0402_6.3V5M
DIS@
1 2
C410 1U_0402_6.3V4Z
DIS@
C410 1U_0402_6.3V4Z
DIS@
1 2
C3723
0.01U_0402_16V7K
DIS@C3723
0.01U_0402_16V7K
DIS@
12
L53
BLM15BD121SN1D_0402
DIS@
L53
BLM15BD121SN1D_0402
DIS@
1
2
C394 0.1U_0402_10V6K
DIS@
C394 0.1U_0402_10V6K
DIS@
1 2
C413 10U_0603_6.3V6M
@
C413 10U_0603_6.3V6M
@
1 2
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Route 50ohms single-ended/100ohm diff and keep short debug only, for clock observation,if not need, DNI.
L
Layout notes Place close to GPU (within 25mm) and place componment close to each other
+MVREFDA
M_DA[63..0] M_DQM[7..0] M_DQS[7..0]M_MA[15..0] M_DQS#[7..0]
+MVREFSA
M_MA4 M_MA7M_MA6M_MA5M_MA0 M_MA3M_MA2M_MA1 M_MA8 M_MA9 M_MA12M_MA11M_MA10 M_BA1M_BA0M_BA2 M_DQM3 M_DQM6M_DQM5M_DQM4 M_DQM7M_DQM2M_DQM1M_DQM0 M_DQS2 M_DQS5M_DQS4M_DQS3M_DQS1M_DQS0 M_DQS7M_DQS6 M_DQS#3 M_DQS#2 M_DQS#1 M_DQS#0 M_DQS#5 M_DQS#4 M_DQS#7 M_DQS#6 M_CLK#0 M_CLK0 M_CLK1VRAM_ODT1 VRAM_ODT0 M_CLK#1 M_CAS#1 M_CAS#0 M_CS#0M_RAS#1 M_RAS#0 M_CKE1M_CKE0 M_WE#1M_WE#0M_CS#1M_MA13
M_DA4 M_DA5 M_DA6 M_DA7 M_DA12 M_DA13 M_DA14 M_DA15M_DA8 M_DA9 M_DA10 M_DA11 M_DA20 M_DA21 M_DA22 M_DA23 M_DA28 M_DA29 M_DA30 M_DA31M_DA24 M_DA25 M_DA26 M_DA27M_DA16 M_DA17 M_DA18 M_DA19 M_DA36 M_DA37 M_DA38 M_DA39 M_DA44 M_DA45 M_DA46 M_DA47M_DA40 M_DA41 M_DA42 M_DA43 M_DA52 M_DA53 M_DA54 M_DA55 M_DA60 M_DA61 M_DA62 M_DA63M_DA56 M_DA57 M_DA58 M_DA59M_DA48 M_DA49 M_DA50 M_DA51M_DA32 M_DA33 M_DA34 M_DA35M_DA0 M_DA1 M_DA2 M_DA3 +MVREFDA +MVREFSA DRAM_RST
DRAM_RST
M_MA15 M_MA14
M_DQS#[7..0]
<40,41>
M_DQS[7..0]
<40,41>
M_DQM[7..0]
<40,41>
M_DA[63..0]
<40,41>
M_MA[15..0]
<40,41>
DRAM_RST#
<40,41>
M_BA1 <40,41> M_BA0 <40,41> M_BA2 <40,41> M_CLK#0 <40> M_CLK0 <40> VRAM_ODT1 <41> VRAM_ODT0 <40> M_RAS#1 <41> M_RAS#0 <40> M_CLK#1 <41> M_CLK1 <41> M_CS#1 <41> M_CS#0 <40> M_CAS#1 <41> M_CAS#0 <40> M_WE#1 <41> M_WE#0 <40> M_CKE1 <41> M_CKE0 <40>
+1.5VS_VGA
+1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MEM
Custom
39 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MEM
Custom
39 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MEM
Custom
39 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
C542 0.1U_0402_16V4Z
@
C542 0.1U_0402_16V4Z
@
1
2
R455 10_0402_1% DIS@ R455 10_0402_1% DIS@
1
2
R460 51.1_0402_1%
@
R460 51.1_0402_1%
@
1
2
R5162 120_0402_1%
DIS@
R5162 120_0402_1%
DIS@
1
2
R5161
5.1K_0402_1%
DIS@ R5161
5.1K_0402_1%
DIS@
1 2
R457
100_0402_1%
DIS@ R457
100_0402_1%
DIS@
1 2
C467 1U_0402_6.3V4Z DIS@ C467 1U_0402_6.3V4Z DIS@
1 2
C469
120P_0402_50V8J
DIS@ C469
120P_0402_50V8J
DIS@
1 2
R365
40.2_0402_1%
DIS@ R365
40.2_0402_1%
DIS@
1 2
R363
40.2_0402_1%
DIS@ R363
40.2_0402_1%
DIS@
1 2
R373 51.1_0402_1%
@
R373 51.1_0402_1%
@
1
2
R5160 49.9_0402_1% DIS@ R5160 49.9_0402_1% DIS@ 1
2
C541
0.1U_0402_16V4Z
@
C541
0.1U_0402_16V4Z
@
1
2
C514 1U_0402_6.3V4Z DIS@ C514 1U_0402_6.3V4Z DIS@
1 2
MEMORY INTERFACE
GDDR5/DDR3
GDDR5/DDR3
U? ?
U666C 216-0867030 EXO PRO S3DIS@
MEMORY INTERFACE
GDDR5/DDR3
GDDR5/DDR3
U? ?
U666C 216-0867030 EXO PRO S3DIS@
MVREFDA
K26
MVREFSA
J26
NC#J25
J25
MEM_CALRP0
K25
CASA0B
G19
CASA1B
G16
CKEA0
K20
CKEA1
J17
CLKA0
H26
CLKA0B
H25
CLKA1
G9
CLKA1B
H9
CSA0B_0
H22
CSA0B_1
J22
CSA1B_0
G13
CSA1B_1
K13
ADBIA0/ODTA0
L18
ADBIA1/ODTA1
K16
RASA0B
G22
RASA1B
G17
WEA0B
G25
WEA1B
H10
DRAM_RST
L10
CLKTESTA
K8
CLKTESTB
L7
DQA0_0
K27
DQA0_1
J29
DQA0_2
H30
DQA0_3
H32
DQA0_4
G29
DQA0_5
F28
DQA0_6
F32
DQA0_7
F30
DQA0_8
C30
DQA0_9
F27
DQA0_10
A28
DQA0_11
C28
DQA0_12
E27
DQA0_13
G26
DQA0_14
D26
DQA0_15
F25
DQA0_16
A25
DQA0_17
C25
DQA0_18
E25
DQA0_19
D24
DQA0_20
E23
DQA0_21
F23
DQA0_22
D22
DQA0_23
F21
DQA0_24
E21
DQA0_25
D20
DQA0_26
F19
DQA0_27
A19
DQA0_28
D18
DQA0_29
F17
DQA0_30
A17
DQA0_31
C17
DQA1_0
E17
DQA1_1
D16
DQA1_2
F15
DQA1_3
A15
DQA1_4
D14
DQA1_5
F13
DQA1_6
A13
DQA1_7
C13
DQA1_8
E11
DQA1_9
A11
DQA1_10
C11
DQA1_11
F11
DQA1_12
A9
DQA1_13
C9
DQA1_14
F9
DQA1_15
D8
DQA1_16
E7
DQA1_17
A7
DQA1_18
C7
DQA1_19
F7
DQA1_20
A5
DQA1_21
E5
DQA1_22
C3
DQA1_23
E1
DQA1_24
G7
DQA1_25
G6
DQA1_26
G1
DQA1_27
G3
DQA1_28
J6
DQA1_29
J1
DQA1_30
J3
DQA1_31
J5
MAA0_0/ MAA_0
K17
MAA0_1/ MAA_1
J20
MAA0_2/ MAA_2
H23
MAA0_3/ MAA_3
G23
MAA0_4/ MAA_4
G24
MAA0_5/ MAA_5
H24
MAA0_6/ MAA_6
J19
MAA0_7/ MAA_7
K19
MAA1_0/ MAA_8
J14
MAA1_1/ MAA_9
K14
MAA1_2/ MAA_10
J11
MAA1_3/ MAA_11
J13
MAA1_4/ MAA_12
H11
MAA1_5/ MAA_BA2
G11
MAA1_6/ MAA_BA0
J16
MAA1_7/ MAA_BA1
L15
WCKA0_0/DQMA0_0
E32
WCKA0B_0/DQMA0_1
E30
WCKA0_1/DQMA0_2
A21
WCKA0B_1/DQMA0_3
C21
WCKA1_0/DQMA1_0
E13
WCKA1B_0/DQMA1_1
D12
WCKA1_1/DQMA1_2
E3
WCKA1B_1/DQMA1_3
F4
EDCA0_0/QSA0_0
H28
EDCA0_1/QSA0_1
C27
EDCA0_2/QSA0_2
A23
EDCA0_3/QSA0_3
E19
EDCA1_0/QSA1_0
E15
EDCA1_1/QSA1_1
D10
EDCA1_2/QSA1_2
D6
EDCA1_3/QSA1_3
G5
DDBIA0_0/QSA0_0B
H27
DDBIA0_1/QSA0_1B
A27
DDBIA0_2/QSA0_2B
C23
DDBIA0_3/QSA0_3B
C19
DDBIA1_0/QSA1_0B
C15
DDBIA1_1/QSA1_1B
E9
DDBIA1_2/QSA1_2B
C5
DDBIA1_3/QSA1_3B
H4
MAA0_8/ MAA_13
G20
MAA1_8/ MAA_14
G14
MAA0_9/ MAA_15
L17
MAA1_9/ RSVD
L16
R364
100_0402_1%
DIS@ R364
100_0402_1%
DIS@
1 2
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Route 50ohms single-ended/100ohm diff and keep short debug only, for clock observation,if not need, DNI.
L
Layout notes Place close to GPU (within 25mm) and place componment close to each other
+MVREFDA
M_DA[63..0] M_DQM[7..0] M_DQS[7..0]M_MA[15..0] M_DQS#[7..0]
+MVREFSA
M_MA4 M_MA7M_MA6M_MA5M_MA0 M_MA3M_MA2M_MA1 M_MA8 M_MA9 M_MA12M_MA11M_MA10 M_BA1M_BA0M_BA2 M_DQM3 M_DQM6M_DQM5M_DQM4 M_DQM7M_DQM2M_DQM1M_DQM0 M_DQS2 M_DQS5M_DQS4M_DQS3M_DQS1M_DQS0 M_DQS7M_DQS6 M_DQS#3 M_DQS#2 M_DQS#1 M_DQS#0 M_DQS#5 M_DQS#4 M_DQS#7 M_DQS#6 M_CLK#0 M_CLK0 M_CLK1VRAM_ODT1 VRAM_ODT0 M_CLK#1 M_CAS#1 M_CAS#0 M_CS#0M_RAS#1 M_RAS#0 M_CKE1M_CKE0 M_WE#1M_WE#0M_CS#1M_MA13
M_DA4 M_DA5 M_DA6 M_DA7 M_DA12 M_DA13 M_DA14 M_DA15M_DA8 M_DA9 M_DA10 M_DA11 M_DA20 M_DA21 M_DA22 M_DA23 M_DA28 M_DA29 M_DA30 M_DA31M_DA24 M_DA25 M_DA26 M_DA27M_DA16 M_DA17 M_DA18 M_DA19 M_DA36 M_DA37 M_DA38 M_DA39 M_DA44 M_DA45 M_DA46 M_DA47M_DA40 M_DA41 M_DA42 M_DA43 M_DA52 M_DA53 M_DA54 M_DA55 M_DA60 M_DA61 M_DA62 M_DA63M_DA56 M_DA57 M_DA58 M_DA59M_DA48 M_DA49 M_DA50 M_DA51M_DA32 M_DA33 M_DA34 M_DA35M_DA0 M_DA1 M_DA2 M_DA3 +MVREFDA +MVREFSA DRAM_RST
DRAM_RST
M_MA15 M_MA14
M_DQS#[7..0]
<40,41>
M_DQS[7..0]
<40,41>
M_DQM[7..0]
<40,41>
M_DA[63..0]
<40,41>
M_MA[15..0]
<40,41>
DRAM_RST#
<40,41>
M_BA1 <40,41> M_BA0 <40,41> M_BA2 <40,41> M_CLK#0 <40> M_CLK0 <40> VRAM_ODT1 <41> VRAM_ODT0 <40> M_RAS#1 <41> M_RAS#0 <40> M_CLK#1 <41> M_CLK1 <41> M_CS#1 <41> M_CS#0 <40> M_CAS#1 <41> M_CAS#0 <40> M_WE#1 <41> M_WE#0 <40> M_CKE1 <41> M_CKE0 <40>
+1.5VS_VGA
+1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MEM
Custom
39 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MEM
Custom
39 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_MEM
Custom
39 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
C542 0.1U_0402_16V4Z
@
C542 0.1U_0402_16V4Z
@
1
2
R455 10_0402_1% DIS@ R455 10_0402_1% DIS@
1
2
R460 51.1_0402_1%
@
R460 51.1_0402_1%
@
1
2
R5162 120_0402_1%
DIS@
R5162 120_0402_1%
DIS@
1
2
R5161
5.1K_0402_1%
DIS@ R5161
5.1K_0402_1%
DIS@
1 2
R457
100_0402_1%
DIS@ R457
100_0402_1%
DIS@
1 2
C467 1U_0402_6.3V4Z DIS@ C467 1U_0402_6.3V4Z DIS@
1 2
C469
120P_0402_50V8J
DIS@ C469
120P_0402_50V8J
DIS@
1 2
R365
40.2_0402_1%
DIS@ R365
40.2_0402_1%
DIS@
1 2
R363
40.2_0402_1%
DIS@ R363
40.2_0402_1%
DIS@
1 2
R373 51.1_0402_1%
@
R373 51.1_0402_1%
@
1
2
R5160 49.9_0402_1% DIS@ R5160 49.9_0402_1% DIS@ 1
2
C541
0.1U_0402_16V4Z
@
C541
0.1U_0402_16V4Z
@
1
2
C514 1U_0402_6.3V4Z DIS@ C514 1U_0402_6.3V4Z DIS@
1 2
MEMORY INTERFACE
GDDR5/DDR3
GDDR5/DDR3
U? ?
U666C 216-0867030 EXO PRO S3DIS@
MEMORY INTERFACE
GDDR5/DDR3
GDDR5/DDR3
U? ?
U666C 216-0867030 EXO PRO S3DIS@
MVREFDA
K26
MVREFSA
J26
NC#J25
J25
MEM_CALRP0
K25
CASA0B
G19
CASA1B
G16
CKEA0
K20
CKEA1
J17
CLKA0
H26
CLKA0B
H25
CLKA1
G9
CLKA1B
H9
CSA0B_0
H22
CSA0B_1
J22
CSA1B_0
G13
CSA1B_1
K13
ADBIA0/ODTA0
L18
ADBIA1/ODTA1
K16
RASA0B
G22
RASA1B
G17
WEA0B
G25
WEA1B
H10
DRAM_RST
L10
CLKTESTA
K8
CLKTESTB
L7
DQA0_0
K27
DQA0_1
J29
DQA0_2
H30
DQA0_3
H32
DQA0_4
G29
DQA0_5
F28
DQA0_6
F32
DQA0_7
F30
DQA0_8
C30
DQA0_9
F27
DQA0_10
A28
DQA0_11
C28
DQA0_12
E27
DQA0_13
G26
DQA0_14
D26
DQA0_15
F25
DQA0_16
A25
DQA0_17
C25
DQA0_18
E25
DQA0_19
D24
DQA0_20
E23
DQA0_21
F23
DQA0_22
D22
DQA0_23
F21
DQA0_24
E21
DQA0_25
D20
DQA0_26
F19
DQA0_27
A19
DQA0_28
D18
DQA0_29
F17
DQA0_30
A17
DQA0_31
C17
DQA1_0
E17
DQA1_1
D16
DQA1_2
F15
DQA1_3
A15
DQA1_4
D14
DQA1_5
F13
DQA1_6
A13
DQA1_7
C13
DQA1_8
E11
DQA1_9
A11
DQA1_10
C11
DQA1_11
F11
DQA1_12
A9
DQA1_13
C9
DQA1_14
F9
DQA1_15
D8
DQA1_16
E7
DQA1_17
A7
DQA1_18
C7
DQA1_19
F7
DQA1_20
A5
DQA1_21
E5
DQA1_22
C3
DQA1_23
E1
DQA1_24
G7
DQA1_25
G6
DQA1_26
G1
DQA1_27
G3
DQA1_28
J6
DQA1_29
J1
DQA1_30
J3
DQA1_31
J5
MAA0_0/ MAA_0
K17
MAA0_1/ MAA_1
J20
MAA0_2/ MAA_2
H23
MAA0_3/ MAA_3
G23
MAA0_4/ MAA_4
G24
MAA0_5/ MAA_5
H24
MAA0_6/ MAA_6
J19
MAA0_7/ MAA_7
K19
MAA1_0/ MAA_8
J14
MAA1_1/ MAA_9
K14
MAA1_2/ MAA_10
J11
MAA1_3/ MAA_11
J13
MAA1_4/ MAA_12
H11
MAA1_5/ MAA_BA2
G11
MAA1_6/ MAA_BA0
J16
MAA1_7/ MAA_BA1
L15
WCKA0_0/DQMA0_0
E32
WCKA0B_0/DQMA0_1
E30
WCKA0_1/DQMA0_2
A21
WCKA0B_1/DQMA0_3
C21
WCKA1_0/DQMA1_0
E13
WCKA1B_0/DQMA1_1
D12
WCKA1_1/DQMA1_2
E3
WCKA1B_1/DQMA1_3
F4
EDCA0_0/QSA0_0
H28
EDCA0_1/QSA0_1
C27
EDCA0_2/QSA0_2
A23
EDCA0_3/QSA0_3
E19
EDCA1_0/QSA1_0
E15
EDCA1_1/QSA1_1
D10
EDCA1_2/QSA1_2
D6
EDCA1_3/QSA1_3
G5
DDBIA0_0/QSA0_0B
H27
DDBIA0_1/QSA0_1B
A27
DDBIA0_2/QSA0_2B
C23
DDBIA0_3/QSA0_3B
C19
DDBIA1_0/QSA1_0B
C15
DDBIA1_1/QSA1_1B
E9
DDBIA1_2/QSA1_2B
C5
DDBIA1_3/QSA1_3B
H4
MAA0_8/ MAA_13
G20
MAA1_8/ MAA_14
G14
MAA0_9/ MAA_15
L17
MAA1_9/ RSVD
L16
R364
100_0402_1%
DIS@ R364
100_0402_1%
DIS@
1 2
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Memory Partition A - Lower 32 bits
U1406 side
U1407 side
M_DQS#2 M_DQS#0M_DQM2M_BA1 M_DQS0M_DQS2M_BA0 VRAM_ODT0M_CKE0M_CLK#0 M_CS#0 M_RAS#0 M_CAS#0M_BA2M_MA1 M_MA3 M_MA10M_MA0 M_MA7M_MA4 M_MA11M_MA6 M_MA9M_MA2 M_MA5 M_MA12 M_DQM0M_WE#0M_CLK0M_MA8 M_MA13
M_CLK0 M_CLK#0
M_CLK#0 M_CLK0M_MA1 M_MA7 M_MA10M_MA3M_MA2 M_MA9 M_MA11M_MA8 M_MA13 M_DQM3 M_DQS#1 M_DQS#3M_DQS3 M_DQS1 M_DQM1M_BA0 M_BA1 VRAM_ODT0 M_WE#0M_CKE0 M_RAS#0 M_CAS#0M_CS#0 DRAM_RST#M_BA2M_MA4M_MA0 M_MA5 M_MA6 M_MA12
M_DA[63..0] M_DQM[7..0] M_DQS[7..0]M_MA[15..0] M_DQS#[7..0]
M_MA14 M_MA15
M_MA14 M_MA15
M_DA4 M_DA2M_DA6 M_DA0M_DA20M_DA16M_DA18M_DA22 M_DA19M_DA21M_DA23 M_DA5 M_DA7M_DA1M_DA17 M_DA3
M_DA28M_DA26M_DA31 M_DA24 M_DA25M_DA27M_DA30 M_DA29 M_DA12 M_DA10 M_DA13M_DA8 M_DA14 M_DA15 M_DA11M_DA9
+FBA_DQ_VREF0
+FBA_DQ_VREF1
+FBA_VREF0
+FBA_VREF1
+FBA_DQ_VREF0
+FBA_DQ_VREF1
M_CAS#0
<39>
M_CLK0
<39>
VRAM_ODT0
<39>
M_BA2
<39,41>
M_CS#0
<39>
M_CKE0
<39>
M_RAS#0
<39>
M_BA1
<39,41>
M_WE#0
<39>
M_CLK#0
<39>
DRAM_RST#
<39,41>
M_BA0
<39,41>
M_DQS#[7..0]
<39,41>
M_DQS[7..0]
<39,41>
M_DQM[7..0]
<39,41>
M_MA[15..0]
<39,41>
M_DA[63..0]
<39,41>
+1.5VS_VGA
<37,38,39,41>
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA +1.5VS_VGA
+1.5VS_VGA+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Lower
Custom
40 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Lower
Custom
40 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Lower
Custom
40 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
R467
4.99K_0402_1%
DIS@ R467
4.99K_0402_1%
DIS@
1 2
C482 0.1U_0402_10V6K
DIS@
C482 0.1U_0402_10V6K
DIS@
1 2
R453
4.99K_0402_1%
DIS@ R453
4.99K_0402_1%
DIS@
1 2
C476 0.1U_0402_10V6K
DIS@
C476 0.1U_0402_10V6K
DIS@
1 2
C475 0.1U_0402_10V6K
DIS@
C475 0.1U_0402_10V6K
DIS@
1 2
R468
4.99K_0402_1%
DIS@ R468
4.99K_0402_1%
DIS@
1 2
C512 1U_0402_6.3V4Z
DIS@
C512 1U_0402_6.3V4Z
DIS@
1 2
R5170 40.2_0402_1% DIS@R5170 40.2_0402_1% DIS@
1 2
R452
4.99K_0402_1%
DIS@ R452
4.99K_0402_1%
DIS@
1 2
C478 0.1U_0402_10V6K
DIS@
C478 0.1U_0402_10V6K
DIS@
1 2
C491 10U_0603_6.3V6M
DIS@
C491 10U_0603_6.3V6M
DIS@
1 2
C506 0.01U_0402_25V7K DIS@ C506 0.01U_0402_25V7K DIS@
1 2
C474 0.1U_0402_10V6K
DIS@
C474 0.1U_0402_10V6K
DIS@
1 2
C498 1U_0402_6.3V4Z
DIS@
C498 1U_0402_6.3V4Z
DIS@
1 2
C477 0.1U_0402_10V6K
DIS@
C477 0.1U_0402_10V6K
DIS@
1 2
C516 1U_0402_6.3V4Z
@
C516 1U_0402_6.3V4Z
@
1 2
C486 0.1U_0402_10V6K
@
C486 0.1U_0402_10V6K
@
1 2
C485 0.1U_0402_10V6K
DIS@
C485 0.1U_0402_10V6K
DIS@
1 2
C533 1U_0402_6.3V4Z
DIS@
C533 1U_0402_6.3V4Z
DIS@
1 2
C497 1U_0402_6.3V4Z
DIS@
C497 1U_0402_6.3V4Z
DIS@
1 2
C511 1U_0402_6.3V4Z
DIS@
C511 1U_0402_6.3V4Z
DIS@
1 2
C520 1U_0402_6.3V4Z
@
C520 1U_0402_6.3V4Z
@
1 2
C518 1U_0402_6.3V4Z
DIS@
C518 1U_0402_6.3V4Z
DIS@
1 2
R465
4.99K_0402_1%
DIS@ R465
4.99K_0402_1%
DIS@
1 2
C483 0.1U_0402_10V6K
DIS@
C483 0.1U_0402_10V6K
DIS@
1 2
R464
4.99K_0402_1%
DIS@ R464
4.99K_0402_1%
DIS@
1 2
C540 0.1U_0402_10V6K DIS@ C540 0.1U_0402_10V6K DIS@
1 2
R454
243_0402_1%
DIS@ R454
243_0402_1%
DIS@
1 2
C515 0.1U_0402_10V6K DIS@ C515 0.1U_0402_10V6K DIS@
1 2
R5171
40.2_0402_1%
DIS@R5171
40.2_0402_1%
DIS@
1 2
C481 0.1U_0402_10V6K
DIS@
C481 0.1U_0402_10V6K
DIS@
1 2
C490 10U_0603_6.3V6M
DIS@
C490 10U_0603_6.3V6M
DIS@
1 2
C496 1U_0402_6.3V4Z
DIS@
C496 1U_0402_6.3V4Z
DIS@
1 2
R466
4.99K_0402_1%
DIS@ R466
4.99K_0402_1%
DIS@
1 2
C472 0.1U_0402_10V6K DIS@ C472 0.1U_0402_10V6K DIS@
1 2
C521 1U_0402_6.3V4Z
DIS@
C521 1U_0402_6.3V4Z
DIS@
1 2
C534 0.1U_0402_10V6K
DIS@
C534 0.1U_0402_10V6K
DIS@
1 2
C480 0.1U_0402_10V6K
DIS@
C480 0.1U_0402_10V6K
DIS@
1 2
96-BALL SDRAM DDR3
U1406 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1406 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
R463
4.99K_0402_1%
DIS@ R463
4.99K_0402_1%
DIS@
1 2
C519 1U_0402_6.3V4Z
DIS@
C519 1U_0402_6.3V4Z
DIS@
1 2
C531 0.1U_0402_10V6K
DIS@
C531 0.1U_0402_10V6K
DIS@
1 2
C499 1U_0402_6.3V4Z
DIS@
C499 1U_0402_6.3V4Z
DIS@
1 2
C543 0.1U_0402_10V6K DIS@ C543 0.1U_0402_10V6K DIS@
1 2
R456
243_0402_1%
DIS@ R456
243_0402_1%
DIS@
1 2
C479 0.1U_0402_10V6K
@
C479 0.1U_0402_10V6K
@
1 2
C510 1U_0402_6.3V4Z
DIS@
C510 1U_0402_6.3V4Z
DIS@
1 2
C532 1U_0402_6.3V4Z
DIS@
C532 1U_0402_6.3V4Z
DIS@
1 2
96-BALL SDRAM DDR3
U1407 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1407 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Memory Partition A - Lower 32 bits
U1406 side
U1407 side
M_DQS#2 M_DQS#0M_DQM2M_BA1 M_DQS0M_DQS2M_BA0 VRAM_ODT0M_CKE0M_CLK#0 M_CS#0 M_RAS#0 M_CAS#0M_BA2M_MA1 M_MA3 M_MA10M_MA0 M_MA7M_MA4 M_MA11M_MA6 M_MA9M_MA2 M_MA5 M_MA12 M_DQM0M_WE#0M_CLK0M_MA8 M_MA13
M_CLK0 M_CLK#0
M_CLK#0 M_CLK0M_MA1 M_MA7 M_MA10M_MA3M_MA2 M_MA9 M_MA11M_MA8 M_MA13 M_DQM3 M_DQS#1 M_DQS#3M_DQS3 M_DQS1 M_DQM1M_BA0 M_BA1 VRAM_ODT0 M_WE#0M_CKE0 M_RAS#0 M_CAS#0M_CS#0 DRAM_RST#M_BA2M_MA4M_MA0 M_MA5 M_MA6 M_MA12
M_DA[63..0] M_DQM[7..0] M_DQS[7..0]M_MA[15..0] M_DQS#[7..0]
M_MA14 M_MA15
M_MA14 M_MA15
M_DA4 M_DA2M_DA6 M_DA0M_DA20M_DA16M_DA18M_DA22 M_DA19M_DA21M_DA23 M_DA5 M_DA7M_DA1M_DA17 M_DA3
M_DA28M_DA26M_DA31 M_DA24 M_DA25M_DA27M_DA30 M_DA29 M_DA12 M_DA10 M_DA13M_DA8 M_DA14 M_DA15 M_DA11M_DA9
+FBA_DQ_VREF0
+FBA_DQ_VREF1
+FBA_VREF0
+FBA_VREF1
+FBA_DQ_VREF0
+FBA_DQ_VREF1
M_CAS#0
<39>
M_CLK0
<39>
VRAM_ODT0
<39>
M_BA2
<39,41>
M_CS#0
<39>
M_CKE0
<39>
M_RAS#0
<39>
M_BA1
<39,41>
M_WE#0
<39>
M_CLK#0
<39>
DRAM_RST#
<39,41>
M_BA0
<39,41>
M_DQS#[7..0]
<39,41>
M_DQS[7..0]
<39,41>
M_DQM[7..0]
<39,41>
M_MA[15..0]
<39,41>
M_DA[63..0]
<39,41>
+1.5VS_VGA
<37,38,39,41>
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA +1.5VS_VGA
+1.5VS_VGA+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Lower
Custom
40 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Lower
Custom
40 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Lower
Custom
40 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
R467
4.99K_0402_1%
DIS@ R467
4.99K_0402_1%
DIS@
1 2
C482 0.1U_0402_10V6K
DIS@
C482 0.1U_0402_10V6K
DIS@
1 2
R453
4.99K_0402_1%
DIS@ R453
4.99K_0402_1%
DIS@
1 2
C476 0.1U_0402_10V6K
DIS@
C476 0.1U_0402_10V6K
DIS@
1 2
C475 0.1U_0402_10V6K
DIS@
C475 0.1U_0402_10V6K
DIS@
1 2
R468
4.99K_0402_1%
DIS@ R468
4.99K_0402_1%
DIS@
1 2
C512 1U_0402_6.3V4Z
DIS@
C512 1U_0402_6.3V4Z
DIS@
1 2
R5170 40.2_0402_1% DIS@R5170 40.2_0402_1% DIS@
1 2
R452
4.99K_0402_1%
DIS@ R452
4.99K_0402_1%
DIS@
1 2
C478 0.1U_0402_10V6K
DIS@
C478 0.1U_0402_10V6K
DIS@
1 2
C491 10U_0603_6.3V6M
DIS@
C491 10U_0603_6.3V6M
DIS@
1 2
C506 0.01U_0402_25V7K DIS@ C506 0.01U_0402_25V7K DIS@
1 2
C474 0.1U_0402_10V6K
DIS@
C474 0.1U_0402_10V6K
DIS@
1 2
C498 1U_0402_6.3V4Z
DIS@
C498 1U_0402_6.3V4Z
DIS@
1 2
C477 0.1U_0402_10V6K
DIS@
C477 0.1U_0402_10V6K
DIS@
1 2
C516 1U_0402_6.3V4Z
@
C516 1U_0402_6.3V4Z
@
1 2
C486 0.1U_0402_10V6K
@
C486 0.1U_0402_10V6K
@
1 2
C485 0.1U_0402_10V6K
DIS@
C485 0.1U_0402_10V6K
DIS@
1 2
C533 1U_0402_6.3V4Z
DIS@
C533 1U_0402_6.3V4Z
DIS@
1 2
C497 1U_0402_6.3V4Z
DIS@
C497 1U_0402_6.3V4Z
DIS@
1 2
C511 1U_0402_6.3V4Z
DIS@
C511 1U_0402_6.3V4Z
DIS@
1 2
C520 1U_0402_6.3V4Z
@
C520 1U_0402_6.3V4Z
@
1 2
C518 1U_0402_6.3V4Z
DIS@
C518 1U_0402_6.3V4Z
DIS@
1 2
R465
4.99K_0402_1%
DIS@ R465
4.99K_0402_1%
DIS@
1 2
C483 0.1U_0402_10V6K
DIS@
C483 0.1U_0402_10V6K
DIS@
1 2
R464
4.99K_0402_1%
DIS@ R464
4.99K_0402_1%
DIS@
1 2
C540 0.1U_0402_10V6K DIS@ C540 0.1U_0402_10V6K DIS@
1 2
R454
243_0402_1%
DIS@ R454
243_0402_1%
DIS@
1 2
C515 0.1U_0402_10V6K DIS@ C515 0.1U_0402_10V6K DIS@
1 2
R5171
40.2_0402_1%
DIS@R5171
40.2_0402_1%
DIS@
1 2
C481 0.1U_0402_10V6K
DIS@
C481 0.1U_0402_10V6K
DIS@
1 2
C490 10U_0603_6.3V6M
DIS@
C490 10U_0603_6.3V6M
DIS@
1 2
C496 1U_0402_6.3V4Z
DIS@
C496 1U_0402_6.3V4Z
DIS@
1 2
R466
4.99K_0402_1%
DIS@ R466
4.99K_0402_1%
DIS@
1 2
C472 0.1U_0402_10V6K DIS@ C472 0.1U_0402_10V6K DIS@
1 2
C521 1U_0402_6.3V4Z
DIS@
C521 1U_0402_6.3V4Z
DIS@
1 2
C534 0.1U_0402_10V6K
DIS@
C534 0.1U_0402_10V6K
DIS@
1 2
C480 0.1U_0402_10V6K
DIS@
C480 0.1U_0402_10V6K
DIS@
1 2
96-BALL SDRAM DDR3
U1406 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1406 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
R463
4.99K_0402_1%
DIS@ R463
4.99K_0402_1%
DIS@
1 2
C519 1U_0402_6.3V4Z
DIS@
C519 1U_0402_6.3V4Z
DIS@
1 2
C531 0.1U_0402_10V6K
DIS@
C531 0.1U_0402_10V6K
DIS@
1 2
C499 1U_0402_6.3V4Z
DIS@
C499 1U_0402_6.3V4Z
DIS@
1 2
C543 0.1U_0402_10V6K DIS@ C543 0.1U_0402_10V6K DIS@
1 2
R456
243_0402_1%
DIS@ R456
243_0402_1%
DIS@
1 2
C479 0.1U_0402_10V6K
@
C479 0.1U_0402_10V6K
@
1 2
C510 1U_0402_6.3V4Z
DIS@
C510 1U_0402_6.3V4Z
DIS@
1 2
C532 1U_0402_6.3V4Z
DIS@
C532 1U_0402_6.3V4Z
DIS@
1 2
96-BALL SDRAM DDR3
U1407 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1407 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Memory Partition A - Upper 32 bits
U1408 side
U1409 side
M_DA[63..0] M_DQM[7..0] M_DQS[7..0]M_MA[15..0] M_DQS#[7..0]
M_CLK#1 M_CLK1
M_BA1M_BA0 M_BA2M_MA3 M_MA7 M_MA12M_MA9 M_MA13M_MA8 M_MA11M_MA6M_MA2 M_MA5 M_MA10M_MA0 M_MA4M_MA1
M_DQS4 M_DQS5 M_DQM5 M_DQS#5 M_DQS#4M_DQM4
M_WE#1M_CAS#1VRAM_ODT1 M_RAS#1M_CLK#1 M_CKE1 M_CS#1M_CLK1
DRAM_RST#
M_MA14 M_MA15
M_BA0 M_BA2M_BA1M_MA10M_MA0 M_MA7M_MA4M_MA1 M_MA11M_MA6 M_MA9M_MA2 M_MA5M_MA3 M_MA13M_MA8 M_MA12 M_DQS7 M_DQS#7 DRAM_RST#VRAM_ODT1 M_DQM7 M_DQS#6M_DQS6 M_DQM6M_CS#1M_CKE1 M_RAS#1M_CLK#1 M_CAS#1M_CLK1 M_WE#1M_MA14 M_MA15
M_DA35 M_DA39M_DA36 M_DA32 M_DA40 M_DA47M_DA42M_DA41 M_DA45M_DA34 M_DA33M_DA37 M_DA44 M_DA43 M_DA46M_DA38
M_DA57M_DA60M_DA49 M_DA52M_DA53 M_DA54 M_DA61M_DA59 M_DA56M_DA51 M_DA55 M_DA48 M_DA58M_DA50 M_DA63 M_DA62
+FBA_DQ_VREF2
+FBA_DQ_VREF3
+FBA_VREF2
+FBA_VREF3
+FBA_DQ_VREF2
+FBA_DQ_VREF3
M_DQS#[7..0]
<39,40>
M_DQS[7..0]
<39,40>
M_DQM[7..0]
<39,40>
M_MA[15..0]
<39,40>
M_DA[63..0]
<39,40>
M_RAS#1
<39>
M_CKE1
<39>
M_CLK#1
<39>
M_CS#1
<39>
M_WE#1
<39>
M_CLK1
<39>
VRAM_ODT1
<39>
M_CAS#1
<39>
M_BA2
<39,40>
M_BA1
<39,40>
M_BA0
<39,40>
DRAM_RST#
<39,40>
+1.5VS_VGA
<37,38,39,40>
+1.5VS_VGA+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Upper
Custom
41 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Upper
Custom
41 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Upper
Custom
41 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
C473 0.1U_0402_10V6K DIS@ C473 0.1U_0402_10V6K DIS@
1 2
R462
4.99K_0402_1%
DIS@ R462
4.99K_0402_1%
DIS@
1 2
C524 1U_0402_6.3V4Z
DIS@
C524 1U_0402_6.3V4Z
DIS@
1 2
C495 10U_0603_6.3V6M
DIS@
C495 10U_0603_6.3V6M
DIS@
1 2
R461
4.99K_0402_1%
DIS@ R461
4.99K_0402_1%
DIS@
1 2
R459
4.99K_0402_1%
DIS@ R459
4.99K_0402_1%
DIS@
1 2
C505 0.1U_0402_10V6K
DIS@
C505 0.1U_0402_10V6K
DIS@
1 2
C503 1U_0402_6.3V4Z
DIS@
C503 1U_0402_6.3V4Z
DIS@
1 2
R5173
40.2_0402_1%
DIS@R5173
40.2_0402_1%
DIS@
1 2
C525 1U_0402_6.3V4Z
DIS@
C525 1U_0402_6.3V4Z
DIS@
1 2
C536 1U_0402_6.3V4Z
DIS@
C536 1U_0402_6.3V4Z
DIS@
1 2
C502 1U_0402_6.3V4Z
DIS@
C502 1U_0402_6.3V4Z
DIS@
1 2
R444
243_0402_1%
DIS@ R444
243_0402_1%
DIS@
1 2
C489 0.1U_0402_10V6K
DIS@
C489 0.1U_0402_10V6K
DIS@
1 2
R5172 40.2_0402_1% DIS@R5172 40.2_0402_1% DIS@
1 2
C522 1U_0402_6.3V4Z
@
C522 1U_0402_6.3V4Z
@
1 2
C507 0.01U_0402_25V7K DIS@ C507 0.01U_0402_25V7K DIS@
1 2
C538 1U_0402_6.3V4Z
DIS@
C538 1U_0402_6.3V4Z
DIS@
1 2
C539 0.1U_0402_10V6K DIS@ C539 0.1U_0402_10V6K DIS@
1 2
C484 0.1U_0402_10V6K
DIS@
C484 0.1U_0402_10V6K
DIS@
1 2
C504 0.1U_0402_10V6K
DIS@
C504 0.1U_0402_10V6K
DIS@
1 2
C523 1U_0402_6.3V4Z
DIS@
C523 1U_0402_6.3V4Z
DIS@
1 2
C488 0.1U_0402_10V6K
DIS@
C488 0.1U_0402_10V6K
DIS@
1 2
C527 1U_0402_6.3V4Z
DIS@
C527 1U_0402_6.3V4Z
DIS@
1 2
C492 10U_0603_6.3V6M
DIS@
C492 10U_0603_6.3V6M
DIS@
1 2
C493 0.1U_0402_10V6K
DIS@
C493 0.1U_0402_10V6K
DIS@
1 2
C526 1U_0402_6.3V4Z
DIS@
C526 1U_0402_6.3V4Z
DIS@
1 2
C517 0.1U_0402_10V6K DIS@ C517 0.1U_0402_10V6K DIS@
1 2
C529 0.1U_0402_10V6K
DIS@
C529 0.1U_0402_10V6K
DIS@
1 2
C508 0.1U_0402_10V6K
DIS@
C508 0.1U_0402_10V6K
DIS@
1 2
R471
4.99K_0402_1%
DIS@ R471
4.99K_0402_1%
DIS@
1 2
C500 1U_0402_6.3V4Z
DIS@
C500 1U_0402_6.3V4Z
DIS@
1 2
R469
4.99K_0402_1%
DIS@ R469
4.99K_0402_1%
DIS@
1 2
C501 1U_0402_6.3V4Z
DIS@
C501 1U_0402_6.3V4Z
DIS@
1 2
R458
4.99K_0402_1%
DIS@ R458
4.99K_0402_1%
DIS@
1 2
C535 0.1U_0402_10V6K
DIS@
C535 0.1U_0402_10V6K
DIS@
1 2
R410
243_0402_1%
DIS@ R410
243_0402_1%
DIS@
1 2
96-BALL SDRAM DDR3
U1409 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1409 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
C544 0.1U_0402_10V6K DIS@ C544 0.1U_0402_10V6K DIS@
1 2
C494 0.1U_0402_10V6K
@
C494 0.1U_0402_10V6K
@
1 2
R470
4.99K_0402_1%
DIS@ R470
4.99K_0402_1%
DIS@
1 2
C513 1U_0402_6.3V4Z
DIS@
C513 1U_0402_6.3V4Z
DIS@
1 2
C530 0.1U_0402_10V6K
@
C530 0.1U_0402_10V6K
@
1 2
96-BALL SDRAM DDR3
U1408 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1408 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
C528 1U_0402_6.3V4Z
@
C528 1U_0402_6.3V4Z
@
1 2
R472
4.99K_0402_1%
DIS@ R472
4.99K_0402_1%
DIS@
1 2
C537 0.1U_0402_10V6K
DIS@
C537 0.1U_0402_10V6K
DIS@
1 2
C487 0.1U_0402_10V6K
DIS@
C487 0.1U_0402_10V6K
DIS@
1 2
C509 0.1U_0402_10V6K
DIS@
C509 0.1U_0402_10V6K
DIS@
1 2
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
Memory Partition A - Upper 32 bits
U1408 side
U1409 side
M_DA[63..0] M_DQM[7..0] M_DQS[7..0]M_MA[15..0] M_DQS#[7..0]
M_CLK#1 M_CLK1
M_BA1M_BA0 M_BA2M_MA3 M_MA7 M_MA12M_MA9 M_MA13M_MA8 M_MA11M_MA6M_MA2 M_MA5 M_MA10M_MA0 M_MA4M_MA1
M_DQS4 M_DQS5 M_DQM5 M_DQS#5 M_DQS#4M_DQM4
M_WE#1M_CAS#1VRAM_ODT1 M_RAS#1M_CLK#1 M_CKE1 M_CS#1M_CLK1
DRAM_RST#
M_MA14 M_MA15
M_BA0 M_BA2M_BA1M_MA10M_MA0 M_MA7M_MA4M_MA1 M_MA11M_MA6 M_MA9M_MA2 M_MA5M_MA3 M_MA13M_MA8 M_MA12 M_DQS7 M_DQS#7 DRAM_RST#VRAM_ODT1 M_DQM7 M_DQS#6M_DQS6 M_DQM6M_CS#1M_CKE1 M_RAS#1M_CLK#1 M_CAS#1M_CLK1 M_WE#1M_MA14 M_MA15
M_DA35 M_DA39M_DA36 M_DA32 M_DA40 M_DA47M_DA42M_DA41 M_DA45M_DA34 M_DA33M_DA37 M_DA44 M_DA43 M_DA46M_DA38
M_DA57M_DA60M_DA49 M_DA52M_DA53 M_DA54 M_DA61M_DA59 M_DA56M_DA51 M_DA55 M_DA48 M_DA58M_DA50 M_DA63 M_DA62
+FBA_DQ_VREF2
+FBA_DQ_VREF3
+FBA_VREF2
+FBA_VREF3
+FBA_DQ_VREF2
+FBA_DQ_VREF3
M_DQS#[7..0]
<39,40>
M_DQS[7..0]
<39,40>
M_DQM[7..0]
<39,40>
M_MA[15..0]
<39,40>
M_DA[63..0]
<39,40>
M_RAS#1
<39>
M_CKE1
<39>
M_CLK#1
<39>
M_CS#1
<39>
M_WE#1
<39>
M_CLK1
<39>
VRAM_ODT1
<39>
M_CAS#1
<39>
M_BA2
<39,40>
M_BA1
<39,40>
M_BA0
<39,40>
DRAM_RST#
<39,40>
+1.5VS_VGA
<37,38,39,40>
+1.5VS_VGA+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
+1.5VS_VGA
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Upper
Custom
41 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Upper
Custom
41 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
LA-C701P
0.1
AMD EXO_VRAM A Upper
Custom
41 61
Saturday, January 31, 2015
2013/01/11 2013/12/31
Compal Electronics, Inc.
C473 0.1U_0402_10V6K DIS@ C473 0.1U_0402_10V6K DIS@
1 2
R462
4.99K_0402_1%
DIS@ R462
4.99K_0402_1%
DIS@
1 2
C524 1U_0402_6.3V4Z
DIS@
C524 1U_0402_6.3V4Z
DIS@
1 2
C495 10U_0603_6.3V6M
DIS@
C495 10U_0603_6.3V6M
DIS@
1 2
R461
4.99K_0402_1%
DIS@ R461
4.99K_0402_1%
DIS@
1 2
R459
4.99K_0402_1%
DIS@ R459
4.99K_0402_1%
DIS@
1 2
C505 0.1U_0402_10V6K
DIS@
C505 0.1U_0402_10V6K
DIS@
1 2
C503 1U_0402_6.3V4Z
DIS@
C503 1U_0402_6.3V4Z
DIS@
1 2
R5173
40.2_0402_1%
DIS@R5173
40.2_0402_1%
DIS@
1 2
C525 1U_0402_6.3V4Z
DIS@
C525 1U_0402_6.3V4Z
DIS@
1 2
C536 1U_0402_6.3V4Z
DIS@
C536 1U_0402_6.3V4Z
DIS@
1 2
C502 1U_0402_6.3V4Z
DIS@
C502 1U_0402_6.3V4Z
DIS@
1 2
R444
243_0402_1%
DIS@ R444
243_0402_1%
DIS@
1 2
C489 0.1U_0402_10V6K
DIS@
C489 0.1U_0402_10V6K
DIS@
1 2
R5172 40.2_0402_1% DIS@R5172 40.2_0402_1% DIS@
1 2
C522 1U_0402_6.3V4Z
@
C522 1U_0402_6.3V4Z
@
1 2
C507 0.01U_0402_25V7K DIS@ C507 0.01U_0402_25V7K DIS@
1 2
C538 1U_0402_6.3V4Z
DIS@
C538 1U_0402_6.3V4Z
DIS@
1 2
C539 0.1U_0402_10V6K DIS@ C539 0.1U_0402_10V6K DIS@
1 2
C484 0.1U_0402_10V6K
DIS@
C484 0.1U_0402_10V6K
DIS@
1 2
C504 0.1U_0402_10V6K
DIS@
C504 0.1U_0402_10V6K
DIS@
1 2
C523 1U_0402_6.3V4Z
DIS@
C523 1U_0402_6.3V4Z
DIS@
1 2
C488 0.1U_0402_10V6K
DIS@
C488 0.1U_0402_10V6K
DIS@
1 2
C527 1U_0402_6.3V4Z
DIS@
C527 1U_0402_6.3V4Z
DIS@
1 2
C492 10U_0603_6.3V6M
DIS@
C492 10U_0603_6.3V6M
DIS@
1 2
C493 0.1U_0402_10V6K
DIS@
C493 0.1U_0402_10V6K
DIS@
1 2
C526 1U_0402_6.3V4Z
DIS@
C526 1U_0402_6.3V4Z
DIS@
1 2
C517 0.1U_0402_10V6K DIS@ C517 0.1U_0402_10V6K DIS@
1 2
C529 0.1U_0402_10V6K
DIS@
C529 0.1U_0402_10V6K
DIS@
1 2
C508 0.1U_0402_10V6K
DIS@
C508 0.1U_0402_10V6K
DIS@
1 2
R471
4.99K_0402_1%
DIS@ R471
4.99K_0402_1%
DIS@
1 2
C500 1U_0402_6.3V4Z
DIS@
C500 1U_0402_6.3V4Z
DIS@
1 2
R469
4.99K_0402_1%
DIS@ R469
4.99K_0402_1%
DIS@
1 2
C501 1U_0402_6.3V4Z
DIS@
C501 1U_0402_6.3V4Z
DIS@
1 2
R458
4.99K_0402_1%
DIS@ R458
4.99K_0402_1%
DIS@
1 2
C535 0.1U_0402_10V6K
DIS@
C535 0.1U_0402_10V6K
DIS@
1 2
R410
243_0402_1%
DIS@ R410
243_0402_1%
DIS@
1 2
96-BALL SDRAM DDR3
U1409 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1409 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
C544 0.1U_0402_10V6K DIS@ C544 0.1U_0402_10V6K DIS@
1 2
C494 0.1U_0402_10V6K
@
C494 0.1U_0402_10V6K
@
1 2
R470
4.99K_0402_1%
DIS@ R470
4.99K_0402_1%
DIS@
1 2
C513 1U_0402_6.3V4Z
DIS@
C513 1U_0402_6.3V4Z
DIS@
1 2
C530 0.1U_0402_10V6K
@
C530 0.1U_0402_10V6K
@
1 2
96-BALL SDRAM DDR3
U1408 H5TC2G63FFR-11C_FBGA96 X76@
96-BALL SDRAM DDR3
U1408 H5TC2G63FFR-11C_FBGA96 X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
C528 1U_0402_6.3V4Z
@
C528 1U_0402_6.3V4Z
@
1 2
R472
4.99K_0402_1%
DIS@ R472
4.99K_0402_1%
DIS@
1 2
C537 0.1U_0402_10V6K
DIS@
C537 0.1U_0402_10V6K
DIS@
1 2
C487 0.1U_0402_10V6K
DIS@
C487 0.1U_0402_10V6K
DIS@
1 2
C509 0.1U_0402_10V6K
DIS@
C509 0.1U_0402_10V6K
DIS@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
CPU
GPIO78
CPU
GPIO77 GPIO80
GPU
+3VS
1. +3VS_VGA
DGPU_PWR_EN
2. VGA_CORE
PXS_PWREN#
3. +1.05VS_VGA
+1.05VS
+1.5VS
4. +1.5VS_VGA 5. +1.8VS_VGA
EN_1.8V
GPU_PWRGD 1.8V_PWRGD
DGPU_PWROK
DGPU_HOLD_RST#
PLT_RST#
GPU_RST
0 ohm
@
0 ohm
@
ENU4103
PU801
NMOS
U4102
U4102
PU8
PU801
PU8
R
C
R
R
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
RSVD
D
42 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
RSVD
D
42 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
RSVD
D
42 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
CPU
GPIO78
CPU
GPIO77 GPIO80
GPU
+3VS
1. +3VS_VGA
DGPU_PWR_EN
2. VGA_CORE
PXS_PWREN#
3. +1.05VS_VGA
+1.05VS
+1.5VS
4. +1.5VS_VGA 5. +1.8VS_VGA
EN_1.8V
GPU_PWRGD 1.8V_PWRGD
DGPU_PWROK
DGPU_HOLD_RST#
PLT_RST#
GPU_RST
0 ohm
@
0 ohm
@
ENU4103
PU801
NMOS
U4102
U4102
PU8
PU801
PU8
R
C
R
R
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
RSVD
D
42 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
RSVD
D
42 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
RSVD
D
42 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
KBC 9022
CPU
+3VALWP +5VALWP
2. EC_ON
1. ON/OFF#
+3C_PCH 6. PCH_PWR_EN
11. SYSON 13. SUSP#
+1.35VP +0.675VSP +1.05VS
3. PCH_DPWROK 4. PBTN_OUT#
5. PM_SLP_SUS#
7. PCH_RSMRST#
8. PCH_SUSWARN#
9. SUSACK#
10. PM_SLP_S5# 12. PM_SLP_S3#
14. EC_KBRST# 16. EC_+1.05VS_PG 17. PCH_PWROK 20. SYS_PWROK
21. PLT_RST#
19. VGATE 18. VR_ON
+VCC_CORE
+5VS +3VS
+1.5VS +1.5VS
15. 1.05V_VS_PG_PWR
PU2
Q30 PU3 PU4
PU5CPU
(DIS)(UMA)
Q21 PU6 PU7
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
POWER SEQUENCE
D
43 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
POWER SEQUENCE
D
43 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
POWER SEQUENCE
D
43 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
KBC 9022
CPU
+3VALWP +5VALWP
2. EC_ON
1. ON/OFF#
+3C_PCH 6. PCH_PWR_EN
11. SYSON 13. SUSP#
+1.35VP +0.675VSP +1.05VS
3. PCH_DPWROK 4. PBTN_OUT#
5. PM_SLP_SUS#
7. PCH_RSMRST#
8. PCH_SUSWARN#
9. SUSACK#
10. PM_SLP_S5# 12. PM_SLP_S3#
14. EC_KBRST# 16. EC_+1.05VS_PG 17. PCH_PWROK 20. SYS_PWROK
21. PLT_RST#
19. VGATE 18. VR_ON
+VCC_CORE
+5VS +3VS
+1.5VS +1.5VS
15. 1.05V_VS_PG_PWR
PU2
Q30 PU3 PU4
PU5CPU
(DIS)(UMA)
Q21 PU6 PU7
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
POWER SEQUENCE
D
43 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
POWER SEQUENCE
D
43 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
0.1
POWER SEQUENCE
D
43 61
Saturday, January 31, 2015
Compal Electronics, Inc.
LA-C701P
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DB build CPU type
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
44
0.1
BOM control
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
44
0.1
BOM control
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
44
0.1
BOM control
Saturday, January 31, 2015
ZZZ DAX DA6001DO000ZZZ DAX DA6001DO000
UCPU1 i7-5500U BDW SA000089A00
2.4G@
UCPU1 i7-5500U BDW SA000089A00
2.4G@
ZZZ004
HY1@ X7662732L02 1G Hynix
ZZZ004
HY1@ X7662732L02 1G Hynix
UCPU1 i3-5005U BDW SA000083E50
2.0G@
UCPU1 i3-5005U BDW SA000083E50
2.0G@
ZZZ004
SAM2@ X7662732L03 2G SAMSUNG
ZZZ004
SAM2@ X7662732L03 2G SAMSUNGZZZ004
HY2@ X7662732L01 2G Hynix
ZZZ004
HY2@ X7662732L01 2G Hynix
UCPU1 i3 4005U SA000072Q80
1.7G@
UCPU1 i3 4005U SA000072Q80
1.7G@
ZZZ004
SAM1@ X7662732L04 1G SAMSUNG
ZZZ004
SAM1@ X7662732L04 1G SAMSUNG
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
DB build CPU type
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
44
0.1
BOM control
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
44
0.1
BOM control
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2015/3/1
LA-C701P
2013/3/1
Compal Electronics, Inc.
61
44
0.1
BOM control
Saturday, January 31, 2015
ZZZ DAX DA6001DO000ZZZ DAX DA6001DO000
UCPU1 i7-5500U BDW SA000089A00
2.4G@
UCPU1 i7-5500U BDW SA000089A00
2.4G@
ZZZ004
HY1@ X7662732L02 1G Hynix
ZZZ004
HY1@ X7662732L02 1G Hynix
UCPU1 i3-5005U BDW SA000083E50
2.0G@
UCPU1 i3-5005U BDW SA000083E50
2.0G@
ZZZ004
SAM2@ X7662732L03 2G SAMSUNG
ZZZ004
SAM2@ X7662732L03 2G SAMSUNGZZZ004
HY2@ X7662732L01 2G Hynix
ZZZ004
HY2@ X7662732L01 2G Hynix
UCPU1 i3 4005U SA000072Q80
1.7G@
UCPU1 i3 4005U SA000072Q80
1.7G@
ZZZ004
SAM1@ X7662732L04 1G SAMSUNG
ZZZ004
SAM1@ X7662732L04 1G SAMSUNG
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
2014-10-06: Change EC Power Rail Name
ACIN_LED
Charge_LED
ADP_SIGNAL
ADP_SIGNAL ACIN_LED Charge_LED
ADP_ID <25>
VCIN1_PH <25>
VCIN0_PH <25>
ADP_I <25,47>
ECAGND<25>
AC_LED#
<25> BAT_CHG_LED
<25>
+19.5V_ADPIN
+19.5V_VIN
+3VALW _EC
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
45
0.1
DC Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
45
0.1
DC Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
45
0.1
DC Conn
Saturday, January 31, 2015
PD3
GLZ3.6B_LL34-2
PD3
GLZ3.6B_LL34-2
1 2
PR4 2K_0402_5% PR4 2K_0402_5% 1
2
PH1 100K_0402_1%_NCP15W F104F03RC PH1 100K_0402_1%_NCP15W F104F03RC
1 2
PR6 100K_0402_5% PR6 100K_0402_5%
1 2
PR2 100K_0402_5% PR2 100K_0402_5%
1 2
PR9 10K_0402_1% PR9 10K_0402_1%
1 2
PR7 16.2K_0402_1% PR7 16.2K_0402_1%
1 2
PC3
100P_0402_50V8J
EMI@PC3
100P_0402_50V8J
EMI@
1 2
PC4
1000P_0402_50V7K
EMI@PC4
1000P_0402_50V7K
EMI@
1 2
PR3 10K_0402_5% PR3 10K_0402_5%
1
2
PD2
L30ESD24VC3-2_SOT23-3 ESD@
PD2
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
PC2
1000P_0402_50V7K
EMI@PC2
1000P_0402_50V7K
EMI@
1 2
PJP1
ACES_51483-00801-001
@
PJP1
ACES_51483-00801-001
@
1
1
4
4
2
2
5
5
3
3
8
8
7
7
6
6
GND
9
GND
10
PR1
0_0402_5% @
PR1
0_0402_5% @ 1
2
PL2
5A_Z120_25M_0805_2P
DISEMI@
PL2
5A_Z120_25M_0805_2P
DISEMI@
1
2
PR5
10K_0402_5%
PR5
10K_0402_5%
1 2
PL1
5A_Z120_25M_0805_2P
EMI@
PL1
5A_Z120_25M_0805_2P
EMI@ 1
2
PC5
100P_0402_50V8J
@PC5
100P_0402_50V8J
@
1 2
PC1
100P_0402_50V8J
EMI@PC1
100P_0402_50V8J
EMI@
1 2
PR8 5.9K_0402_1% PR8 5.9K_0402_1%
1 2
PC6
1000P_0402_50V7K
PC6
1000P_0402_50V7K
1 2
PD1
L30ESD24VC3-2_SOT23-3 ESD@
PD1
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
2014-10-06: Change EC Power Rail Name
ACIN_LED
Charge_LED
ADP_SIGNAL
ADP_SIGNAL ACIN_LED Charge_LED
ADP_ID <25>
VCIN1_PH <25>
VCIN0_PH <25>
ADP_I <25,47>
ECAGND<25>
AC_LED#
<25> BAT_CHG_LED
<25>
+19.5V_ADPIN
+19.5V_VIN
+3VALW _EC
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
45
0.1
DC Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
45
0.1
DC Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
45
0.1
DC Conn
Saturday, January 31, 2015
PD3
GLZ3.6B_LL34-2
PD3
GLZ3.6B_LL34-2
1 2
PR4 2K_0402_5% PR4 2K_0402_5% 1
2
PH1 100K_0402_1%_NCP15W F104F03RC PH1 100K_0402_1%_NCP15W F104F03RC
1 2
PR6 100K_0402_5% PR6 100K_0402_5%
1 2
PR2 100K_0402_5% PR2 100K_0402_5%
1 2
PR9 10K_0402_1% PR9 10K_0402_1%
1 2
PR7 16.2K_0402_1% PR7 16.2K_0402_1%
1 2
PC3
100P_0402_50V8J
EMI@PC3
100P_0402_50V8J
EMI@
1 2
PC4
1000P_0402_50V7K
EMI@PC4
1000P_0402_50V7K
EMI@
1 2
PR3 10K_0402_5% PR3 10K_0402_5%
1
2
PD2
L30ESD24VC3-2_SOT23-3 ESD@
PD2
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
PC2
1000P_0402_50V7K
EMI@PC2
1000P_0402_50V7K
EMI@
1 2
PJP1
ACES_51483-00801-001
@
PJP1
ACES_51483-00801-001
@
1
1
4
4
2
2
5
5
3
3
8
8
7
7
6
6
GND
9
GND
10
PR1
0_0402_5% @
PR1
0_0402_5% @ 1
2
PL2
5A_Z120_25M_0805_2P
DISEMI@
PL2
5A_Z120_25M_0805_2P
DISEMI@
1
2
PR5
10K_0402_5%
PR5
10K_0402_5%
1 2
PL1
5A_Z120_25M_0805_2P
EMI@
PL1
5A_Z120_25M_0805_2P
EMI@ 1
2
PC5
100P_0402_50V8J
@PC5
100P_0402_50V8J
@
1 2
PC1
100P_0402_50V8J
EMI@PC1
100P_0402_50V8J
EMI@
1 2
PR8 5.9K_0402_1% PR8 5.9K_0402_1%
1 2
PC6
1000P_0402_50V7K
PC6
1000P_0402_50V7K
1 2
PD1
L30ESD24VC3-2_SOT23-3 ESD@
PD1
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
EC_SMB_CK1 <25,47> EC_SMB_DA1 <25,47> B/I# <25>
+14.8V_BATT+
+14.8V_BATT
+3VL
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
46
0.1
BATT Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
46
0.1
BATT Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
46
0.1
BATT Conn
Saturday, January 31, 2015
PL4
5A_Z120_25M_0805_2P
EMI@
PL4
5A_Z120_25M_0805_2P
EMI@ 1
2
PD4
L30ESD24VC3-2_SOT23-3 ESD@
PD4
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
PC7
1000P_0402_50V7K EMI@
PC7
1000P_0402_50V7K EMI@
1 2
PR10 100_0402_5% PR10 100_0402_5% 1
2
PJPB1
TAITW _PMPCR3-08MLBS1ZZ4H4
@
PJPB1
TAITW _PMPCR3-08MLBS1ZZ4H4
@
1
1
3
3
4
4
2
2
5
5
6
6
7
7
8
8
GND
9
GND
10
PD5
L30ESD24VC3-2_SOT23-3 ESD@
PD5
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
PR12
100_0402_5%
PR12
100_0402_5% 1
2
PC8
0.01U_0402_25V7K EMI@
PC8
0.01U_0402_25V7K EMI@
1 2
PL3
5A_Z120_25M_0805_2P
EMI@
PL3
5A_Z120_25M_0805_2P
EMI@ 1
2
PR11 100_0402_5% PR11 100_0402_5% 1
2
PR13 100K_0402_5% PR13 100K_0402_5%
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
EC_SMB_CK1 <25,47> EC_SMB_DA1 <25,47> B/I# <25>
+14.8V_BATT+
+14.8V_BATT
+3VL
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
46
0.1
BATT Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
46
0.1
BATT Conn
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2017/10/09
LA-C701P
2014/10/09
Compal Electronics, Inc.
60
46
0.1
BATT Conn
Saturday, January 31, 2015
PL4
5A_Z120_25M_0805_2P
EMI@
PL4
5A_Z120_25M_0805_2P
EMI@ 1
2
PD4
L30ESD24VC3-2_SOT23-3 ESD@
PD4
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
PC7
1000P_0402_50V7K EMI@
PC7
1000P_0402_50V7K EMI@
1 2
PR10 100_0402_5% PR10 100_0402_5% 1
2
PJPB1
TAITW _PMPCR3-08MLBS1ZZ4H4
@
PJPB1
TAITW _PMPCR3-08MLBS1ZZ4H4
@
1
1
3
3
4
4
2
2
5
5
6
6
7
7
8
8
GND
9
GND
10
PD5
L30ESD24VC3-2_SOT23-3 ESD@
PD5
L30ESD24VC3-2_SOT23-3 ESD@
1
2
3
PR12
100_0402_5%
PR12
100_0402_5% 1
2
PC8
0.01U_0402_25V7K EMI@
PC8
0.01U_0402_25V7K EMI@
1 2
PL3
5A_Z120_25M_0805_2P
EMI@
PL3
5A_Z120_25M_0805_2P
EMI@ 1
2
PR11 100_0402_5% PR11 100_0402_5% 1
2
PR13 100K_0402_5% PR13 100K_0402_5%
1 2
A A
B B
C C
D D
1
1
2
2
3
3
4
4
Common Circuit
Protection for reverse input
Close EC chip
Vgs = 20V Vds = 60V Id = 250mA
max Power loss 0.22W for 90W;0.12W for 65W system CSR rating: 1W VACP-VACN spec < 80.64mV
Isat: 4A DCR: 27mohm
Rds(on) typ = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C)
Support max charge 3.5A Power loss: 0.245W CSR rating: 1W VSRP-VSRN spec < 81.28mV
**Design Notes** #For 65 /90W system, 3S1P/3S2P battery Maximum Charging current 3.5A Battery discharge power 55W. #Register Setting 1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI
if add ISN choke
2. 0X12 bit3 set 1 (default 0) to enable turbo boos
t function
3. Disable turbo when AC only #Circuit Design 1. ACOK,ILIM pull high voltage need base on 3/5V en
able control
2. Use 10X10 choke and 3X3 H/L side MOSFET Charge current 3.5A Power loss : 1.82W Power density : 0.81 (15X15) 3. If use 4S per cell 4.35V battery, need additiona
l circuit
for ACDET(PR218/PR220/PR222 change to 0.1%, paralle
l resistors
with PR222 for ACDET setting) 4. PC223 2200p is for quick response when AC plug o
ut.
5. For hybrid design, need double check PQ202,PQ203
,PQ204,PQ205 component rating
#Protect function 1. ACOVP : ACDET voltage > 3.14V 2. Charger timeout : No communication within 175s(d
efault)
3. ACOC : 3.33 X Input current DAC setting(default) 4. CHGOCP : 3/4.5/6A based on current current setti
ng
5. BATOVP : 103-106% 6. BATLOWV : 2.5V 7. TSHUT : 155C 8. IFAULT HI : 750mV (default) 9. IFAULT LOW : 110mV (default)
Rds(on) = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C)
VF = 0.37V
VF = 0.5V
Min. Typ Max. L-->H 17.16V 17.63V 18.12V H-->L 16.76V 17.22V 17.70V
Vin Dectector
VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+620)/20/0.01 = 2.29 A
Rds(on) = 30mohm max Vgs = 20V Vds = 30V ID = 7A (Ta=70C)
Need check the SOA for inrush
Module model information BQ24735A_V1.mdd BQ24735A_V2.mdd
7X7X3 Isat: 6.5A DCR: 30mohm
CHG_ACDRV
CHG_ACN
CHG_ACP
CHG_BATDRV
CHG_BATDRV
CHG_CMSRC
CHG_LX
CHG_CSON1
CHG_CSOP1
CHG_DH
CHG_ACDRV_R
CHG_BATDRV_R
CHG_ACDET
CHG_ILIM
CHG_REGN
CHG_VCC
CHG_CSON1CHG_CSOP1
CHG_SRP CHG_SRN
CHG_DH
CHG_BST
CHG_LX
DL_CHG
CHG_IOUT
CHG
ADP_I <25,45>EC_SMB_CK1 <25,46> EC_SMB_DA1 <25,46>
ACIN
<25,36,8>
P2
P1
+19.5V_VIN
+19.5V_VIN
+14.8V_BATT
+19.5V_VIN
+3VL
CHG_B+
+19.5VB
+3VL
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PWR-CHARGER
47 60
Saturday, January 31, 2015
2014/07/02
2012/07/02
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PWR-CHARGER
47 60
Saturday, January 31, 2015
2014/07/02
2012/07/02
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PWR-CHARGER
47 60
Saturday, January 31, 2015
2014/07/02
2012/07/02
Compal Electronics, Inc.
PR209
4.12K_0603_1%
PR209
4.12K_0603_1%
1 2
PC213
1U_0603_25V6K
PC213
1U_0603_25V6K
1
2
PC215
10U_0805_25V6K
PC215
10U_0805_25V6K
1 2
PR215
0_0402_5%
PR215
0_0402_5% 1
2
PC211
0.047U_0402_25V7K
PC211
0.047U_0402_25V7K 1
2
PD202 RB751V-40_SOD323-2 PD202 RB751V-40_SOD323-2
1 2
PR214 100K_0402_1% PR214 100K_0402_1%
1
2
PR205
4.12K_0603_1%
PR205
4.12K_0603_1% 1
2
PC201
2200P_0402_50V7K
PC201
2200P_0402_50V7K
1 2
PQ206
SIS412DN-T1-GE3_POWERPAK8-5
PQ206
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR217
100K_0402_1%
PR217
100K_0402_1%
1 2
PC210
0.1U_0402_25V6
PC210
0.1U_0402_25V6
1 2
PC216
0.1U_0402_25V6
PC216
0.1U_0402_25V6
1 2
PC209
0.1U_0402_25V6
PC209
0.1U_0402_25V6
1
2
PC214
10U_0805_25V6K
PC214
10U_0805_25V6K
1 2
PC205
0.1U_0402_25V6
@EMI@PC205
0.1U_0402_25V6
@EMI@
1 2
PL202
10UH_3.5A_20%_7X7X3_M
PL202
10UH_3.5A_20%_7X7X3_M
1
2
PR223
0_0402_5% @
PR223
0_0402_5% @
1
2
PD201 BAS40CW _SOT323-3 PD201 BAS40CW _SOT323-3
1
2
3
PC224
100P_0402_50V8J
PC224
100P_0402_50V8J
1 2
PR212
10_0603_1%
PR212
10_0603_1% 1
2
PC202
0.1U_0402_25V6
PC202
0.1U_0402_25V6
1 2
PC225 100P_0402_50V8J
@
PC225 100P_0402_50V8J
@
1 2
PC203
10U_0805_25V6K
PC203
10U_0805_25V6K
1 2
PC217
0.1U_0402_25V6
PC217
0.1U_0402_25V6
1 2
PR210
0.01_1206_1%
PR210
0.01_1206_1%
1
34
2
PR213
6.8_0603_1%
PR213
6.8_0603_1% 1
2
PR225
0_0402_5% @
PR225
0_0402_5% @ 1
2
PR216
620K_0402_1%
PR216
620K_0402_1%
1
2
PQ204
AON7506_DFN33-8-5
PQ204
AON7506_DFN33-8-5
3
5
2
4
1
G
D S
PQ201
2N7002KW _SOT323-3
@
G
D S
PQ201
2N7002KW _SOT323-3
@2
1 3
PC212
1U_0603_25V6K
PC212
1U_0603_25V6K
1
2
PR207
2.2_0603_5%
PR207
2.2_0603_5%
1 2
PR208
4.12K_0603_1%
PR208
4.12K_0603_1%
1 2
PU201
BQ24735RGRR_QFN20_3P5X3P5
DIS@ PU201
BQ24735RGRR_QFN20_3P5X3P5
DIS@
ACN
1
ACP
2
CMSRC
3
ACDRV
4
ACOK
5
ACDET
6
IOUT
7
SDA
8
SCL
9
ILIM
10BATDRV
11
SRN
12
SRP
13
GND
14
LODRV
15
REGN
16
BTST
17
HIDRV
18
PHASE
19
VCC
20
PAD
21
PQ203 AON7506_DFN33-8-5 PQ203 AON7506_DFN33-8-5
4
5
123
PR203
0.01_1206_1%
PR203
0.01_1206_1%
1
34
2
PQ202
MDU1512RH_POW ERDFN56-8-5
PQ202
MDU1512RH_POW ERDFN56-8-5
4
5
123
PU201
BQ24725ARGRR_QFN20_3P5X3P5 UMA@
PU201
BQ24725ARGRR_QFN20_3P5X3P5 UMA@
PC223
2200P_0402_50V7K
PC223
2200P_0402_50V7K
1 2
PQ205
SIS412DN-T1-GE3_POWERPAK8-5
PQ205
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC207
0.01U_0402_50V7K
PC207
0.01U_0402_50V7K
1 2
PL201
1UH_2.8A_30%_4X4X2_F
EMI@
PL201
1UH_2.8A_30%_4X4X2_F
EMI@
1
2
PC204
10U_0805_25V6K
PC204
10U_0805_25V6K
1 2
PR224
0_0402_5% @
PR224
0_0402_5% @ 1
2
PR202
3M_0402_5% @
PR202
3M_0402_5% @ 1
2
PR201
1M_0402_5% @
PR201
1M_0402_5% @ 1
2
PC206
2200P_0402_25V7K
EMI@PC206
2200P_0402_25V7K
EMI@
1 2
PC208
0.1U_0402_25V6
PC208
0.1U_0402_25V6
1 2
PR206
10_1206_1%
PR206
10_1206_1%
1 2
PR218
422K_0402_1%
PR218
422K_0402_1% 1
2
PC221
0.1U_0603_16V7K
PC221
0.1U_0603_16V7K
1 2
PC220 @EMI@
680P_0402_50V7K
PC220 @EMI@
680P_0402_50V7K
1 2
PC222
0.01U_0402_25V7K
PC222
0.01U_0402_25V7K
1 2
PR211 @EMI@
4.7_1206_5%
PR211 @EMI@
4.7_1206_5%
1 2
PR204 @
0_0402_5%
PR204 @
0_0402_5%
1 2
PR222
66.5K_0402_1%
PR222
66.5K_0402_1%
1 2
B B
C C
D D
1
1
2
2
3
3
4
4
Common Circuit
Protection for reverse input
Close EC chip
Vgs = 20V Vds = 60V Id = 250mA
max Power loss 0.22W for 90W;0.12W for 65W system CSR rating: 1W VACP-VACN spec < 80.64mV
Isat: 4A DCR: 27mohm
Rds(on) typ = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C)
Support max charge 3.5A Power loss: 0.245W CSR rating: 1W VSRP-VSRN spec < 81.28mV
**Design Notes** #For 65 /90W system, 3S1P/3S2P battery Maximum Charging current 3.5A Battery discharge power 55W. #Register Setting 1. 0X12 bit8 set 0 (default 1) to disable IFAULT HI
if add ISN choke
2. 0X12 bit3 set 1 (default 0) to enable turbo boos
t function
3. Disable turbo when AC only #Circuit Design 1. ACOK,ILIM pull high voltage need base on 3/5V en
able control
2. Use 10X10 choke and 3X3 H/L side MOSFET Charge current 3.5A Power loss : 1.82W Power density : 0.81 (15X15) 3. If use 4S per cell 4.35V battery, need additiona
l circuit
for ACDET(PR218/PR220/PR222 change to 0.1%, paralle
l resistors
with PR222 for ACDET setting) 4. PC223 2200p is for quick response when AC plug o
ut.
5. For hybrid design, need double check PQ202,PQ203
,PQ204,PQ205 component rating
#Protect function 1. ACOVP : ACDET voltage > 3.14V 2. Charger timeout : No communication within 175s(d
efault)
3. ACOC : 3.33 X Input current DAC setting(default) 4. CHGOCP : 3/4.5/6A based on current current setti
ng
5. BATOVP : 103-106% 6. BATLOWV : 2.5V 7. TSHUT : 155C 8. IFAULT HI : 750mV (default) 9. IFAULT LOW : 110mV (default)
Rds(on) = 35mohm max Vgs = 20V Vds = 30V ID = 7.7A (Ta=70C)
VF = 0.37V
VF = 0.5V
Min. Typ Max. L-->H 17.16V 17.63V 18.12V H-->L 16.76V 17.22V 17.70V
Vin Dectector
VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+620)/20/0.01 = 2.29 A
Rds(on) = 30mohm max Vgs = 20V Vds = 30V ID = 7A (Ta=70C)
Need check the SOA for inrush
Module model information BQ24735A_V1.mdd BQ24735A_V2.mdd
7X7X3 Isat: 6.5A DCR: 30mohm
CHG_ACDRV
CHG_ACN
CHG_ACP
CHG_BATDRV
CHG_BATDRV
CHG_CMSRC
CHG_LX
CHG_CSON1
CHG_CSOP1
CHG_DH
CHG_ACDRV_R
CHG_BATDRV_R
CHG_ACDET
CHG_ILIM
CHG_REGN
CHG_VCC
CHG_CSON1CHG_CSOP1
CHG_SRP CHG_SRN
CHG_DH
CHG_BST
CHG_LX
DL_CHG
CHG_IOUT
CHG
ADP_I <25,45>EC_SMB_CK1 <25,46> EC_SMB_DA1 <25,46>
ACIN
<25,36,8>
P2
P1
+19.5V_VIN
+19.5V_VIN
+14.8V_BATT
+19.5V_VIN
+3VL
CHG_B+
+19.5VB
+3VL
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PWR-CHARGER
47 60
Saturday, January 31, 2015
2014/07/02
2012/07/02
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PWR-CHARGER
47 60
Saturday, January 31, 2015
2014/07/02
2012/07/02
Compal Electronics, Inc.
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
PWR-CHARGER
47 60
Saturday, January 31, 2015
2014/07/02
2012/07/02
Compal Electronics, Inc.
PR209
4.12K_0603_1%
PR209
4.12K_0603_1%
1 2
PC213
1U_0603_25V6K
PC213
1U_0603_25V6K
1
2
PC215
10U_0805_25V6K
PC215
10U_0805_25V6K
1 2
PR215
0_0402_5%
PR215
0_0402_5% 1
2
PC211
0.047U_0402_25V7K
PC211
0.047U_0402_25V7K 1
2
PD202 RB751V-40_SOD323-2 PD202 RB751V-40_SOD323-2
1 2
PR214 100K_0402_1% PR214 100K_0402_1%
1
2
PR205
4.12K_0603_1%
PR205
4.12K_0603_1% 1
2
PC201
2200P_0402_50V7K
PC201
2200P_0402_50V7K
1 2
PQ206
SIS412DN-T1-GE3_POWERPAK8-5
PQ206
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR217
100K_0402_1%
PR217
100K_0402_1%
1 2
PC210
0.1U_0402_25V6
PC210
0.1U_0402_25V6
1 2
PC216
0.1U_0402_25V6
PC216
0.1U_0402_25V6
1 2
PC209
0.1U_0402_25V6
PC209
0.1U_0402_25V6
1
2
PC214
10U_0805_25V6K
PC214
10U_0805_25V6K
1 2
PC205
0.1U_0402_25V6
@EMI@PC205
0.1U_0402_25V6
@EMI@
1 2
PL202
10UH_3.5A_20%_7X7X3_M
PL202
10UH_3.5A_20%_7X7X3_M
1
2
PR223
0_0402_5% @
PR223
0_0402_5% @
1
2
PD201 BAS40CW _SOT323-3 PD201 BAS40CW _SOT323-3
1
2
3
PC224
100P_0402_50V8J
PC224
100P_0402_50V8J
1 2
PR212
10_0603_1%
PR212
10_0603_1% 1
2
PC202
0.1U_0402_25V6
PC202
0.1U_0402_25V6
1 2
PC225 100P_0402_50V8J
@
PC225 100P_0402_50V8J
@
1 2
PC203
10U_0805_25V6K
PC203
10U_0805_25V6K
1 2
PC217
0.1U_0402_25V6
PC217
0.1U_0402_25V6
1 2
PR210
0.01_1206_1%
PR210
0.01_1206_1%
1
34
2
PR213
6.8_0603_1%
PR213
6.8_0603_1% 1
2
PR225
0_0402_5% @
PR225
0_0402_5% @ 1
2
PR216
620K_0402_1%
PR216
620K_0402_1%
1
2
PQ204
AON7506_DFN33-8-5
PQ204
AON7506_DFN33-8-5
3
5
2
4
1
G
D S
PQ201
2N7002KW _SOT323-3
@
G
D S
PQ201
2N7002KW _SOT323-3
@2
1 3
PC212
1U_0603_25V6K
PC212
1U_0603_25V6K
1
2
PR207
2.2_0603_5%
PR207
2.2_0603_5%
1 2
PR208
4.12K_0603_1%
PR208
4.12K_0603_1%
1 2
PU201
BQ24735RGRR_QFN20_3P5X3P5
DIS@ PU201
BQ24735RGRR_QFN20_3P5X3P5
DIS@
ACN
1
ACP
2
CMSRC
3
ACDRV
4
ACOK
5
ACDET
6
IOUT
7
SDA
8
SCL
9
ILIM
10BATDRV
11
SRN
12
SRP
13
GND
14
LODRV
15
REGN
16
BTST
17
HIDRV
18
PHASE
19
VCC
20
PAD
21
PQ203 AON7506_DFN33-8-5 PQ203 AON7506_DFN33-8-5
4
5
123
PR203
0.01_1206_1%
PR203
0.01_1206_1%
1
34
2
PQ202
MDU1512RH_POW ERDFN56-8-5
PQ202
MDU1512RH_POW ERDFN56-8-5
4
5
123
PU201
BQ24725ARGRR_QFN20_3P5X3P5 UMA@
PU201
BQ24725ARGRR_QFN20_3P5X3P5 UMA@
PC223
2200P_0402_50V7K
PC223
2200P_0402_50V7K
1 2
PQ205
SIS412DN-T1-GE3_POWERPAK8-5
PQ205
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC207
0.01U_0402_50V7K
PC207
0.01U_0402_50V7K
1 2
PL201
1UH_2.8A_30%_4X4X2_F
EMI@
PL201
1UH_2.8A_30%_4X4X2_F
EMI@
1
2
PC204
10U_0805_25V6K
PC204
10U_0805_25V6K
1 2
PR224
0_0402_5% @
PR224
0_0402_5% @ 1
2
PR202
3M_0402_5% @
PR202
3M_0402_5% @ 1
2
PR201
1M_0402_5% @
PR201
1M_0402_5% @ 1
2
PC206
2200P_0402_25V7K
EMI@PC206
2200P_0402_25V7K
EMI@
1 2
PC208
0.1U_0402_25V6
PC208
0.1U_0402_25V6
1 2
PR206
10_1206_1%
PR206
10_1206_1%
1 2
PR218
422K_0402_1%
PR218
422K_0402_1% 1
2
PC221
0.1U_0603_16V7K
PC221
0.1U_0603_16V7K
1 2
PC220 @EMI@
680P_0402_50V7K
PC220 @EMI@
680P_0402_50V7K
1 2
PC222
0.01U_0402_25V7K
PC222
0.01U_0402_25V7K
1 2
PR211 @EMI@
4.7_1206_5%
PR211 @EMI@
4.7_1206_5%
1 2
PR204 @
0_0402_5%
PR204 @
0_0402_5%
1 2
PR222
66.5K_0402_1%
PR222
66.5K_0402_1%
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
3VALW/5VALW
Typ: 175mA
Typ: 225mA
+3.3VALWP Ipeak=4.26A ; Imax=3A Delta I=1.583A=>1/2Delta I=0.7915A Rds(on)=11.6m ohm(max) ; Rds(on)=9.1m ohm(typical) OCP = 9.41A~11.8A
+5VALWP Ipeak=9.26A ; Imax=6.5A Delta I=2.694A=>1/2Delta I=1.347A Rds(on)=11.6m ohm(max) ; Rds(on)=9.1m ohm(typical) OCP =11.1A~13.8A5V=375KHz 3V=400KHz (Vin=12 ~ 25v) (By Rton= 56K ohm)
FB=1.98V(Min) 2.006V(Typ) 2.03V(Max)
FB=1.98V(Min) 2.006V(Typ) 2.03V(Max)
Rds(on):9.1m
Ω
~11.6m
Ω
ENLDO (V)
ENM (V)
ENTRIP1 (V)
ENTRIP2 (V)
LDO5 LDO3 +5VALW +3VALW
Low Low
Low
">1.6V" =>High ">1.6V" =>High
">2.3V" =>High ">2.3V" =>High
">1.6V" =>High
">2.3V" =>High
">1.6V" =>High
">2.3V" =>High
">1.6V" =>High
XX
X
X
Off Off
On
On
Off Off
On
On
Off Off Off Off On On Off Off
Off
Off
On On
On On Off On
On
On On On
On
On
On Off
TDC:4.31A Fsw:375KHz H-MOS PD:0.3736W
∆
T:12
℃℃℃℃
L-MOS PD:0.2713W
∆
T:7.9
℃℃℃℃
Choke PD:1.5158W
∆
T:24
℃℃℃℃
OVP margin for Vos:8% @ 330uF cap, 6% @ 220uF
TDC:4.9A Fsw:321KHz H-MOS PD:0.4173W
∆
T:13.4
℃℃℃℃
L-MOS PD:0.3442W
∆
T:10
℃℃℃℃
Choke PD:1.9613W
∆
T:30
℃℃℃℃
OVP margin for Vos:9% @ 330uF cap, 8% @ 220uF
Trace width need meet LDO5 demand
ENLDO threshold ON: 1.2min 1.6typ 2max OFF: 0.9min 0.95typ 1max
ENTRIPx adjustment range: 0.5V~3V, floating or over 4.5V will shutdown channel.
B+ threshold ON: 5.19min 6.92typ 8.65max OFF: 3.89min 4.11typ 4.33max VIN rising threshold: 5.1typ 5.5max falling threshold: 3.5min 4.5max
Module model information RT8243A_V1.mdd
BST_5V LX_5V
FB_5V
UG_5V
LX_5V
BST_3V
LG_5V
FB_3V
LX_3V
LX_3V LG_3V
ENM
+19.5VB_3V/5V
ENM
ENTRIP2
ENTRIP1
UG_3V
+19.5VB_3V/5V
SPOK
<8>
MAINPWON
<25>
EC_ON
<25>
+5VALWP
+3VALWP
+19.5VB
+3VL +VL
+19.5VB_3V/5V
+3VALWP
+3VALW
+5VALWP
+5VALW
+3VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
48 60
Saturday, January 31, 2015
2012/07/10
Compal Electronics, Inc.
2013/07/10
Custom
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
48 60
Saturday, January 31, 2015
2012/07/10
Compal Electronics, Inc.
2013/07/10
Custom
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
48 60
Saturday, January 31, 2015
2012/07/10
Compal Electronics, Inc.
2013/07/10
Custom
LA-C701P
PL8
2.2UH_7.8A_20%_7X7X3_M
PL8
2.2UH_7.8A_20%_7X7X3_M
1
2
PR50
150K_0402_1%
PR50
150K_0402_1%
1 2
PC33
4.7U_0805_25V6K
PC33
4.7U_0805_25V6K
1 2
PR48
4.7_1206_5%
@EMI@PR48
4.7_1206_5%
@EMI@
1 2
PR46
2.2_0603_5%
PR46
2.2_0603_5%
1
2
+
PC40
220U 6.3VM_R15
+
PC40
220U 6.3VM_R15
1 2
+
PC43
220U 6.3VM_R15
+
PC43
220U 6.3VM_R15
1 2
RT8243AZQW _W QFN20_3X3
PU2
RT8243AZQW _W QFN20_3X3
PU2
FB1
1
ENTRIP1
2
TON
3
ENTRIP2
4
FB2
5
PGOOD
6
BOOT2
7
UGATE2
8
PHASE2
9
LGATE2
10
VIN
11
ENLDO
12
ENM
13
LDO5
14
LDO3
15
LGATE1
16
PHASE1
17
UGATE1
18
BOOT1
19
BYP1
20
PAD
21
PC36
4.7U_0805_25V6K
PC36
4.7U_0805_25V6K
1 2
PR44 113K_0402_1% PR44 113K_0402_1%
1 2
PR38
13.3K_0402_1%
PR38
13.3K_0402_1% 1
2
PC46
4.7U_0603_10V6K
PC46
4.7U_0603_10V6K
1 2
PR111
10K_0402_1%
PR111
10K_0402_1%
1 2
PC38
0.1U_0402_25V6
PC38
0.1U_0402_25V6
1
2
PC45 0.1U_0603_25V7K PC45 0.1U_0603_25V7K
1 2
PR47
4.7_1206_5%
@EMI@PR47
4.7_1206_5%
@EMI@
1 2
PR45
2.2_0603_5%
PR45
2.2_0603_5% 1
2
PR52
0_0402_5% @
PR52
0_0402_5% @ 1
2
PC42
680P_0402_50V7K
@EMI@PC42
680P_0402_50V7K
@EMI@
1 2
PR41 100K_0402_1% PR41 100K_0402_1%
1 2
PC34
0.1U_0402_25V6
@EMI@PC34
0.1U_0402_25V6
@EMI@
1 2
PL9
3.3UH_6.3A_20%_7X7X3_M
PL9
3.3UH_6.3A_20%_7X7X3_M
1
2
PR51
2.2K_0402_5%
PR51
2.2K_0402_5% 1
2
PC39
4.7U_0805_25V6K
PC39
4.7U_0805_25V6K
1 2
PJP3
JUMP_43X118 @
PJP3
JUMP_43X118 @
1
1
2
2
PC37 0.1U_0402_25V6 PC37 0.1U_0402_25V6 1
2
PL7
HCB2012KF-121T50_0805
EMI@
PL7
HCB2012KF-121T50_0805
EMI@ 1
2
PR43
20K_0402_1%
PR43
20K_0402_1% 1
2
PJP2
JUMP_43X118 @
PJP2
JUMP_43X118 @
1
1
2
2
PR42 56K_0402_1% PR42 56K_0402_1%
1 2
PC48
4.7U_0603_10V6K
PC48
4.7U_0603_10V6K
1 2
PR49
499K_0402_1%
PR49
499K_0402_1%
1
2
PC47
4.7U_0603_10V6K
PC47
4.7U_0603_10V6K
1 2
AON7934_DFN3X3A8-10
PQ7
AON7934_DFN3X3A8-10
PQ7
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PR40
20K_0402_1%
PR40
20K_0402_1% 1
2
PR39
30K_0402_1%
PR39
30K_0402_1% 1
2
AON7934_DFN3X3A8-10
PQ8
AON7934_DFN3X3A8-10
PQ8
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PR53
402K_0402_1%
PR53
402K_0402_1%
1 2
PC35
2200P_0402_50V7K
EMI@PC35
2200P_0402_50V7K
EMI@
1 2
PC44
4.7U_0805_25V6K
PC44
4.7U_0805_25V6K
1 2
PC41
680P_0402_50V7K
@EMI@PC41
680P_0402_50V7K
@EMI@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
3VALW/5VALW
Typ: 175mA
Typ: 225mA
+3.3VALWP Ipeak=4.26A ; Imax=3A Delta I=1.583A=>1/2Delta I=0.7915A Rds(on)=11.6m ohm(max) ; Rds(on)=9.1m ohm(typical) OCP = 9.41A~11.8A
+5VALWP Ipeak=9.26A ; Imax=6.5A Delta I=2.694A=>1/2Delta I=1.347A Rds(on)=11.6m ohm(max) ; Rds(on)=9.1m ohm(typical) OCP =11.1A~13.8A5V=375KHz 3V=400KHz (Vin=12 ~ 25v) (By Rton= 56K ohm)
FB=1.98V(Min) 2.006V(Typ) 2.03V(Max)
FB=1.98V(Min) 2.006V(Typ) 2.03V(Max)
Rds(on):9.1m
Ω
~11.6m
Ω
ENLDO (V)
ENM (V)
ENTRIP1 (V)
ENTRIP2 (V)
LDO5 LDO3 +5VALW +3VALW
Low Low
Low
">1.6V" =>High ">1.6V" =>High
">2.3V" =>High ">2.3V" =>High
">1.6V" =>High
">2.3V" =>High
">1.6V" =>High
">2.3V" =>High
">1.6V" =>High
XX
X
X
Off Off
On
On
Off Off
On
On
Off Off Off Off On On Off Off
Off
Off
On On
On On Off On
On
On On On
On
On
On Off
TDC:4.31A Fsw:375KHz H-MOS PD:0.3736W
∆
T:12
℃℃℃℃
L-MOS PD:0.2713W
∆
T:7.9
℃℃℃℃
Choke PD:1.5158W
∆
T:24
℃℃℃℃
OVP margin for Vos:8% @ 330uF cap, 6% @ 220uF
TDC:4.9A Fsw:321KHz H-MOS PD:0.4173W
∆
T:13.4
℃℃℃℃
L-MOS PD:0.3442W
∆
T:10
℃℃℃℃
Choke PD:1.9613W
∆
T:30
℃℃℃℃
OVP margin for Vos:9% @ 330uF cap, 8% @ 220uF
Trace width need meet LDO5 demand
ENLDO threshold ON: 1.2min 1.6typ 2max OFF: 0.9min 0.95typ 1max
ENTRIPx adjustment range: 0.5V~3V, floating or over 4.5V will shutdown channel.
B+ threshold ON: 5.19min 6.92typ 8.65max OFF: 3.89min 4.11typ 4.33max VIN rising threshold: 5.1typ 5.5max falling threshold: 3.5min 4.5max
Module model information RT8243A_V1.mdd
BST_5V LX_5V
FB_5V
UG_5V
LX_5V
BST_3V
LG_5V
FB_3V
LX_3V
LX_3V LG_3V
ENM
+19.5VB_3V/5V
ENM
ENTRIP2
ENTRIP1
UG_3V
+19.5VB_3V/5V
SPOK
<8>
MAINPWON
<25>
EC_ON
<25>
+5VALWP
+3VALWP
+19.5VB
+3VL +VL
+19.5VB_3V/5V
+3VALWP
+3VALW
+5VALWP
+5VALW
+3VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
48 60
Saturday, January 31, 2015
2012/07/10
Compal Electronics, Inc.
2013/07/10
Custom
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
48 60
Saturday, January 31, 2015
2012/07/10
Compal Electronics, Inc.
2013/07/10
Custom
LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
48 60
Saturday, January 31, 2015
2012/07/10
Compal Electronics, Inc.
2013/07/10
Custom
LA-C701P
PL8
2.2UH_7.8A_20%_7X7X3_M
PL8
2.2UH_7.8A_20%_7X7X3_M
1
2
PR50
150K_0402_1%
PR50
150K_0402_1%
1 2
PC33
4.7U_0805_25V6K
PC33
4.7U_0805_25V6K
1 2
PR48
4.7_1206_5%
@EMI@PR48
4.7_1206_5%
@EMI@
1 2
PR46
2.2_0603_5%
PR46
2.2_0603_5%
1
2
+
PC40
220U 6.3VM_R15
+
PC40
220U 6.3VM_R15
1 2
+
PC43
220U 6.3VM_R15
+
PC43
220U 6.3VM_R15
1 2
RT8243AZQW _W QFN20_3X3
PU2
RT8243AZQW _W QFN20_3X3
PU2
FB1
1
ENTRIP1
2
TON
3
ENTRIP2
4
FB2
5
PGOOD
6
BOOT2
7
UGATE2
8
PHASE2
9
LGATE2
10
VIN
11
ENLDO
12
ENM
13
LDO5
14
LDO3
15
LGATE1
16
PHASE1
17
UGATE1
18
BOOT1
19
BYP1
20
PAD
21
PC36
4.7U_0805_25V6K
PC36
4.7U_0805_25V6K
1 2
PR44 113K_0402_1% PR44 113K_0402_1%
1 2
PR38
13.3K_0402_1%
PR38
13.3K_0402_1% 1
2
PC46
4.7U_0603_10V6K
PC46
4.7U_0603_10V6K
1 2
PR111
10K_0402_1%
PR111
10K_0402_1%
1 2
PC38
0.1U_0402_25V6
PC38
0.1U_0402_25V6
1
2
PC45 0.1U_0603_25V7K PC45 0.1U_0603_25V7K
1 2
PR47
4.7_1206_5%
@EMI@PR47
4.7_1206_5%
@EMI@
1 2
PR45
2.2_0603_5%
PR45
2.2_0603_5% 1
2
PR52
0_0402_5% @
PR52
0_0402_5% @ 1
2
PC42
680P_0402_50V7K
@EMI@PC42
680P_0402_50V7K
@EMI@
1 2
PR41 100K_0402_1% PR41 100K_0402_1%
1 2
PC34
0.1U_0402_25V6
@EMI@PC34
0.1U_0402_25V6
@EMI@
1 2
PL9
3.3UH_6.3A_20%_7X7X3_M
PL9
3.3UH_6.3A_20%_7X7X3_M
1
2
PR51
2.2K_0402_5%
PR51
2.2K_0402_5% 1
2
PC39
4.7U_0805_25V6K
PC39
4.7U_0805_25V6K
1 2
PJP3
JUMP_43X118 @
PJP3
JUMP_43X118 @
1
1
2
2
PC37 0.1U_0402_25V6 PC37 0.1U_0402_25V6 1
2
PL7
HCB2012KF-121T50_0805
EMI@
PL7
HCB2012KF-121T50_0805
EMI@ 1
2
PR43
20K_0402_1%
PR43
20K_0402_1% 1
2
PJP2
JUMP_43X118 @
PJP2
JUMP_43X118 @
1
1
2
2
PR42 56K_0402_1% PR42 56K_0402_1%
1 2
PC48
4.7U_0603_10V6K
PC48
4.7U_0603_10V6K
1 2
PR49
499K_0402_1%
PR49
499K_0402_1%
1
2
PC47
4.7U_0603_10V6K
PC47
4.7U_0603_10V6K
1 2
AON7934_DFN3X3A8-10
PQ7
AON7934_DFN3X3A8-10
PQ7
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PR40
20K_0402_1%
PR40
20K_0402_1% 1
2
PR39
30K_0402_1%
PR39
30K_0402_1% 1
2
AON7934_DFN3X3A8-10
PQ8
AON7934_DFN3X3A8-10
PQ8
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PR53
402K_0402_1%
PR53
402K_0402_1%
1 2
PC35
2200P_0402_50V7K
EMI@PC35
2200P_0402_50V7K
EMI@
1 2
PC44
4.7U_0805_25V6K
PC44
4.7U_0805_25V6K
1 2
PC41
680P_0402_50V7K
@EMI@PC41
680P_0402_50V7K
@EMI@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Pin19 need pull separate from +1.35VP. If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS.
+1.35VP Ipeak=7.4A ; Imax=6A Delta I=2.2A=>1/2Delta I=1.1A (F=521K Hz) Rds(on)=11.6m ohm(max) ; Rds(on)=9.1m ohm(typical) OCP = 11A~13.7A Choke: 7x7x3 Rdc=8.3mohm(Typ), 10mohm(Max) Switching Frequency: 285kHz Ipeak=10A Iocp~13A OVP: 110%~120% VFB=0.75V, Vout=1.3545V
Mode Level +0.675VSP VTTREF_1.35V S5 L off off S3 L off on S0 H on on Note: S3 - sleep ; S5 - power off
0.675Volt +/- 5% TDC 0.7A Peak Current 1A
Module model information RT8207M_V1.mdd For Single layer RT8207M_V2.mdd For Dual layer
VFB=0.75V
Rds(on):9.1m
Ω
~11.6m
Ω
TON_1.35VP
LG_1.35VP
+19.5VB_1.35VP
BST_1.35VP
LX_1.35VP
+19.5VB_1.35VP
UG_1.35VP
CS_1.35VP
LX_1.35VP
BST_1.35VP_R
VDD_1.35VP
FB_1.35VP
VTTREF_1.35VP
EN_0.675VSP
EN_1.35VP
SUSP#
<24,25,50,53>
SYSON
<24,25>
SM_PG_CTRL
<15,4>
+1.35VP
+19.5VB
+5VALW
+1.35VP
+0.675VSP
+1.35VP
+1.35VP
+1.35VP
+0.675VSP
+1.35V_VDDQ +0.6V_0.675VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Compal Electronics, Inc.
0.1
Custom
49 60
Saturday, January 31, 2015
2010/07/20
2012/12/31
RT8207P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Compal Electronics, Inc.
0.1
Custom
49 60
Saturday, January 31, 2015
2010/07/20
2012/12/31
RT8207P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Compal Electronics, Inc.
0.1
Custom
49 60
Saturday, January 31, 2015
2010/07/20
2012/12/31
RT8207P
PR55
11.5K_0402_1%
PR55
11.5K_0402_1% 1
2
PR54
2.2_0603_5%
PR54
2.2_0603_5% 1
2
PC66
0.1U_0402_10V7K
@
PC66
0.1U_0402_10V7K
@
1 2
PC61
22U_0603_6.3V6M
PC61
22U_0603_6.3V6M
1 2
PC62
22U_0603_6.3V6M
PC62
22U_0603_6.3V6M
1 2
PC51
10U_0805_25V6K
PC51
10U_0805_25V6K
1 2
PJP4
JUMP_43X118
@
PJP4
JUMP_43X118
@
1
1
2
2
PC54
10U_0603_6.3V6M
PC54
10U_0603_6.3V6M
1 2
PR58
8.06K_0402_1%
PR58
8.06K_0402_1%
1
2
PR61
0_0402_5%
PR61
0_0402_5% 1
2
PR65
5.1_0603_5%
PR65
5.1_0603_5% 1
2
PC53
10U_0603_6.3V6M
PC53
10U_0603_6.3V6M
1 2 PJP5
JUMP_43X39
@
PJP5
JUMP_43X39
@
1
1
2
2
PC56
22U_0603_6.3V6M
PC56
22U_0603_6.3V6M
1 2
PR62
0_0402_5%
PR62
0_0402_5% 1
2
PR60 10K_0402_1% PR60 10K_0402_1%
1 2
PU3 RT8207PGQW _W QFN20_3X3 PU3 RT8207PGQW _W QFN20_3X3
VTTSNS
2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE
16
BOOT
18
VTTREF
4
PGND
14
VTTGND
1
GND
3
VDDQ
5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE
17
VTT
20
VLDOIN
19
PAD
21
PC65
0.1U_0402_10V7K
@
PC65
0.1U_0402_10V7K
@
1 2
PC55
1U_0402_10V6K
PC55
1U_0402_10V6K
1
2
PL11
1UH_11A_20%_7X7X3_M
PL11
1UH_11A_20%_7X7X3_M
1
2
PL10
HCB2012KF-121T50_0805
EMI@
PL10
HCB2012KF-121T50_0805
EMI@
1
2
PC50
10U_0805_25V6K
PC50
10U_0805_25V6K
1 2
AON7934_DFN3X3A8-10 PQ11 AON7934_DFN3X3A8-10 PQ11
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PC60 0.033U_0402_16V7K PC60 0.033U_0402_16V7K
1 2
PR57
5.1_0603_5%
PR57
5.1_0603_5% 1
2
PC63
1U_0402_10V6K
PC63
1U_0402_10V6K
1 2
PC58
22U_0603_6.3V6M
PC58
22U_0603_6.3V6M
1 2
PC52
0.1U_0603_25V7K
PC52
0.1U_0603_25V7K
1 2
PC49
2200P_0402_50V7K
@EMI@PC49
2200P_0402_50V7K
@EMI@
1 2
PC57
22U_0603_6.3V6M
PC57
22U_0603_6.3V6M
1 2
PR59
470K_0402_1%
PR59
470K_0402_1% 1
2
PR56
4.7_1206_5%
@EMI@
PR56
4.7_1206_5%
@EMI@
1 2
PC59
22U_0603_6.3V6M
PC59
22U_0603_6.3V6M
1 2
PR63
0_0402_5% @
PR63
0_0402_5% @ 1
2
PC64
680P_0402_50V7K
@EMI@
PC64
680P_0402_50V7K
@EMI@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Pin19 need pull separate from +1.35VP. If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS.
+1.35VP Ipeak=7.4A ; Imax=6A Delta I=2.2A=>1/2Delta I=1.1A (F=521K Hz) Rds(on)=11.6m ohm(max) ; Rds(on)=9.1m ohm(typical) OCP = 11A~13.7A Choke: 7x7x3 Rdc=8.3mohm(Typ), 10mohm(Max) Switching Frequency: 285kHz Ipeak=10A Iocp~13A OVP: 110%~120% VFB=0.75V, Vout=1.3545V
Mode Level +0.675VSP VTTREF_1.35V S5 L off off S3 L off on S0 H on on Note: S3 - sleep ; S5 - power off
0.675Volt +/- 5% TDC 0.7A Peak Current 1A
Module model information RT8207M_V1.mdd For Single layer RT8207M_V2.mdd For Dual layer
VFB=0.75V
Rds(on):9.1m
Ω
~11.6m
Ω
TON_1.35VP
LG_1.35VP
+19.5VB_1.35VP
BST_1.35VP
LX_1.35VP
+19.5VB_1.35VP
UG_1.35VP
CS_1.35VP
LX_1.35VP
BST_1.35VP_R
VDD_1.35VP
FB_1.35VP
VTTREF_1.35VP
EN_0.675VSP
EN_1.35VP
SUSP#
<24,25,50,53>
SYSON
<24,25>
SM_PG_CTRL
<15,4>
+1.35VP
+19.5VB
+5VALW
+1.35VP
+0.675VSP
+1.35VP
+1.35VP
+1.35VP
+0.675VSP
+1.35V_VDDQ +0.6V_0.675VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Compal Electronics, Inc.
0.1
Custom
49 60
Saturday, January 31, 2015
2010/07/20
2012/12/31
RT8207P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Compal Electronics, Inc.
0.1
Custom
49 60
Saturday, January 31, 2015
2010/07/20
2012/12/31
RT8207P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
Compal Electronics, Inc.
0.1
Custom
49 60
Saturday, January 31, 2015
2010/07/20
2012/12/31
RT8207P
PR55
11.5K_0402_1%
PR55
11.5K_0402_1% 1
2
PR54
2.2_0603_5%
PR54
2.2_0603_5% 1
2
PC66
0.1U_0402_10V7K
@
PC66
0.1U_0402_10V7K
@
1 2
PC61
22U_0603_6.3V6M
PC61
22U_0603_6.3V6M
1 2
PC62
22U_0603_6.3V6M
PC62
22U_0603_6.3V6M
1 2
PC51
10U_0805_25V6K
PC51
10U_0805_25V6K
1 2
PJP4
JUMP_43X118
@
PJP4
JUMP_43X118
@
1
1
2
2
PC54
10U_0603_6.3V6M
PC54
10U_0603_6.3V6M
1 2
PR58
8.06K_0402_1%
PR58
8.06K_0402_1%
1
2
PR61
0_0402_5%
PR61
0_0402_5% 1
2
PR65
5.1_0603_5%
PR65
5.1_0603_5% 1
2
PC53
10U_0603_6.3V6M
PC53
10U_0603_6.3V6M
1 2 PJP5
JUMP_43X39
@
PJP5
JUMP_43X39
@
1
1
2
2
PC56
22U_0603_6.3V6M
PC56
22U_0603_6.3V6M
1 2
PR62
0_0402_5%
PR62
0_0402_5% 1
2
PR60 10K_0402_1% PR60 10K_0402_1%
1 2
PU3 RT8207PGQW _W QFN20_3X3 PU3 RT8207PGQW _W QFN20_3X3
VTTSNS
2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE
16
BOOT
18
VTTREF
4
PGND
14
VTTGND
1
GND
3
VDDQ
5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE
17
VTT
20
VLDOIN
19
PAD
21
PC65
0.1U_0402_10V7K
@
PC65
0.1U_0402_10V7K
@
1 2
PC55
1U_0402_10V6K
PC55
1U_0402_10V6K
1
2
PL11
1UH_11A_20%_7X7X3_M
PL11
1UH_11A_20%_7X7X3_M
1
2
PL10
HCB2012KF-121T50_0805
EMI@
PL10
HCB2012KF-121T50_0805
EMI@
1
2
PC50
10U_0805_25V6K
PC50
10U_0805_25V6K
1 2
AON7934_DFN3X3A8-10 PQ11 AON7934_DFN3X3A8-10 PQ11
S2
6
D1
4
S2
7
G1
1
S2
5
D1
3
G2
8
D1
2
D1
10
D2/S1
9
PC60 0.033U_0402_16V7K PC60 0.033U_0402_16V7K
1 2
PR57
5.1_0603_5%
PR57
5.1_0603_5% 1
2
PC63
1U_0402_10V6K
PC63
1U_0402_10V6K
1 2
PC58
22U_0603_6.3V6M
PC58
22U_0603_6.3V6M
1 2
PC52
0.1U_0603_25V7K
PC52
0.1U_0603_25V7K
1 2
PC49
2200P_0402_50V7K
@EMI@PC49
2200P_0402_50V7K
@EMI@
1 2
PC57
22U_0603_6.3V6M
PC57
22U_0603_6.3V6M
1 2
PR59
470K_0402_1%
PR59
470K_0402_1% 1
2
PR56
4.7_1206_5%
@EMI@
PR56
4.7_1206_5%
@EMI@
1 2
PC59
22U_0603_6.3V6M
PC59
22U_0603_6.3V6M
1 2
PR63
0_0402_5% @
PR63
0_0402_5% @ 1
2
PC64
680P_0402_50V7K
@EMI@
PC64
680P_0402_50V7K
@EMI@
1 2
A A
B B
C C
D D
1
1
2
2
3
3
4
4
Note:Iload(max)=3A
FB=0.6V
Note:Iload(max)=2.5A
Rup Rdown Vout=0.6V* (1+Rup/Rdown)
Module model information SY8003_V2.mdd
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
20141124 Pull high in HW side
FB_1.05V
LX_1.05V
EN_1.05V
SUSP# <24,25,49,53>
1.05V_VS_PG_PW R
<25>
+3VALW
+1.05VSP
+1.05VSP
+1.05VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
SY8003
Custom
50 60
Saturday, January 31, 2015
2011/06/13
2012/06/13
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
SY8003
Custom
50 60
Saturday, January 31, 2015
2011/06/13
2012/06/13
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
SY8003
Custom
50 60
Saturday, January 31, 2015
2011/06/13
2012/06/13
PR66
1M_0402_5%
PR66
1M_0402_5%
1 2
PC69
68P_0402_50V8J
PC69
68P_0402_50V8J
1 2
PJP6
JUMP_43X79@
PJP6
JUMP_43X79@
1
1
2
2
PC70
22U_0603_6.3V6M
PC70
22U_0603_6.3V6M
1 2
PJP7
JUMP_43X79 @
PJP7
JUMP_43X79 @
1
1
2
2
PC72
680P_0402_50V7K
@EMI@PC72
680P_0402_50V7K
@EMI@
1 2
PR64
0_0402_5%
PR64
0_0402_5% 1
2
PC71
22U_0603_6.3V6M
PC71
22U_0603_6.3V6M
1 2
PR69
10K_0402_1%
PR69
10K_0402_1%
1 2
PC67
0.1U_0402_16V7K
@PC67
0.1U_0402_16V7K
@
1 2
PR68
7.5K_0402_1%
PR68
7.5K_0402_1%
1 2
PR67
4.7_0603_5%
@EMI@PR67
4.7_0603_5%
@EMI@
1 2
PL12
1UH_2.8A_30%_4X4X2_F
PL12
1UH_2.8A_30%_4X4X2_F
1
2
PC68
22U_0603_6.3V6M
PC68
22U_0603_6.3V6M
1 2
PU4 SY8003DFC_DFN8_2X2PU4 SY8003DFC_DFN8_2X2
NC
5
IN
3
PGND
4
PG
2
FB
1
LX
6
EN
7
SGND
8
PGND
9
B B
C C
D D
1
1
2
2
3
3
4
4
Note:Iload(max)=3A
FB=0.6V
Note:Iload(max)=2.5A
Rup Rdown Vout=0.6V* (1+Rup/Rdown)
Module model information SY8003_V2.mdd
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
20141124 Pull high in HW side
FB_1.05V
LX_1.05V
EN_1.05V
SUSP# <24,25,49,53>
1.05V_VS_PG_PW R
<25>
+3VALW
+1.05VSP
+1.05VSP
+1.05VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
SY8003
Custom
50 60
Saturday, January 31, 2015
2011/06/13
2012/06/13
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
SY8003
Custom
50 60
Saturday, January 31, 2015
2011/06/13
2012/06/13
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
SY8003
Custom
50 60
Saturday, January 31, 2015
2011/06/13
2012/06/13
PR66
1M_0402_5%
PR66
1M_0402_5%
1 2
PC69
68P_0402_50V8J
PC69
68P_0402_50V8J
1 2
PJP6
JUMP_43X79@
PJP6
JUMP_43X79@
1
1
2
2
PC70
22U_0603_6.3V6M
PC70
22U_0603_6.3V6M
1 2
PJP7
JUMP_43X79 @
PJP7
JUMP_43X79 @
1
1
2
2
PC72
680P_0402_50V7K
@EMI@PC72
680P_0402_50V7K
@EMI@
1 2
PR64
0_0402_5%
PR64
0_0402_5% 1
2
PC71
22U_0603_6.3V6M
PC71
22U_0603_6.3V6M
1 2
PR69
10K_0402_1%
PR69
10K_0402_1%
1 2
PC67
0.1U_0402_16V7K
@PC67
0.1U_0402_16V7K
@
1 2
PR68
7.5K_0402_1%
PR68
7.5K_0402_1%
1 2
PR67
4.7_0603_5%
@EMI@PR67
4.7_0603_5%
@EMI@
1 2
PL12
1UH_2.8A_30%_4X4X2_F
PL12
1UH_2.8A_30%_4X4X2_F
1
2
PC68
22U_0603_6.3V6M
PC68
22U_0603_6.3V6M
1 2
PU4 SY8003DFC_DFN8_2X2PU4 SY8003DFC_DFN8_2X2
NC
5
IN
3
PGND
4
PG
2
FB
1
LX
6
EN
7
SGND
8
PGND
9
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Base on BDW PDDG Rev_0_73
Local sense put on HW site
L-side MOS: MDU1511RH Rds(on): <2.4mohm@Vgs=10V <3.3mohm@Vgs=4.5V Id :100A@Vgs=10VH-side MOS: MDV1525URH Rds(on): <10.1mohm@Vgs=10V <14.0mohm@Vgs=4.5V Id :24A@Vgs=10V Choke: 0.15UH (Size:7*7*4) Rdc=0.66mohm +-7% Heat Rating Current=36A
Module model information: ISL95813_V1A for IC module ISL95813_V1B for SW module
TDC 14A
15W
MAX 32A OCP 39A Loadline=-2.0mv/A
PR72 PR75PR89 PR85
28W
TDC 19A MAX 40A OCP 48A Loadline=-2.0mv/A
Note
PC88 PC83
287 Ohm 348 Ohm 1.27kOhm 1.58kOhm 0.033uF 0.01uF 90.9kOhm 113kOhm 95.3kOhm 95.3kOhm 0.1uF ( 0402 ) 0.1uF ( 0402 )
OCP Droop RC Match PROG1 IMON RC Filter
Location
OCP Setting
Droop
RC Match
Note: PR72=90.9K =>Icc(max)=33A fsw=700KHz
Over temperature protection: OTP Setting: 100C active Pin5 (NTC) voltage <0.88V, Protect Pin5 (NTC) voltage >0.92v, recovery Note: VR_HOT# Pull high on HW side
Follow intel guideline
Note: PR81=124K =>Slew rate=53mV/us Vboot = 1.7V
Note: VR_SVID_ALRT# Pull high on HW side
20150107 change PC88 PN from SE000006OM8 to SE000006O00
CPU_B+
VR_SVID_DAT
VR_ON
IMON NTC
VR_SVID_ALRT#
VR_SVID_CLK
COMP
ISUMP
ISUMN
PRGM2LAGTE UAGTE BOOTPHASE
PRGM1
FB
VR_SVID_DAT
<11>
VR_SVID_ALRT#
<11>
VR_SVID_CLK
<11>
VR_ON
<11>
VCCSENSE
<11>
VSSSENSE
<13>
VR_HOT#
<25>
VGATE
<11>
+VCC_CORE
+19.5VB
+5VS
+1.05VS
CPU_B+
Title Size Document Number
Rev
Date:
Sheet
of
LA-C701P
ISL95813 for BDW-Y&U(15W/28W) CPU
51 60
Saturday, January 31, 2015
123
Title Size Document Number
Rev
Date:
Sheet
of
LA-C701P
ISL95813 for BDW-Y&U(15W/28W) CPU
51 60
Saturday, January 31, 2015
123
Title Size Document Number
Rev
Date:
Sheet
of
LA-C701P
ISL95813 for BDW-Y&U(15W/28W) CPU
51 60
Saturday, January 31, 2015
123
PR82
5.9K_0402_1%
PR82
5.9K_0402_1%
1 2
PR73
1.5K_0402_1%
PR73
1.5K_0402_1%
1
2
PR90
1.5K_0402_1%@
PR90
1.5K_0402_1%@ 1
2
+
PC118
100U_25V_M
@
+
PC118
100U_25V_M
@
1 2
PL19
5A_Z120_25M_0805_2P EMI@
PL19
5A_Z120_25M_0805_2P EMI@
1
2
PU5
ISL95813HRZ-T_QFN20_3X4
PU5
ISL95813HRZ-T_QFN20_3X4
SCLK
20
VR_ON
1
PGOOD
2
IMON
3
VR_HOT#
4
NTC
5
COMP
6
FB
7
RTN
8
ISUMN
9
ISUMP
10
VCC
12
BOOT
13
UGATE
14
PHASE
15
LGATE
16
PRGM2
11
SDA
18
ALERT#
19
PAD
21
PRGM1
17
PC80
0.22U_0603_16V7K
PC80
0.22U_0603_16V7K
1
2
PC82
680P_0603_50V7K
@EMI@PC82
680P_0603_50V7K
@EMI@
1 2
PC88 0.033U_0402_25V7K PC88 0.033U_0402_25V7K
1 2
PR79 3.83K_0402_1% PR79 3.83K_0402_1%
1
2
PR72
90.9K_0402_1%
PR72
90.9K_0402_1%
1
2
PC91
0.082U_0402_16V7K
@
PC91
0.082U_0402_16V7K
@
1 2
+
PC78
100U_25V_M
+
PC78
100U_25V_M
1 2
PR75
95.3K_0402_1%
PR75
95.3K_0402_1%
1
2
PR89
287_0402_1%
PR89
287_0402_1%
1
2
PR81
124K_0402_1%
PR81
124K_0402_1%
1 2
PC92
0.01U_0402_50V7K
PC92
0.01U_0402_50V7K
1
2PC86
330P_0402_50V7K
@PC86
330P_0402_50V7K
@
1 2
PR74
0_0603_5%
PR74
0_0603_5% 1
2
PR71 54.9_0402_1% PR71 54.9_0402_1%
1
2
PR70 130_0402_1% PR70 130_0402_1%
1
2
PQ12
MDV1525URH_PDFN33-8-5
PQ12
MDV1525URH_PDFN33-8-5
4
5
1
2
3
PC76
0.1U_0402_25V6
@EMI@PC76
0.1U_0402_25V6
@EMI@
1 2
PR84
10_0402_1%
@
PR84
10_0402_1%
@
1 2
PC83 0.1U_0402_25V6 PC83 0.1U_0402_25V6
1 2
PR85
1.27K_0402_1%
PR85
1.27K_0402_1%
1 2
PC74
10U_0805_25V6K
PC74
10U_0805_25V6K
1 2
PR78 3.65K_0603_1% PR78 3.65K_0603_1%
1 2
PC75
10U_0805_25V6K
PC75
10U_0805_25V6K
1 2
PC81
47P_0402_50V8J
PC81
47P_0402_50V8J
1 2
PC87
390P_0402_50V7K
@
PC87
390P_0402_50V7K
@
1 2
PC73
1U_0402_6.3V6K
PC73
1U_0402_6.3V6K
1
2
PC89 0.1U_0402_16V4Z PC89 0.1U_0402_16V4Z
1 2
PL13
5A_Z120_25M_0805_2P EMI@
PL13
5A_Z120_25M_0805_2P EMI@
1
2
PH2
470K_0402_5%_B25/50 4700K
PH2
470K_0402_5%_B25/50 4700K
1
2
PR87 2.61K_0402_1% PR87 2.61K_0402_1%
1 2
PR76
4.7_1206_5%
@EMI@PR76
4.7_1206_5%
@EMI@
1 2
PR80
27.4K_0402_1%
PR80
27.4K_0402_1%
1
2
PR77
2.2_0603_5%
PR77
2.2_0603_5%
1
2
PC79
1000P_0402_50V7K
PC79
1000P_0402_50V7K
1
2
PL14
0.15UH_29A_+-20%_7X7X4_M
PL14
0.15UH_29A_+-20%_7X7X4_M
1
34
2
PC93
4700P_0402_25V7K
@
PC93
4700P_0402_25V7K
@ 1
2
PR86
4.99M_0402_1%
@
PR86
4.99M_0402_1%
@
1 2
PC77
2200P_0402_50V7K
EMI@PC77
2200P_0402_50V7K
EMI@
1 2
PC84
33P_0402_50V8J
PC84
33P_0402_50V8J
1 2
PC85
6800P_0402_25V7K
PC85
6800P_0402_25V7K
1 2
PQ13
MDU1511RH_POWERDFN56-8-5
PQ13
MDU1511RH_POWERDFN56-8-5
5
4
2
1
3
PR83
2K_0402_1%
@PR83
2K_0402_1%
@
1 2
PR88 11K_0402_1% PR88 11K_0402_1%
1 2
PH3
10K_0402_5%_B25/50 4250K
PH3
10K_0402_5%_B25/50 4250K
1 2
PC90
330P_0402_50V7K
@
PC90
330P_0402_50V7K
@1
2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Base on BDW PDDG Rev_0_73
Local sense put on HW site
L-side MOS: MDU1511RH Rds(on): <2.4mohm@Vgs=10V <3.3mohm@Vgs=4.5V Id :100A@Vgs=10VH-side MOS: MDV1525URH Rds(on): <10.1mohm@Vgs=10V <14.0mohm@Vgs=4.5V Id :24A@Vgs=10V Choke: 0.15UH (Size:7*7*4) Rdc=0.66mohm +-7% Heat Rating Current=36A
Module model information: ISL95813_V1A for IC module ISL95813_V1B for SW module
TDC 14A
15W
MAX 32A OCP 39A Loadline=-2.0mv/A
PR72 PR75PR89 PR85
28W
TDC 19A MAX 40A OCP 48A Loadline=-2.0mv/A
Note
PC88 PC83
287 Ohm 348 Ohm 1.27kOhm 1.58kOhm 0.033uF 0.01uF 90.9kOhm 113kOhm 95.3kOhm 95.3kOhm 0.1uF ( 0402 ) 0.1uF ( 0402 )
OCP Droop RC Match PROG1 IMON RC Filter
Location
OCP Setting
Droop
RC Match
Note: PR72=90.9K =>Icc(max)=33A fsw=700KHz
Over temperature protection: OTP Setting: 100C active Pin5 (NTC) voltage <0.88V, Protect Pin5 (NTC) voltage >0.92v, recovery Note: VR_HOT# Pull high on HW side
Follow intel guideline
Note: PR81=124K =>Slew rate=53mV/us Vboot = 1.7V
Note: VR_SVID_ALRT# Pull high on HW side
20150107 change PC88 PN from SE000006OM8 to SE000006O00
CPU_B+
VR_SVID_DAT
VR_ON
IMON NTC
VR_SVID_ALRT#
VR_SVID_CLK
COMP
ISUMP
ISUMN
PRGM2LAGTE UAGTE BOOTPHASE
PRGM1
FB
VR_SVID_DAT
<11>
VR_SVID_ALRT#
<11>
VR_SVID_CLK
<11>
VR_ON
<11>
VCCSENSE
<11>
VSSSENSE
<13>
VR_HOT#
<25>
VGATE
<11>
+VCC_CORE
+19.5VB
+5VS
+1.05VS
CPU_B+
Title Size Document Number
Rev
Date:
Sheet
of
LA-C701P
ISL95813 for BDW-Y&U(15W/28W) CPU
51 60
Saturday, January 31, 2015
123
Title Size Document Number
Rev
Date:
Sheet
of
LA-C701P
ISL95813 for BDW-Y&U(15W/28W) CPU
51 60
Saturday, January 31, 2015
123
Title Size Document Number
Rev
Date:
Sheet
of
LA-C701P
ISL95813 for BDW-Y&U(15W/28W) CPU
51 60
Saturday, January 31, 2015
123
PR82
5.9K_0402_1%
PR82
5.9K_0402_1%
1 2
PR73
1.5K_0402_1%
PR73
1.5K_0402_1%
1
2
PR90
1.5K_0402_1%@
PR90
1.5K_0402_1%@ 1
2
+
PC118
100U_25V_M
@
+
PC118
100U_25V_M
@
1 2
PL19
5A_Z120_25M_0805_2P EMI@
PL19
5A_Z120_25M_0805_2P EMI@
1
2
PU5
ISL95813HRZ-T_QFN20_3X4
PU5
ISL95813HRZ-T_QFN20_3X4
SCLK
20
VR_ON
1
PGOOD
2
IMON
3
VR_HOT#
4
NTC
5
COMP
6
FB
7
RTN
8
ISUMN
9
ISUMP
10
VCC
12
BOOT
13
UGATE
14
PHASE
15
LGATE
16
PRGM2
11
SDA
18
ALERT#
19
PAD
21
PRGM1
17
PC80
0.22U_0603_16V7K
PC80
0.22U_0603_16V7K
1
2
PC82
680P_0603_50V7K
@EMI@PC82
680P_0603_50V7K
@EMI@
1 2
PC88 0.033U_0402_25V7K PC88 0.033U_0402_25V7K
1 2
PR79 3.83K_0402_1% PR79 3.83K_0402_1%
1
2
PR72
90.9K_0402_1%
PR72
90.9K_0402_1%
1
2
PC91
0.082U_0402_16V7K
@
PC91
0.082U_0402_16V7K
@
1 2
+
PC78
100U_25V_M
+
PC78
100U_25V_M
1 2
PR75
95.3K_0402_1%
PR75
95.3K_0402_1%
1
2
PR89
287_0402_1%
PR89
287_0402_1%
1
2
PR81
124K_0402_1%
PR81
124K_0402_1%
1 2
PC92
0.01U_0402_50V7K
PC92
0.01U_0402_50V7K
1
2PC86
330P_0402_50V7K
@PC86
330P_0402_50V7K
@
1 2
PR74
0_0603_5%
PR74
0_0603_5% 1
2
PR71 54.9_0402_1% PR71 54.9_0402_1%
1
2
PR70 130_0402_1% PR70 130_0402_1%
1
2
PQ12
MDV1525URH_PDFN33-8-5
PQ12
MDV1525URH_PDFN33-8-5
4
5
1
2
3
PC76
0.1U_0402_25V6
@EMI@PC76
0.1U_0402_25V6
@EMI@
1 2
PR84
10_0402_1%
@
PR84
10_0402_1%
@
1 2
PC83 0.1U_0402_25V6 PC83 0.1U_0402_25V6
1 2
PR85
1.27K_0402_1%
PR85
1.27K_0402_1%
1 2
PC74
10U_0805_25V6K
PC74
10U_0805_25V6K
1 2
PR78 3.65K_0603_1% PR78 3.65K_0603_1%
1 2
PC75
10U_0805_25V6K
PC75
10U_0805_25V6K
1 2
PC81
47P_0402_50V8J
PC81
47P_0402_50V8J
1 2
PC87
390P_0402_50V7K
@
PC87
390P_0402_50V7K
@
1 2
PC73
1U_0402_6.3V6K
PC73
1U_0402_6.3V6K
1
2
PC89 0.1U_0402_16V4Z PC89 0.1U_0402_16V4Z
1 2
PL13
5A_Z120_25M_0805_2P EMI@
PL13
5A_Z120_25M_0805_2P EMI@
1
2
PH2
470K_0402_5%_B25/50 4700K
PH2
470K_0402_5%_B25/50 4700K
1
2
PR87 2.61K_0402_1% PR87 2.61K_0402_1%
1 2
PR76
4.7_1206_5%
@EMI@PR76
4.7_1206_5%
@EMI@
1 2
PR80
27.4K_0402_1%
PR80
27.4K_0402_1%
1
2
PR77
2.2_0603_5%
PR77
2.2_0603_5%
1
2
PC79
1000P_0402_50V7K
PC79
1000P_0402_50V7K
1
2
PL14
0.15UH_29A_+-20%_7X7X4_M
PL14
0.15UH_29A_+-20%_7X7X4_M
1
34
2
PC93
4700P_0402_25V7K
@
PC93
4700P_0402_25V7K
@ 1
2
PR86
4.99M_0402_1%
@
PR86
4.99M_0402_1%
@
1 2
PC77
2200P_0402_50V7K
EMI@PC77
2200P_0402_50V7K
EMI@
1 2
PC84
33P_0402_50V8J
PC84
33P_0402_50V8J
1 2
PC85
6800P_0402_25V7K
PC85
6800P_0402_25V7K
1 2
PQ13
MDU1511RH_POWERDFN56-8-5
PQ13
MDU1511RH_POWERDFN56-8-5
5
4
2
1
3
PR83
2K_0402_1%
@PR83
2K_0402_1%
@
1 2
PR88 11K_0402_1% PR88 11K_0402_1%
1 2
PH3
10K_0402_5%_B25/50 4250K
PH3
10K_0402_5%_B25/50 4250K
1 2
PC90
330P_0402_50V7K
@
PC90
330P_0402_50V7K
@1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
BDW-U 15W 220uF × 1 22uF × 7 2.2uF × 1
+VCC_CORE
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
52
0.1
PROCESSOR DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
52
0.1
PROCESSOR DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
52
0.1
PROCESSOR DECOUPLING
Saturday, January 31, 2015
PCZ60
22U_0603_6.3V6M
@ PCZ60
22U_0603_6.3V6M
@
1 2
PCZ59
22U_0603_6.3V6M
@ PCZ59
22U_0603_6.3V6M
@
1 2
PCZ57
22U_0603_6.3V6M
@
PCZ57
22U_0603_6.3V6M
@
1 2
PCZ62
22U_0603_6.3V6M
PCZ62
22U_0603_6.3V6M
1 2
PCZ58
22U_0603_6.3V6M
@ PCZ58
22U_0603_6.3V6M
@
1 2
PCZ64
22U_0603_6.3V6M
PCZ64
22U_0603_6.3V6M
1 2
+
PCZ42 220U_D2 SX_2VY_R9M
+
PCZ42 220U_D2 SX_2VY_R9M
1 2
PCZ70
2.2U_0402_10V6M
PCZ70
2.2U_0402_10V6M
1 2
PCZ69
22U_0603_6.3V6M
PCZ69
22U_0603_6.3V6M
1 2
PCZ67
22U_0603_6.3V6M
PCZ67
22U_0603_6.3V6M
1 2
PCZ61
22U_0603_6.3V6M
PCZ61
22U_0603_6.3V6M
1 2
PCZ68
22U_0603_6.3V6M
PCZ68
22U_0603_6.3V6M
1 2
PCZ56
22U_0603_6.3V6M
@
PCZ56
22U_0603_6.3V6M
@
1 2
PCZ66
22U_0603_6.3V6M
PCZ66
22U_0603_6.3V6M
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
BDW-U 15W 220uF × 1 22uF × 7 2.2uF × 1
+VCC_CORE
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
52
0.1
PROCESSOR DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
52
0.1
PROCESSOR DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
52
0.1
PROCESSOR DECOUPLING
Saturday, January 31, 2015
PCZ60
22U_0603_6.3V6M
@ PCZ60
22U_0603_6.3V6M
@
1 2
PCZ59
22U_0603_6.3V6M
@ PCZ59
22U_0603_6.3V6M
@
1 2
PCZ57
22U_0603_6.3V6M
@
PCZ57
22U_0603_6.3V6M
@
1 2
PCZ62
22U_0603_6.3V6M
PCZ62
22U_0603_6.3V6M
1 2
PCZ58
22U_0603_6.3V6M
@ PCZ58
22U_0603_6.3V6M
@
1 2
PCZ64
22U_0603_6.3V6M
PCZ64
22U_0603_6.3V6M
1 2
+
PCZ42 220U_D2 SX_2VY_R9M
+
PCZ42 220U_D2 SX_2VY_R9M
1 2
PCZ70
2.2U_0402_10V6M
PCZ70
2.2U_0402_10V6M
1 2
PCZ69
22U_0603_6.3V6M
PCZ69
22U_0603_6.3V6M
1 2
PCZ67
22U_0603_6.3V6M
PCZ67
22U_0603_6.3V6M
1 2
PCZ61
22U_0603_6.3V6M
PCZ61
22U_0603_6.3V6M
1 2
PCZ68
22U_0603_6.3V6M
PCZ68
22U_0603_6.3V6M
1 2
PCZ56
22U_0603_6.3V6M
@
PCZ56
22U_0603_6.3V6M
@
1 2
PCZ66
22U_0603_6.3V6M
PCZ66
22U_0603_6.3V6M
1 2
A A
B B
C C
D D
1
1
2
2
3
3
4
4
LA-8551P
FB = 0.6V
The current limit is set to 6A, 8A or 12A when this
pin
is pull low, floating or pull high
EN pin don't floating If have pull down resistor at HW side, pls delete P
R702
Pin 7 BYP is for CS. Common NB can delete +3VALW and PC15
Module model information SYX196D_V3.mdd
Rup
Rdown
Vout=0.6V* (1+Rup/Rdown) Vout=1.5VVFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Rup Rdown
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
Imax= 2A, Ipeak= 3A FB=0.6V
FB_1.5VGA
SNUB_1.5VGA
VIN_1.5VGA
SUSP#
LX_1.5VGAEN_1.5VGA
ILMT_1.5VGA
ILMT_1.5VGA
3VLDO_1.5VGA
BST_1.5VGA_R
BST_1.5VGA
FB_1.5V
IN_1.5V
LX_1.5V
EN_1.5V
SNUB_1.5V
SUSP#
<24,25,49,50>
+3VALW
+19.5VB
+1.5V_VGAP
3VLDO_1.5VGA
+1.5V_VGAP
+1.5VS
+1.5VSP
+1.5VS
+1.5VSP
+3VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
53
0.1
+1.5VS
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
53
0.1
+1.5VS
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
53
0.1
+1.5VS
Saturday, January 31, 2015
PC95
68P_0402_50V8J
UMA@PC95
68P_0402_50V8J
UMA@
1 2
PR98
1M_0402_1%
DIS@PR98
1M_0402_1%
DIS@
1 2
PR97
0_0402_5%
DIS@
PR97
0_0402_5%
DIS@
1
2
PR93
4.7_0603_5% @UMAEMI@
PR93
4.7_0603_5% @UMAEMI@
1 2
PC96
22U_0603_6.3V6M
UMA@PC96
22U_0603_6.3V6M
UMA@
1 2
PJP8
JUMP_43X79
@
PJP8
JUMP_43X79
@
1
1
2
2
PC109
22U_0603_6.3V6M
DIS@PC109
22U_0603_6.3V6M
DIS@
1 2
PU6
SY8032ABC_SOT23-6 UMA@
PU6
SY8032ABC_SOT23-6 UMA@
IN
4
PG
5
LX
3
FB
6
EN
1
GND
2
PL15
1UH_2.8A_30%_4X4X2_F UMA@
PL15
1UH_2.8A_30%_4X4X2_F UMA@
1
2
PC102
2200P_0402_50V7K
@DISEMI@PC102
2200P_0402_50V7K
@DISEMI@
1 2
PC104
10U_0805_25V6K
DIS@PC104
10U_0805_25V6K
DIS@
1 2
PC99
680P_0402_50V7K @UMAEMI@
PC99
680P_0402_50V7K @UMAEMI@
1 2
PU7
SYX196DQNC_QFN10_3X3DIS@
PU7
SYX196DQNC_QFN10_3X3DIS@
IN
8
BYP
7
PG
2
ILMT
3
LX
10
FB
4
LDO
5
GND
9
EN
1
BS
6
PJP9
JUMP_43X79@
PJP9
JUMP_43X79@
1
1
2
2
PC106
330P_0402_50V7K
DIS@PC106
330P_0402_50V7K
DIS@
1 2
PL16
HCB2012KF-121T50_0805 DISEMI@
PL16
HCB2012KF-121T50_0805 DISEMI@
1
2
PL17
1UH_11A_20%_7X7X3_M DIS@
PL17
1UH_11A_20%_7X7X3_M DIS@
1
2
PR104 0_0402_5% DIS@ PR104 0_0402_5% DIS@
1 2
PR105
20K_0402_1%
DIS@PR105
20K_0402_1%
DIS@
1 2
PR92
15K_0402_1% UMA@
PR92
15K_0402_1% UMA@
1 2
PC100
0.22U_0402_10V6K
@DIS@PC100
0.22U_0402_10V6K
@DIS@
1 2
PR94
0_0402_5%
UMA@
PR94
0_0402_5%
UMA@
1
2
PC97
22U_0603_6.3V6M
UMA@PC97
22U_0603_6.3V6M
UMA@
1 2
PR101
0_0402_5% @DIS@
PR101
0_0402_5% @DIS@
1 2
PJP10
JUMP_43X118
@
PJP10
JUMP_43X118
@
1
1
2
2
PC111
4.7U_0603_6.3V6K
DIS@PC111
4.7U_0603_6.3V6K
DIS@
1 2
PR96
10K_0402_1% UMA@
PR96
10K_0402_1% UMA@
1 2
PC103
0.1U_0603_25V7K
DIS@
PC103
0.1U_0603_25V7K
DIS@
1
2
PC107
22U_0603_6.3V6M
DIS@PC107
22U_0603_6.3V6M
DIS@
1 2
PR99
4.7_1206_5%
@DISEMI@
PR99
4.7_1206_5%
@DISEMI@
1
2
PC110
22U_0603_6.3V6M
DIS@PC110
22U_0603_6.3V6M
DIS@
1 2
PR102
30K_0402_1%
DIS@PR102
30K_0402_1%
DIS@
1 2
PC101
680P_0603_50V7K
@DISEMI@
PC101
680P_0603_50V7K
@DISEMI@
1
2
PC98
0.1U_0402_16V7K
@UMA@PC98
0.1U_0402_16V7K
@UMA@
1 2
PR95
1M_0402_1%
UMA@PR95
1M_0402_1%
UMA@
1 2
PC105
10U_0805_25V6K
DIS@PC105
10U_0805_25V6K
DIS@
1 2
PC112
4.7U_0603_6.3V6K
DIS@PC112
4.7U_0603_6.3V6K
DIS@
1 2
PC94
22U_0603_6.3V6M
UMA@
PC94
22U_0603_6.3V6M
UMA@
1
2
PC108
22U_0603_6.3V6M
DIS@PC108
22U_0603_6.3V6M
DIS@
1 2
PR100
0_0603_5%
DIS@
PR100
0_0603_5%
DIS@ 1
2
B B
C C
D D
1
1
2
2
3
3
4
4
LA-8551P
FB = 0.6V
The current limit is set to 6A, 8A or 12A when this
pin
is pull low, floating or pull high
EN pin don't floating If have pull down resistor at HW side, pls delete P
R702
Pin 7 BYP is for CS. Common NB can delete +3VALW and PC15
Module model information SYX196D_V3.mdd
Rup
Rdown
Vout=0.6V* (1+Rup/Rdown) Vout=1.5VVFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Rup Rdown
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
Imax= 2A, Ipeak= 3A FB=0.6V
FB_1.5VGA
SNUB_1.5VGA
VIN_1.5VGA
SUSP#
LX_1.5VGAEN_1.5VGA
ILMT_1.5VGA
ILMT_1.5VGA
3VLDO_1.5VGA
BST_1.5VGA_R
BST_1.5VGA
FB_1.5V
IN_1.5V
LX_1.5V
EN_1.5V
SNUB_1.5V
SUSP#
<24,25,49,50>
+3VALW
+19.5VB
+1.5V_VGAP
3VLDO_1.5VGA
+1.5V_VGAP
+1.5VS
+1.5VSP
+1.5VS
+1.5VSP
+3VALW
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
53
0.1
+1.5VS
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
53
0.1
+1.5VS
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2013/09/09
Compal Electronics, Inc.
60
53
0.1
+1.5VS
Saturday, January 31, 2015
PC95
68P_0402_50V8J
UMA@PC95
68P_0402_50V8J
UMA@
1 2
PR98
1M_0402_1%
DIS@PR98
1M_0402_1%
DIS@
1 2
PR97
0_0402_5%
DIS@
PR97
0_0402_5%
DIS@
1
2
PR93
4.7_0603_5% @UMAEMI@
PR93
4.7_0603_5% @UMAEMI@
1 2
PC96
22U_0603_6.3V6M
UMA@PC96
22U_0603_6.3V6M
UMA@
1 2
PJP8
JUMP_43X79
@
PJP8
JUMP_43X79
@
1
1
2
2
PC109
22U_0603_6.3V6M
DIS@PC109
22U_0603_6.3V6M
DIS@
1 2
PU6
SY8032ABC_SOT23-6 UMA@
PU6
SY8032ABC_SOT23-6 UMA@
IN
4
PG
5
LX
3
FB
6
EN
1
GND
2
PL15
1UH_2.8A_30%_4X4X2_F UMA@
PL15
1UH_2.8A_30%_4X4X2_F UMA@
1
2
PC102
2200P_0402_50V7K
@DISEMI@PC102
2200P_0402_50V7K
@DISEMI@
1 2
PC104
10U_0805_25V6K
DIS@PC104
10U_0805_25V6K
DIS@
1 2
PC99
680P_0402_50V7K @UMAEMI@
PC99
680P_0402_50V7K @UMAEMI@
1 2
PU7
SYX196DQNC_QFN10_3X3DIS@
PU7
SYX196DQNC_QFN10_3X3DIS@
IN
8
BYP
7
PG
2
ILMT
3
LX
10
FB
4
LDO
5
GND
9
EN
1
BS
6
PJP9
JUMP_43X79@
PJP9
JUMP_43X79@
1
1
2
2
PC106
330P_0402_50V7K
DIS@PC106
330P_0402_50V7K
DIS@
1 2
PL16
HCB2012KF-121T50_0805 DISEMI@
PL16
HCB2012KF-121T50_0805 DISEMI@
1
2
PL17
1UH_11A_20%_7X7X3_M DIS@
PL17
1UH_11A_20%_7X7X3_M DIS@
1
2
PR104 0_0402_5% DIS@ PR104 0_0402_5% DIS@
1 2
PR105
20K_0402_1%
DIS@PR105
20K_0402_1%
DIS@
1 2
PR92
15K_0402_1% UMA@
PR92
15K_0402_1% UMA@
1 2
PC100
0.22U_0402_10V6K
@DIS@PC100
0.22U_0402_10V6K
@DIS@
1 2
PR94
0_0402_5%
UMA@
PR94
0_0402_5%
UMA@
1
2
PC97
22U_0603_6.3V6M
UMA@PC97
22U_0603_6.3V6M
UMA@
1 2
PR101
0_0402_5% @DIS@
PR101
0_0402_5% @DIS@
1 2
PJP10
JUMP_43X118
@
PJP10
JUMP_43X118
@
1
1
2
2
PC111
4.7U_0603_6.3V6K
DIS@PC111
4.7U_0603_6.3V6K
DIS@
1 2
PR96
10K_0402_1% UMA@
PR96
10K_0402_1% UMA@
1 2
PC103
0.1U_0603_25V7K
DIS@
PC103
0.1U_0603_25V7K
DIS@
1
2
PC107
22U_0603_6.3V6M
DIS@PC107
22U_0603_6.3V6M
DIS@
1 2
PR99
4.7_1206_5%
@DISEMI@
PR99
4.7_1206_5%
@DISEMI@
1
2
PC110
22U_0603_6.3V6M
DIS@PC110
22U_0603_6.3V6M
DIS@
1 2
PR102
30K_0402_1%
DIS@PR102
30K_0402_1%
DIS@
1 2
PC101
680P_0603_50V7K
@DISEMI@
PC101
680P_0603_50V7K
@DISEMI@
1
2
PC98
0.1U_0402_16V7K
@UMA@PC98
0.1U_0402_16V7K
@UMA@
1 2
PR95
1M_0402_1%
UMA@PR95
1M_0402_1%
UMA@
1 2
PC105
10U_0805_25V6K
DIS@PC105
10U_0805_25V6K
DIS@
1 2
PC112
4.7U_0603_6.3V6K
DIS@PC112
4.7U_0603_6.3V6K
DIS@
1 2
PC94
22U_0603_6.3V6M
UMA@
PC94
22U_0603_6.3V6M
UMA@
1
2
PC108
22U_0603_6.3V6M
DIS@PC108
22U_0603_6.3V6M
DIS@
1 2
PR100
0_0603_5%
DIS@
PR100
0_0603_5%
DIS@ 1
2
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Layout Note: PH802 should place near Phase1 Choke
1.150V
GPIO21 VID5
0
1
1
1
0
1 1 1 1 1 1 1 1 1 1 1
0
1
GPIO15
0
0
1
VID4
0
1
VID3
0
0
1
0
0
VID2
0
0
1
VID1
0
0
1
VDDC
0
0
1
0
1.100V
0
11
0
0 1
1.025V
1
1
1.000V
Vboot(merge)
0
0.975V
0 1 1
0.950V
0
1
0.925V
0
1
0.900V
0
1
0.875V
0
1
GPIO29
0.850V
0
GPIO30
0.825V
1
GPIO20
Module model information: ISL62883C_V1A for IC ISL62883C_V1B for SW Choke/MOS on BTN ISL62883C_V2B for SW Choke on BTN, MOS on TOP
MARS XTX
L-side MOS:UDU1511 Rds(on): 2.4mohm@Vgs=10V 2.7~3.3mohm@Vgs=4.5V Id :24A@Ta=25 degCH-side MOS:MDU1516 Rds(on): 9mohm@Vgs=10V 7.8~9mohm@Vgs=4.5V Id :11A@Ta=25 degC Choke: 0.22uH (Size:7*7*4) Rdc=0.98mohm +-5% Heat Rating Current=28A Saturation Current=28A
Ri
Rdroop
Layout Note: PH801 should place near phase1 H-side MOS
Rfset
Rbias
0.775~1.175V 32A (TDC)
MARS XT
0.775~1.125V 25A (TDC)
MARS PRO 0.775~1.050V 0.775~1.000V 21A (TDC) 17A (TDC)
MARS LP
TDCVDDCGPU EDC
48A 37.5A 31.5A 26A
AMD MARS series
OCP
57.6A 45A 37.8A 0.85V
Vboot
0.85V 0.85V 0.85V
0.775~1.125V 16A (TDC) 25A (TDC)
24AAMD SUN series 28.8A 45A
SUN PRO 0.800~1.075V 19A (TDC)
28.5A 37.5A 34.2A
0.9V
1.050V
Cn
Rp Rntcs
Rntc
Rsum
Ro
LP: DDR3 Pro/XT/XTX: GDDR5
SUN UL SUN XT
0.800~1.150V
UL: DDR3 Pro/XT/XTX: GDDR5
31.2A
5. Switching frequency set : Rfset(kohm)=[period(us)-0.29]*2.65 =5.9Kohm fsw=1/period(us)=400KHZ
Transient response : Rntcnet=(Rntcs+Rntc)*Rp/(Rntcs+Rntc+Rp) Cn=L*(Rntcnet+Rsum/N)/[Rntcnet*DCR*(Rsum/N)] N is the number of phases Rdroop=Io*LL/Idroop
4. Thermal throttling: Protect: (6.98K+Rth)*60uA=1.2V => Rth=13.02K =>Tp=110C (+-3C) Recovery:(6.98K+Rth)*56uA=1.24V => Rth=15.16K => Tr=105C (+-3C)
PR837=6.98K
protect T 110C +-3 Recovery T 105C +-3
PR837=1.5K
protect T 100C +-3 Recovery T 96C +-3
3. Rbias=147K =>overshoot reduction function disabl
e
Rbias=47k =>overshoot reduction function enab
le
1. PW M3 (Pin24) tie to 5V & CLK# (Pin40) external p
ull high
=> 2 phase CPU VR config PW M3 (Pin24) tie to 5V & CLK# (Pin40) tie to
GND or floating
=> 2 phase GPU VR config 2. W hen 2 Phase GPU config a. DPSLPVR (Pin39)=0 PSI# (Pin2)=0 =>1 phase CCM operation mode b. DPSLPVR (Pin39)=0 PSI# (Pin2)=1 =>2 phase CCM operation mode c. DPSLPVR (Pin39)=1 PSI# (Pin2)=0 or 1 =>1 phase DE operation mode Remark:
Rth
0.9V 0.9V
Ri PR860 Rdroop PR842
1.13K Ohm 887 Ohm 750 Ohm
887 Ohm
1.43K Ohm 1.13K Ohm 953 Ohm
1.13K Ohm
Load line
1mohm 1mohm 1mohm
1mohm
Vboot regulation
TDC 28A Peak Current = 37.5A OCP Current = 45A Load line=1.1mohm
for OCP and LoadLine Setting for LoadLine Setting
PR844 PR847
187K Ohm 147K Ohm 124K Ohm
147K Ohm
51.1K Ohm 51.1K Ohm 51.1K Ohm
51.1K Ohm
for Compensation for Positive offset
--------- --------- --------- --------- ---------
--------- --------- --------- --------- ---------
--------- --------- --------- --------- ---------
Description
NA NA NA NA NA NA NA
Remark: MARS LP/ SUN UL/ SUN PRO don't use this 2-phase solution
PR813 Pop: for Loadline disable PR813 @: for Loadline enable and LL=1mohm
for positive offset
20150129 unpop PC801 for lose dGPU issue
BOOT1_1_VGA
FB1_VGA
SNUB1_VGA
VSEN_VGA
PHASE2_VGA
FB2_VGA
VW _VGA
BOOT2_VGA
COMP_VGA
FB_VGA
NTC_VGA
RTN_VGA
VDD_VGA
IS E N 3 _ V GA
ISUM-_VGA
RBIAS_VGA
UGATE2_VGA
VIN_VGA
BOOT1_VGA
SNUB2_VGA
LGATE1_VGA
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID4
GPU_VID4
UGATE1_VGA
PSI#_VGA
DPRSLPVR_VGA-1
GPU_VID6
VRON_VGA
LGATE2_VGA
BOOT2_2_VGA
PHASE1_VGA
GPU_VID5
GPU_VID5
GPU_PW RGD
<36>
GPU_VID1
<36>
GPU_VID2
<36>
GPU_VID3
<36>
GPU_VID4
<36>
DGPU_PW R_EN
<25,37,8,9>
GPU_VID5
<36>
GPU_HOT#
<25>
+VGA_B+
+19.5VB
+VGA_B+
+5VS
+3VS_VGA
+5VS+VGA_B+
+3VS_VGA
+VGA_CORE+VGA_CORE
+VGA_CORE
VSUM-_VGA
VSUM-_VGA
VSUM-_VGA
IS E N 2 _ V GA
IS E N 2 _ V GA
IS E N 1 _ V GA
IS E N 1 _ V GA
VSUM+_VGAVSUM+_VGA
VSUM+_VGA
VSUM-_VGA
+3VS_VGA
+5VS
IS E N 1 _ V GA IS E N 2 _ V GA
+3VS_VGA
Ti t l e Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
ISL62883C
54 60
Saturday, January 31, 2015
2013/01/03
2013/01/03
Compal Electronics, Inc.
Ti t l e Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
ISL62883C
54 60
Saturday, January 31, 2015
2013/01/03
2013/01/03
Compal Electronics, Inc.
Ti t l e Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
ISL62883C
54 60
Saturday, January 31, 2015
2013/01/03
2013/01/03
Compal Electronics, Inc.
PL810
5A_Z120_25M_0805_2P DISEMI@
PL810
5A_Z120_25M_0805_2P DISEMI@
1
2
PR805 10K_0402_1% @DIS@PR805 10K_0402_1% @DIS@
1 2
PC825
0.22U_0402_16V7K
DIS@PC825
0.22U_0402_16V7K
DIS@
1 2
PC832
0.22U_0603_25V7K DIS@
PC832
0.22U_0603_25V7K DIS@
1
2
PC826
1U_0603_10V6K
DIS@PC826
1U_0603_10V6K
DIS@
1 2
PC806
0.22U_0603_25V7K DIS@
PC806
0.22U_0603_25V7K DIS@ 1
2
PC816
1000P_0402_50V7K
DIS@PC816
1000P_0402_50V7K
DIS@
1 2
PC835
0.033U_0402_16V7K
DIS@PC835
0.033U_0402_16V7K
DIS@
1 2
PR846
1_0402_5%
DIS@
PR846
1_0402_5%
DIS@
1
2
PC833
1000P_0402_50V7K
DIS@
PC833
1000P_0402_50V7K
DIS@
1 2
PR857
11K_0402_1%
DIS@PR857
11K_0402_1%
DIS@
1 2
PR849 0_0402_5%
@DIS@
PR849 0_0402_5%
@DIS@
1
2
PC804
10U_0805_25V6K
DIS@PC804
10U_0805_25V6K
DIS@
1 2
PQ806
MDU1511RH_POWERDFN56-8-5
DIS@PQ806
MDU1511RH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PH802
10K_0402_1%_B25/50 3370K
DIS@PH802
10K_0402_1%_B25/50 3370K
DIS@
1 2
PC838
1000P_0402_50V7K
DIS@
PC838
1000P_0402_50V7K
DIS@
1 2
PR842
2.49K_0402_1% DIS@
PR842
2.49K_0402_1% DIS@ 1
2
PR809 10K_0402_1% DIS@PR809 10K_0402_1% DIS@
1 2
PR863
0_0603_5%
DIS@
PR863
0_0603_5%
DIS@
1
2
PR851
2.61K_0402_1%
@DIS@PR851
2.61K_0402_1%
@DIS@
1 2
PQ805
MDU1511RH_POWERDFN56-8-5
DIS@PQ805
MDU1511RH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PR803 10K_0402_1% @DIS@PR803 10K_0402_1% @DIS@
1 2
PR819
10K_0402_1% DIS@
PR819
10K_0402_1% DIS@
1
2
PR828
3.65K_0402_1%
DIS@PR828
3.65K_0402_1%
DIS@
1 2
PR835
100K_0402_5% DIS@
PR835
100K_0402_5% DIS@ 1
2
PR813
10K_0402_1%
DIS@
PR813
10K_0402_1%
DIS@
1
2
PR833
100K_0402_5% DIS@
PR833
100K_0402_5% DIS@1
2
PC801
.1U_0402_16V7K
@DIS@PC801
.1U_0402_16V7K
@DIS@
1 2
PR855
10K_0402_1%
DIS@PR855
10K_0402_1%
DIS@
1 2
PC842
.1U_0402_16V7K DIS@
PC842
.1U_0402_16V7K DIS@
1 2
PR830
1_0402_1%
DIS@PR830
1_0402_1%
DIS@
1 2
PR840
499_0402_1% DIS@
PR840
499_0402_1% DIS@
1
2
PR848
10_0402_1% DIS@
PR848
10_0402_1% DIS@1
2
PR856
1_0402_1%
DIS@PR856
1_0402_1%
DIS@
1 2
PR827
4.7_1206_5%
@DISEMI@PR827
4.7_1206_5%
@DISEMI@
1 2
PR810 10K_0402_1% DIS@PR810 10K_0402_1% DIS@
1 2
PR829
10K_0402_1%
DIS@PR829
10K_0402_1%
DIS@
1 2
PC824
0.22U_0402_16V7K
DIS@PC824
0.22U_0402_16V7K
DIS@
1 2
PR806 10K_0402_1% DIS@PR806 10K_0402_1% DIS@
1 2
PR853
4.7_1206_5%
@DISEMI@PR853
4.7_1206_5%
@DISEMI@
1 2
PR812 10K_0402_1% @DIS@PR812 10K_0402_1% @DIS@
1 2
PR847
51.1K_0402_1%
DIS@PR847
51.1K_0402_1%
DIS@
1 2
PC831
10U_0805_25V6K
DIS@PC831
10U_0805_25V6K
DIS@
1 2
PR859
10_0402_1% DIS@
PR859
10_0402_1% DIS@1
2
PC814
22P_0402_50V8J DIS@
PC814
22P_0402_50V8J DIS@
1
2
PC815
1U_0603_10V6K
DIS@PC815
1U_0603_10V6K
DIS@
1 2
PC821
220P_0402_50V7K DIS@
PC821
220P_0402_50V7K DIS@
1
2
PU801
IS L 6 2 8 8 3 C H R TZ-T_ TQFN 4 0 _ 5 X 5
DIS@ PU801
IS L 6 2 8 8 3 C H R TZ-T_ TQFN 4 0 _ 5 X 5
DIS@
PGOOD
1
PSI#
2
RBIAS
3
VR_TT#
4
NTC
5
VW
6
COMP
7
FB
8
VIN
17
ISEN1
11
VSEN
12
RTN
13
ISUM-
14
ISUM+
15
VDD
16
VSSP1
22
LGATE1
23
PWM3
24
VCCP
25
LGATE2
26
VSSP2
27
PHASE2
28
UGATE2
29
VID0
31
VID1
32
VID2
33
VID3
34
VID5
36
VID6
37
VR_ON
38
ISEN3
9
ISEN2
10
IMON
18
BOOT1
19
UGATE1
20
AGND
41
PHASE1
21
BOOT2
30
DPRSLPVR
39
CLK_EN#
40
VID4
35
PC811
1U_0603_10V6K
DIS@PC811
1U_0603_10V6K
DIS@
1 2
PR844
147K_0402_1% DIS@
PR844
147K_0402_1% DIS@
1
2
PC841
680P_0603_50V7K
@DISEMI@PC841
680P_0603_50V7K
@DISEMI@
1 2
PR811 10K_0402_1% DIS@PR811 10K_0402_1% DIS@
1 2
PR816
0_0402_5% DIS@
PR816
0_0402_5% DIS@ 1
2
PQ804
MDU1516URH_POWERDFN56-8-5
DIS@PQ804
MDU1516URH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PR834
147K_0402_1% DIS@
PR834
147K_0402_1% DIS@
1
2
PR854
3.65K_0402_1%
DIS@PR854
3.65K_0402_1%
DIS@
1 2
PR838
10K_0402_1%
DIS@PR838
10K_0402_1%
DIS@
1 2
PC805
10U_0805_25V6K
DIS@PC805
10U_0805_25V6K
DIS@
1 2
PC839
330P_0402_50V7K
@DIS@PC839
330P_0402_50V7K
@DIS@
1 2
PR864
0_0603_5%
DIS@
PR864
0_0603_5%
DIS@
1
2
PC817
390P_0402_50V7K DIS@
PC817
390P_0402_50V7K DIS@
1
2
PL811
5A_Z120_25M_0805_2P @DISEMI@
PL811
5A_Z120_25M_0805_2P @DISEMI@
1
2
PR802 10K_0402_1% DIS@PR802 10K_0402_1% DIS@
1 2
PC803
2200P_0402_50V7K
DISEMI@PC803
2200P_0402_50V7K
DISEMI@
1 2
PC827
0.22U_0603_25V7K
DIS@PC827
0.22U_0603_25V7K
DIS@
1 2
PC802
0.1U_0402_25V6
@DISEMI@PC802
0.1U_0402_25V6
@DISEMI@
1 2
PR804 10K_0402_1% @DIS@PR804 10K_0402_1% @DIS@
1 2
PR850
2.2_0603_5%
DIS@
PR850
2.2_0603_5%
DIS@
1
2
PC830
10U_0805_25V6K
DIS@PC830
10U_0805_25V6K
DIS@
1 2
PC810
680P_0603_50V7K
@DISEMI@PC810
680P_0603_50V7K
@DISEMI@
1 2
PL802
0.22UH_PCME064T-R22MS_28A_20%
DIS@
PL802
0.22UH_PCME064T-R22MS_28A_20%
DIS@
1
34
2
PR839
5.9K_0402_1%
DIS@PR839
5.9K_0402_1%
DIS@
1 2
PQ801
MDU1516URH_POWERDFN56-8-5
DIS@PQ801
MDU1516URH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PR808 10K_0402_1% @DIS@PR808 10K_0402_1% @DIS@
1 2
PL803
0.22UH_PCME064T-R22MS_28A_20%
DIS@
PL803
0.22UH_PCME064T-R22MS_28A_20%
DIS@
1
34
2
PR837
6.98K_0402_1% DIS@
PR837
6.98K_0402_1% DIS@
1
2
PC822
150P_0402_50V8J
DIS@
PC822
150P_0402_50V8J
DIS@
1
2
PR860
1K_0402_1% DIS@
PR860
1K_0402_1% DIS@ 1
2
PC834
0.15U_0603_16V7K
DIS@PC834
0.15U_0603_16V7K
DIS@
1 2
PR858
10K_0402_1%
DIS@PR858
10K_0402_1%
DIS@
1 2
PR831
1.91K_0402_1% @DIS@
PR831
1.91K_0402_1% @DIS@1
2
PR817
2.2_0603_5% DIS@
PR817
2.2_0603_5% DIS@
1
2
PH801
470K_0402_5%_B25/50 4700K DIS@
PH801
470K_0402_5%_B25/50 4700K DIS@
1
2
B B
C C
D D
E E
1
1
2
2
3
3
4
4
Layout Note: PH802 should place near Phase1 Choke
1.150V
GPIO21 VID5
0
1
1
1
0
1 1 1 1 1 1 1 1 1 1 1
0
1
GPIO15
0
0
1
VID4
0
1
VID3
0
0
1
0
0
VID2
0
0
1
VID1
0
0
1
VDDC
0
0
1
0
1.100V
0
11
0
0 1
1.025V
1
1
1.000V
Vboot(merge)
0
0.975V
0 1 1
0.950V
0
1
0.925V
0
1
0.900V
0
1
0.875V
0
1
GPIO29
0.850V
0
GPIO30
0.825V
1
GPIO20
Module model information: ISL62883C_V1A for IC ISL62883C_V1B for SW Choke/MOS on BTN ISL62883C_V2B for SW Choke on BTN, MOS on TOP
MARS XTX
L-side MOS:UDU1511 Rds(on): 2.4mohm@Vgs=10V 2.7~3.3mohm@Vgs=4.5V Id :24A@Ta=25 degCH-side MOS:MDU1516 Rds(on): 9mohm@Vgs=10V 7.8~9mohm@Vgs=4.5V Id :11A@Ta=25 degC Choke: 0.22uH (Size:7*7*4) Rdc=0.98mohm +-5% Heat Rating Current=28A Saturation Current=28A
Ri
Rdroop
Layout Note: PH801 should place near phase1 H-side MOS
Rfset
Rbias
0.775~1.175V 32A (TDC)
MARS XT
0.775~1.125V 25A (TDC)
MARS PRO 0.775~1.050V 0.775~1.000V 21A (TDC) 17A (TDC)
MARS LP
TDCVDDCGPU EDC
48A 37.5A 31.5A 26A
AMD MARS series
OCP
57.6A 45A 37.8A 0.85V
Vboot
0.85V 0.85V 0.85V
0.775~1.125V 16A (TDC) 25A (TDC)
24AAMD SUN series 28.8A 45A
SUN PRO 0.800~1.075V 19A (TDC)
28.5A 37.5A 34.2A
0.9V
1.050V
Cn
Rp Rntcs
Rntc
Rsum
Ro
LP: DDR3 Pro/XT/XTX: GDDR5
SUN UL SUN XT
0.800~1.150V
UL: DDR3 Pro/XT/XTX: GDDR5
31.2A
5. Switching frequency set : Rfset(kohm)=[period(us)-0.29]*2.65 =5.9Kohm fsw=1/period(us)=400KHZ
Transient response : Rntcnet=(Rntcs+Rntc)*Rp/(Rntcs+Rntc+Rp) Cn=L*(Rntcnet+Rsum/N)/[Rntcnet*DCR*(Rsum/N)] N is the number of phases Rdroop=Io*LL/Idroop
4. Thermal throttling: Protect: (6.98K+Rth)*60uA=1.2V => Rth=13.02K =>Tp=110C (+-3C) Recovery:(6.98K+Rth)*56uA=1.24V => Rth=15.16K => Tr=105C (+-3C)
PR837=6.98K
protect T 110C +-3 Recovery T 105C +-3
PR837=1.5K
protect T 100C +-3 Recovery T 96C +-3
3. Rbias=147K =>overshoot reduction function disabl
e
Rbias=47k =>overshoot reduction function enab
le
1. PW M3 (Pin24) tie to 5V & CLK# (Pin40) external p
ull high
=> 2 phase CPU VR config PW M3 (Pin24) tie to 5V & CLK# (Pin40) tie to
GND or floating
=> 2 phase GPU VR config 2. W hen 2 Phase GPU config a. DPSLPVR (Pin39)=0 PSI# (Pin2)=0 =>1 phase CCM operation mode b. DPSLPVR (Pin39)=0 PSI# (Pin2)=1 =>2 phase CCM operation mode c. DPSLPVR (Pin39)=1 PSI# (Pin2)=0 or 1 =>1 phase DE operation mode Remark:
Rth
0.9V 0.9V
Ri PR860 Rdroop PR842
1.13K Ohm 887 Ohm 750 Ohm
887 Ohm
1.43K Ohm 1.13K Ohm 953 Ohm
1.13K Ohm
Load line
1mohm 1mohm 1mohm
1mohm
Vboot regulation
TDC 28A Peak Current = 37.5A OCP Current = 45A Load line=1.1mohm
for OCP and LoadLine Setting for LoadLine Setting
PR844 PR847
187K Ohm 147K Ohm 124K Ohm
147K Ohm
51.1K Ohm 51.1K Ohm 51.1K Ohm
51.1K Ohm
for Compensation for Positive offset
--------- --------- --------- --------- ---------
--------- --------- --------- --------- ---------
--------- --------- --------- --------- ---------
Description
NA NA NA NA NA NA NA
Remark: MARS LP/ SUN UL/ SUN PRO don't use this 2-phase solution
PR813 Pop: for Loadline disable PR813 @: for Loadline enable and LL=1mohm
for positive offset
20150129 unpop PC801 for lose dGPU issue
BOOT1_1_VGA
FB1_VGA
SNUB1_VGA
VSEN_VGA
PHASE2_VGA
FB2_VGA
VW _VGA
BOOT2_VGA
COMP_VGA
FB_VGA
NTC_VGA
RTN_VGA
VDD_VGA
IS E N 3 _ V GA
ISUM-_VGA
RBIAS_VGA
UGATE2_VGA
VIN_VGA
BOOT1_VGA
SNUB2_VGA
LGATE1_VGA
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID4
GPU_VID4
UGATE1_VGA
PSI#_VGA
DPRSLPVR_VGA-1
GPU_VID6
VRON_VGA
LGATE2_VGA
BOOT2_2_VGA
PHASE1_VGA
GPU_VID5
GPU_VID5
GPU_PW RGD
<36>
GPU_VID1
<36>
GPU_VID2
<36>
GPU_VID3
<36>
GPU_VID4
<36>
DGPU_PW R_EN
<25,37,8,9>
GPU_VID5
<36>
GPU_HOT#
<25>
+VGA_B+
+19.5VB
+VGA_B+
+5VS
+3VS_VGA
+5VS+VGA_B+
+3VS_VGA
+VGA_CORE+VGA_CORE
+VGA_CORE
VSUM-_VGA
VSUM-_VGA
VSUM-_VGA
IS E N 2 _ V GA
IS E N 2 _ V GA
IS E N 1 _ V GA
IS E N 1 _ V GA
VSUM+_VGAVSUM+_VGA
VSUM+_VGA
VSUM-_VGA
+3VS_VGA
+5VS
IS E N 1 _ V GA IS E N 2 _ V GA
+3VS_VGA
Ti t l e Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
ISL62883C
54 60
Saturday, January 31, 2015
2013/01/03
2013/01/03
Compal Electronics, Inc.
Ti t l e Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
ISL62883C
54 60
Saturday, January 31, 2015
2013/01/03
2013/01/03
Compal Electronics, Inc.
Ti t l e Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
ISL62883C
54 60
Saturday, January 31, 2015
2013/01/03
2013/01/03
Compal Electronics, Inc.
PL810
5A_Z120_25M_0805_2P DISEMI@
PL810
5A_Z120_25M_0805_2P DISEMI@
1
2
PR805 10K_0402_1% @DIS@PR805 10K_0402_1% @DIS@
1 2
PC825
0.22U_0402_16V7K
DIS@PC825
0.22U_0402_16V7K
DIS@
1 2
PC832
0.22U_0603_25V7K DIS@
PC832
0.22U_0603_25V7K DIS@
1
2
PC826
1U_0603_10V6K
DIS@PC826
1U_0603_10V6K
DIS@
1 2
PC806
0.22U_0603_25V7K DIS@
PC806
0.22U_0603_25V7K DIS@ 1
2
PC816
1000P_0402_50V7K
DIS@PC816
1000P_0402_50V7K
DIS@
1 2
PC835
0.033U_0402_16V7K
DIS@PC835
0.033U_0402_16V7K
DIS@
1 2
PR846
1_0402_5%
DIS@
PR846
1_0402_5%
DIS@
1
2
PC833
1000P_0402_50V7K
DIS@
PC833
1000P_0402_50V7K
DIS@
1 2
PR857
11K_0402_1%
DIS@PR857
11K_0402_1%
DIS@
1 2
PR849 0_0402_5%
@DIS@
PR849 0_0402_5%
@DIS@
1
2
PC804
10U_0805_25V6K
DIS@PC804
10U_0805_25V6K
DIS@
1 2
PQ806
MDU1511RH_POWERDFN56-8-5
DIS@PQ806
MDU1511RH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PH802
10K_0402_1%_B25/50 3370K
DIS@PH802
10K_0402_1%_B25/50 3370K
DIS@
1 2
PC838
1000P_0402_50V7K
DIS@
PC838
1000P_0402_50V7K
DIS@
1 2
PR842
2.49K_0402_1% DIS@
PR842
2.49K_0402_1% DIS@ 1
2
PR809 10K_0402_1% DIS@PR809 10K_0402_1% DIS@
1 2
PR863
0_0603_5%
DIS@
PR863
0_0603_5%
DIS@
1
2
PR851
2.61K_0402_1%
@DIS@PR851
2.61K_0402_1%
@DIS@
1 2
PQ805
MDU1511RH_POWERDFN56-8-5
DIS@PQ805
MDU1511RH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PR803 10K_0402_1% @DIS@PR803 10K_0402_1% @DIS@
1 2
PR819
10K_0402_1% DIS@
PR819
10K_0402_1% DIS@
1
2
PR828
3.65K_0402_1%
DIS@PR828
3.65K_0402_1%
DIS@
1 2
PR835
100K_0402_5% DIS@
PR835
100K_0402_5% DIS@ 1
2
PR813
10K_0402_1%
DIS@
PR813
10K_0402_1%
DIS@
1
2
PR833
100K_0402_5% DIS@
PR833
100K_0402_5% DIS@1
2
PC801
.1U_0402_16V7K
@DIS@PC801
.1U_0402_16V7K
@DIS@
1 2
PR855
10K_0402_1%
DIS@PR855
10K_0402_1%
DIS@
1 2
PC842
.1U_0402_16V7K DIS@
PC842
.1U_0402_16V7K DIS@
1 2
PR830
1_0402_1%
DIS@PR830
1_0402_1%
DIS@
1 2
PR840
499_0402_1% DIS@
PR840
499_0402_1% DIS@
1
2
PR848
10_0402_1% DIS@
PR848
10_0402_1% DIS@1
2
PR856
1_0402_1%
DIS@PR856
1_0402_1%
DIS@
1 2
PR827
4.7_1206_5%
@DISEMI@PR827
4.7_1206_5%
@DISEMI@
1 2
PR810 10K_0402_1% DIS@PR810 10K_0402_1% DIS@
1 2
PR829
10K_0402_1%
DIS@PR829
10K_0402_1%
DIS@
1 2
PC824
0.22U_0402_16V7K
DIS@PC824
0.22U_0402_16V7K
DIS@
1 2
PR806 10K_0402_1% DIS@PR806 10K_0402_1% DIS@
1 2
PR853
4.7_1206_5%
@DISEMI@PR853
4.7_1206_5%
@DISEMI@
1 2
PR812 10K_0402_1% @DIS@PR812 10K_0402_1% @DIS@
1 2
PR847
51.1K_0402_1%
DIS@PR847
51.1K_0402_1%
DIS@
1 2
PC831
10U_0805_25V6K
DIS@PC831
10U_0805_25V6K
DIS@
1 2
PR859
10_0402_1% DIS@
PR859
10_0402_1% DIS@1
2
PC814
22P_0402_50V8J DIS@
PC814
22P_0402_50V8J DIS@
1
2
PC815
1U_0603_10V6K
DIS@PC815
1U_0603_10V6K
DIS@
1 2
PC821
220P_0402_50V7K DIS@
PC821
220P_0402_50V7K DIS@
1
2
PU801
IS L 6 2 8 8 3 C H R TZ-T_ TQFN 4 0 _ 5 X 5
DIS@ PU801
IS L 6 2 8 8 3 C H R TZ-T_ TQFN 4 0 _ 5 X 5
DIS@
PGOOD
1
PSI#
2
RBIAS
3
VR_TT#
4
NTC
5
VW
6
COMP
7
FB
8
VIN
17
ISEN1
11
VSEN
12
RTN
13
ISUM-
14
ISUM+
15
VDD
16
VSSP1
22
LGATE1
23
PWM3
24
VCCP
25
LGATE2
26
VSSP2
27
PHASE2
28
UGATE2
29
VID0
31
VID1
32
VID2
33
VID3
34
VID5
36
VID6
37
VR_ON
38
ISEN3
9
ISEN2
10
IMON
18
BOOT1
19
UGATE1
20
AGND
41
PHASE1
21
BOOT2
30
DPRSLPVR
39
CLK_EN#
40
VID4
35
PC811
1U_0603_10V6K
DIS@PC811
1U_0603_10V6K
DIS@
1 2
PR844
147K_0402_1% DIS@
PR844
147K_0402_1% DIS@
1
2
PC841
680P_0603_50V7K
@DISEMI@PC841
680P_0603_50V7K
@DISEMI@
1 2
PR811 10K_0402_1% DIS@PR811 10K_0402_1% DIS@
1 2
PR816
0_0402_5% DIS@
PR816
0_0402_5% DIS@ 1
2
PQ804
MDU1516URH_POWERDFN56-8-5
DIS@PQ804
MDU1516URH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PR834
147K_0402_1% DIS@
PR834
147K_0402_1% DIS@
1
2
PR854
3.65K_0402_1%
DIS@PR854
3.65K_0402_1%
DIS@
1 2
PR838
10K_0402_1%
DIS@PR838
10K_0402_1%
DIS@
1 2
PC805
10U_0805_25V6K
DIS@PC805
10U_0805_25V6K
DIS@
1 2
PC839
330P_0402_50V7K
@DIS@PC839
330P_0402_50V7K
@DIS@
1 2
PR864
0_0603_5%
DIS@
PR864
0_0603_5%
DIS@
1
2
PC817
390P_0402_50V7K DIS@
PC817
390P_0402_50V7K DIS@
1
2
PL811
5A_Z120_25M_0805_2P @DISEMI@
PL811
5A_Z120_25M_0805_2P @DISEMI@
1
2
PR802 10K_0402_1% DIS@PR802 10K_0402_1% DIS@
1 2
PC803
2200P_0402_50V7K
DISEMI@PC803
2200P_0402_50V7K
DISEMI@
1 2
PC827
0.22U_0603_25V7K
DIS@PC827
0.22U_0603_25V7K
DIS@
1 2
PC802
0.1U_0402_25V6
@DISEMI@PC802
0.1U_0402_25V6
@DISEMI@
1 2
PR804 10K_0402_1% @DIS@PR804 10K_0402_1% @DIS@
1 2
PR850
2.2_0603_5%
DIS@
PR850
2.2_0603_5%
DIS@
1
2
PC830
10U_0805_25V6K
DIS@PC830
10U_0805_25V6K
DIS@
1 2
PC810
680P_0603_50V7K
@DISEMI@PC810
680P_0603_50V7K
@DISEMI@
1 2
PL802
0.22UH_PCME064T-R22MS_28A_20%
DIS@
PL802
0.22UH_PCME064T-R22MS_28A_20%
DIS@
1
34
2
PR839
5.9K_0402_1%
DIS@PR839
5.9K_0402_1%
DIS@
1 2
PQ801
MDU1516URH_POWERDFN56-8-5
DIS@PQ801
MDU1516URH_POWERDFN56-8-5
DIS@
4
5
1
2
3
PR808 10K_0402_1% @DIS@PR808 10K_0402_1% @DIS@
1 2
PL803
0.22UH_PCME064T-R22MS_28A_20%
DIS@
PL803
0.22UH_PCME064T-R22MS_28A_20%
DIS@
1
34
2
PR837
6.98K_0402_1% DIS@
PR837
6.98K_0402_1% DIS@
1
2
PC822
150P_0402_50V8J
DIS@
PC822
150P_0402_50V8J
DIS@
1
2
PR860
1K_0402_1% DIS@
PR860
1K_0402_1% DIS@ 1
2
PC834
0.15U_0603_16V7K
DIS@PC834
0.15U_0603_16V7K
DIS@
1 2
PR858
10K_0402_1%
DIS@PR858
10K_0402_1%
DIS@
1 2
PR831
1.91K_0402_1% @DIS@
PR831
1.91K_0402_1% @DIS@1
2
PR817
2.2_0603_5% DIS@
PR817
2.2_0603_5% DIS@
1
2
PH801
470K_0402_5%_B25/50 4700K DIS@
PH801
470K_0402_5%_B25/50 4700K DIS@
1
2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
GPU 18W 560U x 3 10uF × 7 2.2uF × 16 1uF x 4
+VGA_CORE
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
55
0.1
VGA CHIP DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
55
0.1
VGA CHIP DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
55
0.1
VGA CHIP DECOUPLING
Saturday, January 31, 2015
PCV67
10U_0603_6.3V6M
DIS@PCV67
10U_0603_6.3V6M
DIS@
1 2
+
PCV49
560U_2.5V_M
DIS@
+
PCV49
560U_2.5V_M
DIS@
1 2
PCV69
10U_0603_6.3V6M
DIS@PCV69
10U_0603_6.3V6M
DIS@
1 2
PCV81
22U_0603_6.3V6M
DIS@PCV81
22U_0603_6.3V6M
DIS@
1 2
PCV63
2.2U_0402_6.3V6M
DIS@PCV63
2.2U_0402_6.3V6M
DIS@
1 2
PCV77
1U_0402_6.3V6K
DIS@PCV77
1U_0402_6.3V6K
DIS@
1 2
PCV52
2.2U_0402_6.3V6M
DIS@PCV52
2.2U_0402_6.3V6M
DIS@
1 2
+
PCV48
560U_2.5V_M
DIS@
+
PCV48
560U_2.5V_M
DIS@
1 2
PCV74
1U_0402_6.3V6K
DIS@PCV74
1U_0402_6.3V6K
DIS@
1 2
PCV73
10U_0603_6.3V6M
DIS@PCV73
10U_0603_6.3V6M
DIS@
1 2
PCV53
2.2U_0402_6.3V6M
DIS@PCV53
2.2U_0402_6.3V6M
DIS@
1 2
PCV78
0.1U_0402_10V7K
DIS@PCV78
0.1U_0402_10V7K
DIS@
1 2
PCV79
0.1U_0402_10V7K
DIS@PCV79
0.1U_0402_10V7K
DIS@
1 2
PCV64
2.2U_0402_6.3V6M
DIS@PCV64
2.2U_0402_6.3V6M
DIS@
1 2
PCV60
2.2U_0402_6.3V6M
DIS@PCV60
2.2U_0402_6.3V6M
DIS@
1 2
+
PCV50
560U_2.5V_M
DIS@
+
PCV50
560U_2.5V_M
DIS@
1 2
PCV56
2.2U_0402_6.3V6M
DIS@PCV56
2.2U_0402_6.3V6M
DIS@
1 2
PCV57
2.2U_0402_6.3V6M
DIS@PCV57
2.2U_0402_6.3V6M
DIS@
1 2
PCV51
2.2U_0402_6.3V6M
DIS@PCV51
2.2U_0402_6.3V6M
DIS@
1 2
PCV66
2.2U_0402_6.3V6M
DIS@PCV66
2.2U_0402_6.3V6M
DIS@
1 2
PCV75
1U_0402_6.3V6K
DIS@PCV75
1U_0402_6.3V6K
DIS@
1 2
PCV54
2.2U_0402_6.3V6M
DIS@PCV54
2.2U_0402_6.3V6M
DIS@
1 2
PCV71
10U_0603_6.3V6M
DIS@PCV71
10U_0603_6.3V6M
DIS@
1 2
PCV68
10U_0603_6.3V6M
DIS@PCV68
10U_0603_6.3V6M
DIS@
1 2
PCV76
1U_0402_6.3V6K
DIS@PCV76
1U_0402_6.3V6K
DIS@
1 2
PCV72
10U_0603_6.3V6M
DIS@PCV72
10U_0603_6.3V6M
DIS@
1 2
PCV65
2.2U_0402_6.3V6M
DIS@PCV65
2.2U_0402_6.3V6M
DIS@
1 2
PCV70
10U_0603_6.3V6M
DIS@PCV70
10U_0603_6.3V6M
DIS@
1 2
PCV62
2.2U_0402_6.3V6M
DIS@PCV62
2.2U_0402_6.3V6M
DIS@
1 2
PCV82
22U_0603_6.3V6M
DIS@PCV82
22U_0603_6.3V6M
DIS@
1 2
PCV61
2.2U_0402_6.3V6M
DIS@PCV61
2.2U_0402_6.3V6M
DIS@
1 2
PCV55
2.2U_0402_6.3V6M
DIS@PCV55
2.2U_0402_6.3V6M
DIS@
1 2
PCV80
0.1U_0402_10V7K
DIS@PCV80
0.1U_0402_10V7K
DIS@
1 2
PCV58
2.2U_0402_6.3V6M
DIS@PCV58
2.2U_0402_6.3V6M
DIS@
1 2
PCV59
2.2U_0402_6.3V6M
DIS@PCV59
2.2U_0402_6.3V6M
DIS@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
GPU 18W 560U x 3 10uF × 7 2.2uF × 16 1uF x 4
+VGA_CORE
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
55
0.1
VGA CHIP DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
55
0.1
VGA CHIP DECOUPLING
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
2016/09/30
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
55
0.1
VGA CHIP DECOUPLING
Saturday, January 31, 2015
PCV67
10U_0603_6.3V6M
DIS@PCV67
10U_0603_6.3V6M
DIS@
1 2
+
PCV49
560U_2.5V_M
DIS@
+
PCV49
560U_2.5V_M
DIS@
1 2
PCV69
10U_0603_6.3V6M
DIS@PCV69
10U_0603_6.3V6M
DIS@
1 2
PCV81
22U_0603_6.3V6M
DIS@PCV81
22U_0603_6.3V6M
DIS@
1 2
PCV63
2.2U_0402_6.3V6M
DIS@PCV63
2.2U_0402_6.3V6M
DIS@
1 2
PCV77
1U_0402_6.3V6K
DIS@PCV77
1U_0402_6.3V6K
DIS@
1 2
PCV52
2.2U_0402_6.3V6M
DIS@PCV52
2.2U_0402_6.3V6M
DIS@
1 2
+
PCV48
560U_2.5V_M
DIS@
+
PCV48
560U_2.5V_M
DIS@
1 2
PCV74
1U_0402_6.3V6K
DIS@PCV74
1U_0402_6.3V6K
DIS@
1 2
PCV73
10U_0603_6.3V6M
DIS@PCV73
10U_0603_6.3V6M
DIS@
1 2
PCV53
2.2U_0402_6.3V6M
DIS@PCV53
2.2U_0402_6.3V6M
DIS@
1 2
PCV78
0.1U_0402_10V7K
DIS@PCV78
0.1U_0402_10V7K
DIS@
1 2
PCV79
0.1U_0402_10V7K
DIS@PCV79
0.1U_0402_10V7K
DIS@
1 2
PCV64
2.2U_0402_6.3V6M
DIS@PCV64
2.2U_0402_6.3V6M
DIS@
1 2
PCV60
2.2U_0402_6.3V6M
DIS@PCV60
2.2U_0402_6.3V6M
DIS@
1 2
+
PCV50
560U_2.5V_M
DIS@
+
PCV50
560U_2.5V_M
DIS@
1 2
PCV56
2.2U_0402_6.3V6M
DIS@PCV56
2.2U_0402_6.3V6M
DIS@
1 2
PCV57
2.2U_0402_6.3V6M
DIS@PCV57
2.2U_0402_6.3V6M
DIS@
1 2
PCV51
2.2U_0402_6.3V6M
DIS@PCV51
2.2U_0402_6.3V6M
DIS@
1 2
PCV66
2.2U_0402_6.3V6M
DIS@PCV66
2.2U_0402_6.3V6M
DIS@
1 2
PCV75
1U_0402_6.3V6K
DIS@PCV75
1U_0402_6.3V6K
DIS@
1 2
PCV54
2.2U_0402_6.3V6M
DIS@PCV54
2.2U_0402_6.3V6M
DIS@
1 2
PCV71
10U_0603_6.3V6M
DIS@PCV71
10U_0603_6.3V6M
DIS@
1 2
PCV68
10U_0603_6.3V6M
DIS@PCV68
10U_0603_6.3V6M
DIS@
1 2
PCV76
1U_0402_6.3V6K
DIS@PCV76
1U_0402_6.3V6K
DIS@
1 2
PCV72
10U_0603_6.3V6M
DIS@PCV72
10U_0603_6.3V6M
DIS@
1 2
PCV65
2.2U_0402_6.3V6M
DIS@PCV65
2.2U_0402_6.3V6M
DIS@
1 2
PCV70
10U_0603_6.3V6M
DIS@PCV70
10U_0603_6.3V6M
DIS@
1 2
PCV62
2.2U_0402_6.3V6M
DIS@PCV62
2.2U_0402_6.3V6M
DIS@
1 2
PCV82
22U_0603_6.3V6M
DIS@PCV82
22U_0603_6.3V6M
DIS@
1 2
PCV61
2.2U_0402_6.3V6M
DIS@PCV61
2.2U_0402_6.3V6M
DIS@
1 2
PCV55
2.2U_0402_6.3V6M
DIS@PCV55
2.2U_0402_6.3V6M
DIS@
1 2
PCV80
0.1U_0402_10V7K
DIS@PCV80
0.1U_0402_10V7K
DIS@
1 2
PCV58
2.2U_0402_6.3V6M
DIS@PCV58
2.2U_0402_6.3V6M
DIS@
1 2
PCV59
2.2U_0402_6.3V6M
DIS@PCV59
2.2U_0402_6.3V6M
DIS@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Vout=0.8V* (1+Rup/Rdown) Vout =1.816V
Rup
Rdown
HW pull high 200Kohm to 5VS
PU8.8 ==> 1.1V up to enable
20141215 change value for hw request
EN_1.8V
FB_1.8VVIN_1.8V
0.95VSG_1.8VGS_GATE
<37>
1.8V_PWRGD
<36>
+3VALW
+1.8VS_VGAP
+5VALW
+1.8VS_VGAP
+1.8VS_VGA
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
+1.8VS_VGA
B
56 60
2013/09/09
2016/09/30
Compal Electronics, Inc. LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
+1.8VS_VGA
B
56 60
2013/09/09
2016/09/30
Compal Electronics, Inc. LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
+1.8VS_VGA
B
56 60
2013/09/09
2016/09/30
Compal Electronics, Inc. LA-C701P
PC116
0.22U_0402_10V6K
DIS@PC116
0.22U_0402_10V6K
DIS@
1 2
PU8
G971ADJF11U_SO8 DIS@
PU8
G971ADJF11U_SO8 DIS@
GND
1
VO
3
POK
7
VEN
8
VPP
6
VIN
5
VO
4
ADJ
2
TPAD
9
PC117
22U_0603_6.3V6M
DIS@PC117
22U_0603_6.3V6M
DIS@
1 2
PR106
16.9K_0402_1% DIS@
PR106
16.9K_0402_1% DIS@ 1
2
PC113
1U_0402_6.3V6K DIS@
PC113
1U_0402_6.3V6K DIS@
1 2
PR108
12.7K_0402_1%
DIS@PR108
12.7K_0402_1%
DIS@
1 2
PR109
10K_0402_1%
DIS@PR109
10K_0402_1%
DIS@
1 2
PR107 100K_0402_5%
DIS@
PR107 100K_0402_5%
DIS@
1 2
PC114
4.7U_0603_6.3V6K DIS@
PC114
4.7U_0603_6.3V6K DIS@
1
2
PC115
0.01U_0402_25V7K
DIS@PC115
0.01U_0402_25V7K
DIS@
1 2
PJP11
JUMP_43X79
@PJP11
JUMP_43X79
@
1
1
2
2
PJP12
JUMP_43X79
@
PJP12
JUMP_43X79
@
1
1
2
2
PR110
10K_0402_1%
DIS@PR110
10K_0402_1%
DIS@
1 2
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
Vout=0.8V* (1+Rup/Rdown) Vout =1.816V
Rup
Rdown
HW pull high 200Kohm to 5VS
PU8.8 ==> 1.1V up to enable
20141215 change value for hw request
EN_1.8V
FB_1.8VVIN_1.8V
0.95VSG_1.8VGS_GATE
<37>
1.8V_PWRGD
<36>
+3VALW
+1.8VS_VGAP
+5VALW
+1.8VS_VGAP
+1.8VS_VGA
+3VS
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
+1.8VS_VGA
B
56 60
2013/09/09
2016/09/30
Compal Electronics, Inc. LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
+1.8VS_VGA
B
56 60
2013/09/09
2016/09/30
Compal Electronics, Inc. LA-C701P
Title Size Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
0.1
+1.8VS_VGA
B
56 60
2013/09/09
2016/09/30
Compal Electronics, Inc. LA-C701P
PC116
0.22U_0402_10V6K
DIS@PC116
0.22U_0402_10V6K
DIS@
1 2
PU8
G971ADJF11U_SO8 DIS@
PU8
G971ADJF11U_SO8 DIS@
GND
1
VO
3
POK
7
VEN
8
VPP
6
VIN
5
VO
4
ADJ
2
TPAD
9
PC117
22U_0603_6.3V6M
DIS@PC117
22U_0603_6.3V6M
DIS@
1 2
PR106
16.9K_0402_1% DIS@
PR106
16.9K_0402_1% DIS@ 1
2
PC113
1U_0402_6.3V6K DIS@
PC113
1U_0402_6.3V6K DIS@
1 2
PR108
12.7K_0402_1%
DIS@PR108
12.7K_0402_1%
DIS@
1 2
PR109
10K_0402_1%
DIS@PR109
10K_0402_1%
DIS@
1 2
PR107 100K_0402_5%
DIS@
PR107 100K_0402_5%
DIS@
1 2
PC114
4.7U_0603_6.3V6K DIS@
PC114
4.7U_0603_6.3V6K DIS@
1
2
PC115
0.01U_0402_25V7K
DIS@PC115
0.01U_0402_25V7K
DIS@
1 2
PJP11
JUMP_43X79
@PJP11
JUMP_43X79
@
1
1
2
2
PJP12
JUMP_43X79
@
PJP12
JUMP_43X79
@
1
1
2
2
PR110
10K_0402_1%
DIS@PR110
10K_0402_1%
DIS@
1 2
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
AC Adapter 19.5V
DC Battery 4S1P
Charger BQ24735RGRR
RT8243AZQW
Vin
EN
DC/DC (+5VALW/+3VALW)
DDR RT8027MZQW
Vin EN
SY8003DFC
Vin
EN
SUSP#
ISL95813 DC/DC (CPU_CORE)
Vin VR_ON
+3VLP
PGOOD
SPOK
SYSON SUSP#
+1.35V_VDDQ
+1.05VS
+VCC_CORE
VGATE
VR_ON
+19.5VB
+0.6V_0.675VS
P.54, 55
ISL62883C DC/DC (VGA_CORE)
Vin EN
+VGA_CORE GPU_PWRGD
P.51, 52
P.50
P.49
P.48
P.47
P.46
P.45
G971A DC/DC
+1.8VS_VGA
Vin EN
0.95VSG_1.8VGS_GATE
P.56
+3VALW
+3VDS
DGPU_PWR_EN
1.8V_PWRGD
Charge
Discharge
PGOOD
1.05V_VS_PG_PWR
PGOOD
SY8003DFC
Vin EN
SUSP#
+1.5VS
PGOOD
P.53
+3VDS
SYX196D
Vin EN
SUSP#
+1.5VS
P.53
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
2014/12/31
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
57
0.1
Power Block Diagram
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
2014/12/31
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
57
0.1
Power Block Diagram
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
2014/12/31
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
57
0.1
Power Block Diagram
Saturday, January 31, 2015
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
AC Adapter 19.5V
DC Battery 4S1P
Charger BQ24735RGRR
RT8243AZQW
Vin
EN
DC/DC (+5VALW/+3VALW)
DDR RT8027MZQW
Vin EN
SY8003DFC
Vin
EN
SUSP#
ISL95813 DC/DC (CPU_CORE)
Vin VR_ON
+3VLP
PGOOD
SPOK
SYSON SUSP#
+1.35V_VDDQ
+1.05VS
+VCC_CORE
VGATE
VR_ON
+19.5VB
+0.6V_0.675VS
P.54, 55
ISL62883C DC/DC (VGA_CORE)
Vin EN
+VGA_CORE GPU_PWRGD
P.51, 52
P.50
P.49
P.48
P.47
P.46
P.45
G971A DC/DC
+1.8VS_VGA
Vin EN
0.95VSG_1.8VGS_GATE
P.56
+3VALW
+3VDS
DGPU_PWR_EN
1.8V_PWRGD
Charge
Discharge
PGOOD
1.05V_VS_PG_PWR
PGOOD
SY8003DFC
Vin EN
SUSP#
+1.5VS
PGOOD
P.53
+3VDS
SYX196D
Vin EN
SUSP#
+1.5VS
P.53
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
2014/12/31
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
57
0.1
Power Block Diagram
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
2014/12/31
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
57
0.1
Power Block Diagram
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet
of
Sec urity Clas s if ic ation
Compal Secret Data
THI S S HE E T OF E NGI NE E RI NG D RA W I NG I S THE P ROP RI E TA R
Y PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAI NS
CONFIDENTIAL
AND TRADE SECRET I NFORMATI ON. THI S SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONI
CS, I NC. NEI THER THI S SHEET NOR THE I NFORMATI ON I T
CONTAI NS
MA Y B E US E D B Y OR D I S C L OS E D TO A NY THI RD P A RTY W I TH
OUT P RI OR W RI TTE N C ONS E NT OF C OMP A L E L E C TRONI C S , I N
C.
Is s ued Date
Deciphered Date
2014/12/31
LA-C701P
2012/04/03
Compal Electronics, Inc.
60
57
0.1
Power Block Diagram
Saturday, January 31, 2015
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
1
Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List)
Fixed Issue
Date
Item
Reason for change
Modify List
Phase
change size use common part for 7x7
2
no need 0ohm
change part
change PL202 size from 10x10 to 7x7 PR224 and PR225 change from 0ohm to short pad
SI SI
3 change part
SI
HW request
Change R, C value PR106 100k => 16.9k PR109 47k => 10k PC116 0.1U => 0.22U
4 change part Change PN
PC88 from SE000006OM8 to SE000006O00 PV
5 20150129 for lose dGPU issue
unmount PC801
PV
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
58
Compal Electronics, Inc.
PIR List
0.1
LA-C701P
60
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
58
Compal Electronics, Inc.
PIR List
0.1
LA-C701P
60
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
58
Compal Electronics, Inc.
PIR List
0.1
LA-C701P
60
B
Saturday, January 31, 2015
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
1
Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List)
Fixed Issue
Date
Item
Reason for change
Modify List
Phase
change size use common part for 7x7
2
no need 0ohm
change part
change PL202 size from 10x10 to 7x7 PR224 and PR225 change from 0ohm to short pad
SI SI
3 change part
SI
HW request
Change R, C value PR106 100k => 16.9k PR109 47k => 10k PC116 0.1U => 0.22U
4 change part Change PN
PC88 from SE000006OM8 to SE000006O00 PV
5 20150129 for lose dGPU issue
unmount PC801
PV
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
58
Compal Electronics, Inc.
PIR List
0.1
LA-C701P
60
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
58
Compal Electronics, Inc.
PIR List
0.1
LA-C701P
60
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
58
Compal Electronics, Inc.
PIR List
0.1
LA-C701P
60
B
Saturday, January 31, 2015
A A
B B
C C
D D
E E
1
1
2
2
3
3
4
4
AC Adapter (15V - 19V)
14.8V_BATT
Battery
19.5VB
Battery Charger
CHG_ACDET
EN
CPU
+VCC_CORE
ISL95813HRZ-T Buck
+5VALW
RT8243AZQW 3V/5V Buck
VR_ON
EN
Q21
+5VS
EC_ON
EN
SY6288D20AAC Switch
USB2.0 port/SB
USB3.0 Port
USB_ON#
Bead PL13
CPU_B+
Bead PL7
SUSP#
B++
US1
PU2
PU5
DC/DC
+3VL
+1.05VS
GPU DP_VDDC PCIE_VDDC BIF_VDDC SPLL_VDDC
SY8003DFC Buck
SUSP#
EN
Bead PL12
B+_0.95V
PU4
DDR3L
+0.675VSP
RT8207PGQW Buck
DIMM
EN
+1.35VP
SYSON SUSP#
B+_DDR
Bead PL10
PU3
+1.35V_VDDQ
PJP4
SO
+3VALW
U4102
DGPU_PWR_EN#
DC/DC
+1.05VS_VGA
Lid Switch
EC
VIN
LA4 LA6
+5VS_PVDD +5VS_AVDD
Audio Codec PVDD Audio Codec AVDD
+USB_VCCA
ISL62883CHRTZ-T Buck
+VGA_CORE
+1.5VS
SY8032ABC Buck
+3VALW +3VS
DC/DC
+1.5VS_VGA
GPU
GPU VDDC
GPU_GDDR3 Lower
GPU_GDDR3 Upper
GPU EXO MEM
DGPU_PWR_EN
GPU DP_VDDR VDDR3 PCIE_PVDD TSVDD VDD_GPIO18 SPLL_PVDD MPLL_PVDD
+1.8VS_VGA
EN
+3VALW
G971ADJF11U Buck
SUSP#SUSP#
Q21
Bead PL16
Bead PL15
0.95VSG_1.8VGS_GATE
PXS_PWREN#
B+_Vramp
SYX196DQNC Buck
+3VS_VGA
For UMA
For Discrete
PU7
PU6
VGA_B+
Bead PL800
DC/DC
PU801
PU8
U4101
Audio Codec AVDD
DP to VGA transmitter RTD2168
Touch Panel Card Reader
/SB
LCDVDD LVDS Panel Touch Pad
FAN
Thermal Sensor NCT718
TPM
U20
DC/DC
WLAN
+3VS_WLAN_R
JPHW3
eDP to LVDS transmitter RTD2132N
+3VS_RT
KBD
FAN
FG1
+HDMI_CRT_5V
CRT Conn.
HDMI Conn.
R201
+5VS_HDD1
U20
+5VS_ODD
DC/DC
2.5" SATA HDD
ODD
Touch Pad
Touch Panel
EC LAN 8166EH
Q30
SPI ROM 8M
+3V_PCH
DC/DC
DGPU_PWR_EN
U4103
+3VS
+1.05VS
DC/DC
ODD_PWR
WL_PWREN_EC
SUSP#
Ti t l e Siz e Doc ument Number
Rev
Dat e:
Sheet
of
Security Classification
Compal Secret Data
TH I S SH EET O F EN G I N EER I N G D R AW I N G I S TH E PR O PR I ETAR
Y PR O PER TY O F C O MPAL EL EC TR O N I C S, I N C . AN D C O N TAI N S
CONFIDENTIAL
AN D TR AD E SEC R ET I N FO R MATI O N . TH I S SH EET MAY N O T BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E U S E D B Y O R D I S C L O S E D TO A N Y TH I R D P A R TY W I TH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued D ate
Deciphered Date
LA-C701P
1. 0
System Power Tree
E
59 60
Sat urday , January 31, 2015
2013/01/11 2015/04/22
Compal Electronics, Inc.
Ti t l e Siz e Doc ument Number
Rev
Dat e:
Sheet
of
Security Classification
Compal Secret Data
TH I S SH EET O F EN G I N EER I N G D R AW I N G I S TH E PR O PR I ETAR
Y PR O PER TY O F C O MPAL EL EC TR O N I C S, I N C . AN D C O N TAI N S
CONFIDENTIAL
AN D TR AD E SEC R ET I N FO R MATI O N . TH I S SH EET MAY N O T BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E U S E D B Y O R D I S C L O S E D TO A N Y TH I R D P A R TY W I TH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued D ate
Deciphered Date
LA-C701P
1. 0
System Power Tree
E
59 60
Sat urday , January 31, 2015
2013/01/11 2015/04/22
Compal Electronics, Inc.
Ti t l e Siz e Doc ument Number
Rev
Dat e:
Sheet
of
Security Classification
Compal Secret Data
TH I S SH EET O F EN G I N EER I N G D R AW I N G I S TH E PR O PR I ETAR
Y PR O PER TY O F C O MPAL EL EC TR O N I C S, I N C . AN D C O N TAI N S
CONFIDENTIAL
AN D TR AD E SEC R ET I N FO R MATI O N . TH I S SH EET MAY N O T BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E U S E D B Y O R D I S C L O S E D TO A N Y TH I R D P A R TY W I TH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued D ate
Deciphered Date
LA-C701P
1. 0
System Power Tree
E
59 60
Sat urday , January 31, 2015
2013/01/11 2015/04/22
Compal Electronics, Inc.
B B
C C
D D
E E
1
1
2
2
3
3
4
4
AC Adapter (15V - 19V)
14.8V_BATT
Battery
19.5VB
Battery Charger
CHG_ACDET
EN
CPU
+VCC_CORE
ISL95813HRZ-T Buck
+5VALW
RT8243AZQW 3V/5V Buck
VR_ON
EN
Q21
+5VS
EC_ON
EN
SY6288D20AAC Switch
USB2.0 port/SB
USB3.0 Port
USB_ON#
Bead PL13
CPU_B+
Bead PL7
SUSP#
B++
US1
PU2
PU5
DC/DC
+3VL
+1.05VS
GPU DP_VDDC PCIE_VDDC BIF_VDDC SPLL_VDDC
SY8003DFC Buck
SUSP#
EN
Bead PL12
B+_0.95V
PU4
DDR3L
+0.675VSP
RT8207PGQW Buck
DIMM
EN
+1.35VP
SYSON SUSP#
B+_DDR
Bead PL10
PU3
+1.35V_VDDQ
PJP4
SO
+3VALW
U4102
DGPU_PWR_EN#
DC/DC
+1.05VS_VGA
Lid Switch
EC
VIN
LA4 LA6
+5VS_PVDD +5VS_AVDD
Audio Codec PVDD Audio Codec AVDD
+USB_VCCA
ISL62883CHRTZ-T Buck
+VGA_CORE
+1.5VS
SY8032ABC Buck
+3VALW +3VS
DC/DC
+1.5VS_VGA
GPU
GPU VDDC
GPU_GDDR3 Lower
GPU_GDDR3 Upper
GPU EXO MEM
DGPU_PWR_EN
GPU DP_VDDR VDDR3 PCIE_PVDD TSVDD VDD_GPIO18 SPLL_PVDD MPLL_PVDD
+1.8VS_VGA
EN
+3VALW
G971ADJF11U Buck
SUSP#SUSP#
Q21
Bead PL16
Bead PL15
0.95VSG_1.8VGS_GATE
PXS_PWREN#
B+_Vramp
SYX196DQNC Buck
+3VS_VGA
For UMA
For Discrete
PU7
PU6
VGA_B+
Bead PL800
DC/DC
PU801
PU8
U4101
Audio Codec AVDD
DP to VGA transmitter RTD2168
Touch Panel Card Reader
/SB
LCDVDD LVDS Panel Touch Pad
FAN
Thermal Sensor NCT718
TPM
U20
DC/DC
WLAN
+3VS_WLAN_R
JPHW3
eDP to LVDS transmitter RTD2132N
+3VS_RT
KBD
FAN
FG1
+HDMI_CRT_5V
CRT Conn.
HDMI Conn.
R201
+5VS_HDD1
U20
+5VS_ODD
DC/DC
2.5" SATA HDD
ODD
Touch Pad
Touch Panel
EC LAN 8166EH
Q30
SPI ROM 8M
+3V_PCH
DC/DC
DGPU_PWR_EN
U4103
+3VS
+1.05VS
DC/DC
ODD_PWR
WL_PWREN_EC
SUSP#
Ti t l e Siz e Doc ument Number
Rev
Dat e:
Sheet
of
Security Classification
Compal Secret Data
TH I S SH EET O F EN G I N EER I N G D R AW I N G I S TH E PR O PR I ETAR
Y PR O PER TY O F C O MPAL EL EC TR O N I C S, I N C . AN D C O N TAI N S
CONFIDENTIAL
AN D TR AD E SEC R ET I N FO R MATI O N . TH I S SH EET MAY N O T BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E U S E D B Y O R D I S C L O S E D TO A N Y TH I R D P A R TY W I TH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued D ate
Deciphered Date
LA-C701P
1. 0
System Power Tree
E
59 60
Sat urday , January 31, 2015
2013/01/11 2015/04/22
Compal Electronics, Inc.
Ti t l e Siz e Doc ument Number
Rev
Dat e:
Sheet
of
Security Classification
Compal Secret Data
TH I S SH EET O F EN G I N EER I N G D R AW I N G I S TH E PR O PR I ETAR
Y PR O PER TY O F C O MPAL EL EC TR O N I C S, I N C . AN D C O N TAI N S
CONFIDENTIAL
AN D TR AD E SEC R ET I N FO R MATI O N . TH I S SH EET MAY N O T BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E U S E D B Y O R D I S C L O S E D TO A N Y TH I R D P A R TY W I TH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued D ate
Deciphered Date
LA-C701P
1. 0
System Power Tree
E
59 60
Sat urday , January 31, 2015
2013/01/11 2015/04/22
Compal Electronics, Inc.
Ti t l e Siz e Doc ument Number
Rev
Dat e:
Sheet
of
Security Classification
Compal Secret Data
TH I S SH EET O F EN G I N EER I N G D R AW I N G I S TH E PR O PR I ETAR
Y PR O PER TY O F C O MPAL EL EC TR O N I C S, I N C . AN D C O N TAI N S
CONFIDENTIAL
AN D TR AD E SEC R ET I N FO R MATI O N . TH I S SH EET MAY N O T BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MA Y B E U S E D B Y O R D I S C L O S E D TO A N Y TH I R D P A R TY W I TH
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued D ate
Deciphered Date
LA-C701P
1. 0
System Power Tree
E
59 60
Sat urday , January 31, 2015
2013/01/11 2015/04/22
Compal Electronics, Inc.
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
1
Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List)
Fixed Issue
Date
Item
Reason for change
Modify List
Phase
2014-11-25
[A32] Reserve XDP circuit
DB
2 3 4 5 6 7 8
[A32] Reserve SMBUS from CPU to TP module [Compal] Reserve Capx19 & Varistor x13 for BDW CPU ESD issue [A32] eDP to VGA solution Sanrio--ITE IT6513 Candy--RTD2168
A32 request
BDW CPU ESD issue
[HP] Reserve XDP circuit
A32 request
BDW CPU ESD issue solution
A32 request
[A32] KBC solution solution Sanrio--ENE KBC9012 Candy--ENE KBC9022
A32 request
2014-11-25 2014-11-25 2014-11-25 2014-11-25
[Compal] Remove WLAN LED circuit ,use KBC GPIO
2014-11-25
A32 request [A32] reserve TPM 1.2 & 2.0 TPM 1.2--SLB9665 TPM2.0--SLB9660
2014-11-25
[Compal] ODD load switch Sanrio use single load switch Candy use dual load switch [A32l] Change WLAN connector Sanrio--mini card Candy--M.2 Conn
reduce component reduce component
2014-11-25 2014-11-25
9 10 11 12
A32 request
reduce component
[Compal] Sanrio use power switch for Fan control , Candy use PWM control from KBC
2014-11-25
A32 request [A32] Card reader solution Sanrio--RTS5239 Candy--RTS5141
2014-11-25 2014-11-25
A32 request [A32] GPU solution Sanrio--Nvidia N15V-GM (17W) Candy--AMD Exo pro (18W)
DB DB DB DB DB DB DB DB DB DB DB
reduce component
[Compal] +3VS to +3VS_VGA from dual load switch to single load switch +1.8VS_VGA power direct support
DB
2014-11-25
13 14 2014-12-14
For LAN 1V regout [Compal] Pop LL3
15 2014-12-14
SI SI
16
SI
2014-12-14
17 18
2014-12-14 2014-12-14
SI SI
For fine turn DGPU power sequence [Compal] Change C4122 value from 0,01u to 0.22u For fine turn DGPU power sequence [Compal] Change R4109 value from 200K to 6.98K
[Compal] Change C4109 value from 0,01u to 0.027u
For fine turn DGPU power sequence
[Compal] Modify WLAN CLK request channel from 2 to 5.
Modify WLAN PCIE CLK request channel
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
60
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
60
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
60
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
1
Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List)
Fixed Issue
Date
Item
Reason for change
Modify List
Phase
2014-11-25
[A32] Reserve XDP circuit
DB
2 3 4 5 6 7 8
[A32] Reserve SMBUS from CPU to TP module [Compal] Reserve Capx19 & Varistor x13 for BDW CPU ESD issue [A32] eDP to VGA solution Sanrio--ITE IT6513 Candy--RTD2168
A32 request
BDW CPU ESD issue
[HP] Reserve XDP circuit
A32 request
BDW CPU ESD issue solution
A32 request
[A32] KBC solution solution Sanrio--ENE KBC9012 Candy--ENE KBC9022
A32 request
2014-11-25 2014-11-25 2014-11-25 2014-11-25
[Compal] Remove WLAN LED circuit ,use KBC GPIO
2014-11-25
A32 request [A32] reserve TPM 1.2 & 2.0 TPM 1.2--SLB9665 TPM2.0--SLB9660
2014-11-25
[Compal] ODD load switch Sanrio use single load switch Candy use dual load switch [A32l] Change WLAN connector Sanrio--mini card Candy--M.2 Conn
reduce component reduce component
2014-11-25 2014-11-25
9 10 11 12
A32 request
reduce component
[Compal] Sanrio use power switch for Fan control , Candy use PWM control from KBC
2014-11-25
A32 request [A32] Card reader solution Sanrio--RTS5239 Candy--RTS5141
2014-11-25 2014-11-25
A32 request [A32] GPU solution Sanrio--Nvidia N15V-GM (17W) Candy--AMD Exo pro (18W)
DB DB DB DB DB DB DB DB DB DB DB
reduce component
[Compal] +3VS to +3VS_VGA from dual load switch to single load switch +1.8VS_VGA power direct support
DB
2014-11-25
13 14 2014-12-14
For LAN 1V regout [Compal] Pop LL3
15 2014-12-14
SI SI
16
SI
2014-12-14
17 18
2014-12-14 2014-12-14
SI SI
For fine turn DGPU power sequence [Compal] Change C4122 value from 0,01u to 0.22u For fine turn DGPU power sequence [Compal] Change R4109 value from 200K to 6.98K
[Compal] Change C4109 value from 0,01u to 0.027u
For fine turn DGPU power sequence
[Compal] Modify WLAN CLK request channel from 2 to 5.
Modify WLAN PCIE CLK request channel
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
60
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
60
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
60
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
19
Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List)
Fixed Issue
Date
Item
Reason for change
Modify List
Phase
2014-12-14
SI
20
Modify DGPU PCIE CLK request channel Modify LAN PCIE CLK request channel
2014-12-14
SI
[Compal] Modify DGPU CLK request channel from 3 to 4. [Compal] Modify LAN CLK request channel from 0 to 2. [Compal]Add CPU external Thermal sensor at EC_SMB_CK2/DA2. SI
HP request add thermal sensor for CPU PCB.
GPU thermal sensor change to EC_SMB_CK3/DA3 SI
2014-12-23 2014-12-23 2014-12-23
21 22 23
SI
EMI request to change HDMI schematic. Reserved +5VS Touch power.
2014-12-24 2014-12-25 2015-01-26
24 25 26
Modify EC co-lay pin117 & 124. CPU and GPU thermal sensor can't on the same bus.
Add pull-up at PCIECLKREQ1#
2015-01-27
27
SVTP 3-9 fail.
R38 power change to +HDMI_CRT_5V , L7,L8,L9 change P/N.
BIOS request.
2015-01-27
28
Remove Hsync,Vsync Buffer footprint.
SVTP 3-9 fail.
Reserved 0 ohm on ODD_PLUG# , between CPU and ODD.
Reserved for test.
2015-01-28
29
SI SI PV PV PV PV
210 2015-01-30 EMI request
Add 680p at PWR_LED#
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
61
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
61
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
61
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
19
Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List) Version change list (P.I.R. List)
Fixed Issue
Date
Item
Reason for change
Modify List
Phase
2014-12-14
SI
20
Modify DGPU PCIE CLK request channel Modify LAN PCIE CLK request channel
2014-12-14
SI
[Compal] Modify DGPU CLK request channel from 3 to 4. [Compal] Modify LAN CLK request channel from 0 to 2. [Compal]Add CPU external Thermal sensor at EC_SMB_CK2/DA2. SI
HP request add thermal sensor for CPU PCB.
GPU thermal sensor change to EC_SMB_CK3/DA3 SI
2014-12-23 2014-12-23 2014-12-23
21 22 23
SI
EMI request to change HDMI schematic. Reserved +5VS Touch power.
2014-12-24 2014-12-25 2015-01-26
24 25 26
Modify EC co-lay pin117 & 124. CPU and GPU thermal sensor can't on the same bus.
Add pull-up at PCIECLKREQ1#
2015-01-27
27
SVTP 3-9 fail.
R38 power change to +HDMI_CRT_5V , L7,L8,L9 change P/N.
BIOS request.
2015-01-27
28
Remove Hsync,Vsync Buffer footprint.
SVTP 3-9 fail.
Reserved 0 ohm on ODD_PLUG# , between CPU and ODD.
Reserved for test.
2015-01-28
29
SI SI PV PV PV PV
210 2015-01-30 EMI request
Add 680p at PWR_LED#
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
61
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
61
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
Title Size Document Number
Rev
Date:
Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETAR
Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE
TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS
ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITH
OUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, IN
C.
Issued Date
Deciphered Date
61
Compal Electronics, Inc.
HW PIR List
0.1
LA-C701P
61
B
Saturday, January 31, 2015
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