Block diagram of msp430x5xx

Microcontrollers of Texas instruments
MSP430F5xx is the fifth series of the MSP430 family.
the neat block diagram along with their functioning was explained in the slide.

1. Block diagram of MSP430x5xx K.Ramya Sree 18BF1A085 SVCE

2. 512KB 66 KB

3. Memory address bus(MAB) and Memory data bus(MDB) Thes two buses are used to interface CPU,emulation /JTAG interface and Spy-Bi-Wire with pheripheral devices. Unified clock system: supports low system cost and ultra-low power consumption Greater the frequency, greater the power consumption,greater will be the speed. Pheripherals fast & slow reduce the power consumption of CPU and the peripherals  MSP430 provides different clock sources  choose the minimum clock speed has five clock sources for generating three kinds of clocks. LFXTCLK - external low or high frequency oscillation source, 32.768Khz (LF mode) or 4-32Mhz (HF mode); VLOCLK - ultra-low power internal oscillator, typically 10Khz; REFOCLK - low internal reference source, typical 32.768kHz; DCOCLK - internal digital clock oscillator, the stability obtained from the FLL(Frequency locked loop). XT2CLK - external high-frequency oscillation source 4-32Mhz; Digital Controlled Oscillator (DOC) ( 100 kHz up to 25MHz ) VLO (low frequency oscillator) 10-kHz nominal frequency High Frequency Oscillator Crystal Clock Low Frequency/ High Frequency Oscillator Crystal Clock

4. MCLK(master) - CPU use; high frequency SMCLK(subsystem master) - high speed peripherals; high frequency ACLK(auxiliary) - low-speed peripherals; low frequency Flash memory  : Flash memory  is a long-life and non-volatile storage chip that is widely  used  in embedded systems. It can keep stored data and information even when the power is off . It can be electrically erased and reprogrammed.  Flash memory  was developed from EEPROM (electronically erasable programmable read-only  memory ). size: 512KB. RAM(RANDOM ACCESS MEMORY): volatile size: 66KB

5. Central processing unit(CPU): heart of microcontroller unit. supports all instructions(16 bit ALU) and register set(16-bit registers ) extends the range of memory upto 1MB. Power management module(PPM): function: To produce an internal core supply voltage( Vcore-1.4,1.6,1.8 &1.9v ) from external primary supply voltage( DVCC-(1.8v to 3.6v)). PMM monitors and supervises primary and core supply voltages.  LDO(low drop out)voltage regulator -generates Vcore to supply for memory and pheripherals  system voltage monitor(SVM) & system voltage superviser - used to detect if all voltages has fallen under specific threshold voltage.  brown out reset:(BOR)- generates BOR signal that initializes system power up and detects low voltage supply.  Brown out protection avoids the device from damage.

6. SYS(system module): drives two function: Reset and NMI(non-maskable interrupt) reset – BOR NMI : user NMI and system NMI. system NMI : handles events related to PMM,vacant memory space and JTAG mail box, user NMI :handles interrupts related to flash access violations and oscillator faults. sys has watchdog timer:

7. Input /output ports: has six digital I/O ports (PA-PF) in which only PA port has interrupt capability. all ports are provided with resistor enable registers( PxREN ).

8. DMA(Direct memory access) controller: DMA controller transfers information from one address to another address in the available range without CPU interruption. 3 channel DMA controller is used. DMA used in CPU stand by mode- reduces power consumption. Timers(16 bit timers): Timer A features TA1(3 capture/compare register) and TA0(5 capture/compare registers); supports clock source of 25Mhz or more. Timer B features TB0(7 capture/compare register); supports clock source of 25Mhz or more. CC registers are used to input signal to measure parametres like duty cycle,time period,frequency etc.

9.  RTC-A: basic timer(32-bit counter) and RTC(real time clock)module form RTC-A; employed for real time clock operation and used a general purpose timer.  CRC(cyclic redundancy check): checks for errors in the content stored in the memory  USCI(universal serial communication interface): USCI has two interrupt vector generators –( USCI_Ax and USCI_Bx )

10. ADC12-A: advanced version of ADC12. Improved reference with linearity and power.

11. MPY32:it is an extension of MPY module that supports 32-bit multiplication and capable of handling fractional multiplications.

12. Enhanced emulator module(EEM):  provides different levels of debug features and helpful for developing the program. . JTAG(joint test action group)module :   is an  industry standard  for verifying designs and testing  printed circuit boards  after manufacture. used to interface controller and laptop/computer for loading and debugging programs using EEM module during program execution.