ch 3_The CPU_modified.ppt of central processing unit

this is ppt describe about computer components

1. Chapter 3B
The CPU
–Instruction set: Characteristics and Functions
–Instruction set: Addressing Modes
–Processor Organization
–Real World Computer Architectures
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2. Machine Instruction Characteristics
•The operation of the processor is determined by the
instructions it executes, referred to as machine
instructions or computer instructions
•The collection of different instructions that the
processor can execute is referred to as the processor’s
instruction set
•Each instruction must contain the information
required by the processor for execution
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3. Elements of an Instruction
•Operation code (opcode)
–Specifies the operation to be performed
–Do this: ADD, SUB, MPY, DIV, LOAD, STOR
•Source operand reference
–operands that are inputs for the operation
–To this: (address of) argument of op, e.g. register,
memory location
•Result operand reference
–Put the result here (as above)
•Next instruction reference (often implicit)
–When you have done that, do this: BR
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4. Instruction RepresentationInstruction Representation
•Within the computer each instruction is represented
by a sequence of bits
•The instruction is divided into fields, corresponding
to the constituent elements of the instruction
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5. Instruction Representation…..Instruction Representation…..
•Opcodes are represented by abbreviations, called mnemonics,
that indicate the operation. Common examples include
–ADD Add
–SUB Subtract
–MUL Multiply
–DIV Divide
–LOAD Load data from memory
–STOR Store data to memory
•Operands are also represented symbolically. For example, the
instruction ADD R, Y may mean add the value contained in
data location Y to the contents of register R. Y refers to the
address of a location in memory, and R refers to a particular
register.
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6. Instruction Set Design(1)
The most important fundamental design issues include the
following:
•Operation repertoire
–How many operations?
–which operations to provide
–How complex operations should be
•Data types: The various types of data upon which
operations are performed
•Instruction formats
–Instruction length (in bits),
–number of addresses,
– size of various fields, and so on
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7. Instruction Set Design(2)
•Registers
–Number of CPU registers available
–Which operations can be performed on which
registers?
– General purpose and specific registers
•Addressing: The mode or modes by which the address
of an operand is specified
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8. Instruction Types
•Data processing: arithmetic and logical instructions
•Data movement: I/O instructions
•Data storage: Movement of data into or out of register
and or memory locations
•Control: Test and branch instructions
–Test instructions are used to test the value of a data
word or the status of a computation.
–Branch instructions are then used to branch to a
different set of instructions depending on the decision
made.
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9. Processor Actions for Various Types of Operations Processor Actions for Various Types of Operations
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10. Types of Operands
•Addresses: addresses are, in fact, a form of data.
addresses can be considered to be unsigned integers.
•Numbers: All machine languages include numeric data
types. Three types of numerical data are common in
computers: Binary integer or binary fixed point , Binary
floating point, decimal.
•Characters: ASCII (128 printable and control characters +
bit for error detection)
•Logical Data: bits or flags, e.g., Boolean 0 and 1
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11. Number of Addresses
•More addresses
–More complex (powerful?) instructions
–More registers - inter-register operations are quicker
–Less instructions per program
•Fewer addresses
–Less complex (powerful?) instructions
–More instructions per program, e.g. data movement
–Faster fetch/execution of instructions
•Example: Y=(A-B):[(C+(DxE)]
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12. 3 addresses
Operation Result, Operand 1, Operand 2
–Not common
–Needs very long words to hold everything
SUB Y,A,B Y <- A-B
MPY T,D,E T <- DxE
ADD T,T,C T <- T+C
DIV Y,Y,T Y <- Y:T
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13. 2 addresses
One address doubles as operand and result
–Reduces length of instruction
–Requires some extra work: temporary storage
MOVE Y,A Y <- A
SUB Y,B Y <- Y-B
MOVE T,D T <- D
MPY T,E T <- TxE
ADD T,C T <- T+C
DIV Y,T Y <- Y:T
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14. 1 address
Implicit second address, usually a register
(accumulator, AC)
LOAD D AC <- D
MPY E AC <- ACxE
ADD C AC <- AC+C
STOR Y Y <- AC
LOAD A AC <- A
SUB B AC <- AC-B
DIV Y AC <- AC:Y
STOR Y Y <- AC
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15. 0 (zero) addresses
All addresses implicit, e.g. ADD
–Uses a stack, e.g. pop a, pop b, add
–c = a + b
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16. Addressing Modes
•addressing mode – method of forming a memory
address
•For a given instruction set architecture, addressing
modes define how machine language instructions
identify the operand (or operands) of each
instruction.
•Common addressing modes
–Immediate
–Direct
–Indirect
–Register
–Register Indirect
–Displacement (Indexed)
–Stack
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17. Basic Addressing Modes
we use the f we use the
In Addressing modes , we use the following notation:
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18. Immediate Addressing
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•Simplest form of addressing
•Operand = A
•This mode can be used to define and use constants or set
initial values of variables
•the instruction itself contains the value to be used
•Similar to using a constant in a high level language
•Advantage:
–fast, since the value is included in the instruction; no
memory reference to fetch data
–Disadvantage:
–not flexible, since the value is fixed at compile-time
–can have limited range in machines with fixed length
instructions
•Example
– add #5 , Add number 5 to contents of accumulator
–Mov CH,3AH , move the data 3AH to the register CH

19. Direct Addressing
•Address field contains the effective address of the operand.
•Effective address (EA) = address field (A)
•Was common in earlier generations of computers.
•Requires only one memory reference and no special calculation
•In a high level language, direct addressing is frequently used for
things like global variables.
•Advantage
–Single memory reference to access data
–More flexible than immediate
•Limitation is that it provides only a limited address space.
•Example
–Add A, add the contents of memory cell A to the accumulator.
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20. Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
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21. Indirect Addressing
•Memory cell pointed to by address field contains the address
of (pointer to) the operand
•EA = (A)
–Parentheses are to be interpreted as meaning contents of
–Look in A, find address (A) and look there for operand
•Advantage:
–For a word length of N an address space of 2
N
is now
available - Large address space
•Disadvantage:
–Instruction execution requires two memory references to
fetch the operand -hence slower
•One to get its address and a second to get its value
•Example
–ADD (A)
•Add contents of cell pointed to by contents of A to accumulator.
–ADD AX, (A)
•Add contents of cell pointed to by contents of A to register AX
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22. Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
22

23. Register Addressing
•Address field refers to a register rather than a
main memory address
•EA = R
•Advantages:
–Only a small address field is needed in the instruction
–No time-consuming memory references are required
•Disadvantage:
–The address space is very limited
•Example
–MOV AX, BX
–ADD AX, BX
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24. Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
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25. Register Indirect Addressing
•Analogous to indirect addressing
–The only difference is whether the address field
refers to a memory location or a register
•EA = (R)
•Address space limitation of the address field is
overcome by having that field refer to a word-length
location containing an address
•Uses one less memory reference than indirect
addressing
•Example
–ADD (R)
25

26. Register Indirect Addressing Diagram
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
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27. Displacement Addressing
•Combines the capabilities of direct addressing and register
indirect addressing
•EA = A + (R)
•Requires that the instruction have two address fields, at
least one of which is explicit
–The value contained in one address field (value = A) is
used directly
–The other address field refers to a register whose
contents are added to A to produce the effective address
–Most common uses:
–Relative addressing
–Base-register addressing
–Indexing
27

28. Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
Operand
Displacement
Registers
Address A
+
28

29. Relative Addressing
•EA = A + (PC)
•Address field A is treated as 2’s complement integer to
allow backward references
•Fetch operand from PC+A
•Can be very efficient because of locality of reference &
cache usage
–But in large programs code and data may be widely
separated in memory
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30. Base-Register AddressingBase-Register Addressing
•A holds displacement
•R holds pointer to base address
•R may be explicit or implicit
–E.g. segment registers in 80x86 are base
registers and are involved in all EA computations
–X86 processors have a wide variety of base
addressing
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31. Indexed addressing
•A = Base
•R = displacement
•EA = A + R
•Good for accessing arrays
–EA = A + R
–R++
•Iterative access to sequential memory locations is
very common
•Some architectures provide auto-increment or auto-
decrement
•Pre index EA = A + (R++)
•Post index EA = A + (++R)
•The ARM architecture provides pre indexed and post
indexed addressing
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32. Stack Addressing
•A stack is a linear array of locations
–Sometimes referred to as a pushdown list or last-in-first-
out queue
•A stack is a reserved block of locations
–Items are appended to the top of the stack so that the
block is partially filled
•Associated with the stack is a pointer whose value is the
address of the top of the stack
–The stack pointer is maintained in a register
–Thus references to stack locations in memory are in fact
register indirect addresses
–Is a form of implied addressing
–The machine instructions need not include a memory
reference but implicitly operate on the top of the stack
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33. Processor OrganizationProcessor Organization
•Fetch instruction
–The processor reads an instruction from memory (register, cache, main
memory)
•Interpret instruction
–The instruction is decoded to determine what action is required
•Fetch data
–The execution of an instruction may require reading data from memory or
an I/O module
•Process data
–The execution of an instruction may require performing some arithmetic or
logical operation on data
•Write data
–The results of an execution may require writing data to memory or an I/O
module
•In order to do these things the processor needs to store some data temporarily
and therefore needs a small internal memory
Processor Requirements:
33

34. CPU With the System BusCPU With the System Bus
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35. CPU Internal StructureCPU Internal Structure
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36. Kinds of registers Kinds of registers
•Within the processor there is a set of registers that function as a
level of memory above main memory and cache in the hierarchy.
User visible and modifiable
• General Purpose
• Data (e.g. accumulator)
• Address (e.g. base addressing, index addressing)
• Condition codes
Control registers (not visible to user)
• Program Counter (PC)
• Instruction Register (IR)
• Memory Address Register (MAR)
• Memory Buffer Register (MBR)
State register (visible to user but not directly modifiable)
• Program Status Word (PSW)
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37. User visible registers . . … User visible registers . . …
•A user-visible register is one that may be referenced by means of the machine
language that the processor executes.
•General-purpose registers can be assigned to a variety of functions by the
programmer.
–Advantages of general purpose registers
• Increase flexibility and programmer options
•Increase instruction size & complexity
•Data registers may be used only to hold data and cannot be employed in the
calculation of an operand address
•Address registers may themselves be somewhat general purpose, or they may
be devoted to a particular addressing mode. Examples include the following:
–Segment pointers
–Index registers
–Stack pointer
•Condition codes (also referred to as flags) are bits set by the processor
hardware as the result of operations
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38. Control Registers Control Registers
Four registers are essential to instruction execution
•Program counter (PC)
–Contains the address of an instruction to be fetched
•Instruction register (IR)
–Contains the instruction most recently fetched
•Memory address register (MAR)
–Contains the address of a location in memory
•Memory buffer register (MBR)
–Contains a word of data to be written to memory or
the word most recently read
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39. State RegistersState Registers
•Sets of individual bits
– e.g. store if result of last operation was zero or not
•Can be read (implicitly) by programs
– e.g. Jump if zero
•Can not (usually) be set by programs
•There is always a Program Status Word (see next)
• Possibly (for operating system purposes):
– Interrupt vectors
– Memory page table (virtual memory)
– Process control blocks (multitasking)
39

40. Program Status Word (PSW)Program Status Word (PSW)
•The PSW typically contains condition codes plus other
status information.
•Common fields or flags include the following:
Sign: Contains the sign bit of the result of the last arithmetic
operation.
 Zero: Set when the result is 0.
 Carry: Set if an operation resulted in a carry (addition) into
or borrow (sub-traction) out of a high-order bit. Used for
multiword arithmetic operations.
 Equal: Set if a logical compare result is equality.
 Overflow: Used to indicate arithmetic overflow.
 Interrupt Enable/Disable: Used to enable or disable
interrupts.
 Supervisor: Indicates whether the processor is executing in
supervisor or user mode
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41. ExampleExample
MicroprocessorMicroprocessor
Register Register
OrganizationsOrganizations
41

42. Registers of the 8086/80286

43. General Purpose RegistersGeneral Purpose Registers
•AX (Accumulator) – favored by CPU for arithmetic
operations
•BX – Base – can hold the address of a procedure or
variable (SI, DI, and BP can also).
– Can also perform arithmetic and data movement.
•CX – acts as a counter for repeating or looping
instructions.
•DX – holds the high 16 bits of the product in multiply
(also handles divide operations)

44. Segment RegistersSegment Registers
–Used as base locations for program instructions, data and
the stack
•CS – Code Segment – holds base location for all
executable instructions in a program
•SS - Base location of the stack
•DS – Data Segment – default base location for
variables
•ES – Extra Segment – additional base location for
memory variables.

45. Pointer RegistersPointer Registers
–Contain the offset of data(variables, labels) and
instructions from its base segment.
•BP – Base Pointer – contains an assumed offset from the
SS register. Often used by a subroutine to locate variables
that were passed on the stack by a calling program.
•SP – Stack Pointer – Contains the offset of the top of the
stack.
Index registers Index registers
–Speed up processing of strings, arrays, and other data
structures containing multiple elements.
•SI – Source Index – Used in string movement instructions.
The source string is pointed to by the SI register.
•DI – Destination Index – acts as the destination for string
movement instructions.