Ch-5 Transistor Characteristics.pdf

This covers the transistor characteristics, the concept of saturation, cutoff and active region

1. Transistor Characteristics
9/29/20211 Prof. H. B. Rathod, EC Dept. DDU, Nadiad

2. The Junction Transistor
•Currents I
E, I
B, I
Care considered positive
flowing into the transistor
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad2

3. Open Circuited Transistor
•Emitter and collector are identical
•Base region is very small and lightly doped
compared to Emitter and Collector
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad3

4. Transistor Biased in the Active Region
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad4

5. Transistor Current Components
•I
E
= I
pE
+ I
nE
•I
C
= I
CO
-I
pC1
•-I
CO
= I
nCO
+ I
pCO
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad5

6. Transistor current components(Cont..) •Large –signal current gain α:
0
−
−
−≡
E
CO C
I
I I
α
•Generalized transistor equation: 9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad6
0
−
E
I
) 1(
T
C
CO E C
V
V
e I I I− + −=
α

7. Transistor as an Amplifier
E L C L L
I R I R V
∆
−
=
∆
−
=
∆
'
α
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad7
VCB
I
I
Where
r
R
Ir
I R
A
E
C
e
L
E e
E L
| ',
' '
∆
∆
≡
−=
∆
∆
−≡
α
α
α

8. Early Effect or Base -Width Modulation
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad8

9. Early Effect or Base -Width
Modulation(Cont..)
Has three consequences:
1. Recombination within base region decreases i.e.
base current decreases, hence increases
2.
Concentration gradient of minority carriers
α
2.
Concentration gradient of minority carriers increases, hence increases
3. Extremely large reverse bias at collector junction
reduces the effective base width to zero. And
that causes voltage breakdown in the transistor
called punch through
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad9
E
I

10. Common Base (CB) Configuration
•Input Characteristics:
•Output Characteristics:
),(
1E CB EB
I V V
φ
=
), (
2E CB C
I V I
φ
=
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad10

11. CB Output Characteristics
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad11
) 1(
T
C
CO E C
V
V
e I I I− + −=
α

12. CB Input Characteristics
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad12

13. Common Emitter(CE) Configuration
•Input Characteristics:
•Output Characteristics:
),(
1B CE BE
I Vf V=
), (
2B CE C
I Vf I
=
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad13

14. CE Output Characteristics
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad14

15. E C B
E CO C
I
I
and From
I I I
I
I
I
α
α + −=
−
=
)2( )1(
)2( ) (
)
1
(
CE Characteristics (Active Region)
B CO C
B CO
C
I I I becomes
eq then If
I
I
I
β β
α
α
β
α
α
α
+ + =
−
≡
−
+
−
=
) 1(
)3.(
1
,
)3(
1 1
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad15

16. CE Characteristics (Active Region)
•The CE output characteristics lines in active
region are having higher slope compared to
CB output characteristics lines
•
Because of base width modulation
α
increases
•
Because of base width modulation
α
increases
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad16
49
98.01
98.0
1
,98.0=
−
=
−
= =
α
α
β α
For
66
985.01
985.0
1
, 985.0=
−
=
−
= =
α
α
β α
For

17. Cutoff Region
•Cutoff means:
•Isitenoughtosetinputcurrent0(i.eV
BE=0)to
settransistorincutoffregion?
CO C
I I
=
TForCBconfiguration:Yes
TForCEconfiguration:Nofor Germaniumtransistor
andYesforSilicontransistor
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad17

18. Cutoff Region(Cont..)
•For GE transistor αmay be as high as 0.9 even
with zero base current
•At this much high value of α
I
•So, to set GE transistor in cutoff emitter
junction is reverse biased by 0.1 volt.
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad18
CO CEO
CO
E C
I I
I
I I10
1
= ≡
−
= −=
α

19. Cutoff Region(Cont..)
•What is I
CBO?
•Two reasons for I
CBO greater than I
CO:
TSurface leakage current
T
Avalanche multiplication
T
Avalanche multiplication
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad19

20. Circuit Considerations at Cutoff
•Manufacturer provides BV
EBO. Why?
•I
CBOhas large range (from few nA to tens of
µA) due to temperature effects, avalanche
multiplication, and large variability from multiplication, and large variability from sample to sample
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad20

21. Circuit Considerations at Cutoff(Cont..)
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad21
V IR V V
CBO B BB BE
1.0
−
≤
+
−
=
Reverse biasing of emitter junction to maintain tra nsistor in cutoff

22. Circuit Considerations at Cutoff(Cont..) •Assume I
CBOis 100µAandR
Bis 100kΩ, then
RequiredV
BBis10.1volttosetV
BE=-0.1volt
•Ifthetransistorisreplacedbythesametype
of
transistor
and
new
transistor
is
having
I
of
transistor
and
new
transistor
is
having
I
CBO
fewnA, thenVBE will be approximately
-10.1Volt
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad22

23. CE Saturation Region
•J
Eand J
Cboth forward biased
•Common emitter saturation resistance, R
CE,sat
or R
CESis the ratio V
CE,sat/I
C
•Base spreading resistance r
bb’is of the order of
magnitude 100
Ω
.
magnitude 100
Ω
.
•Why don’t we consider collector spreading
resistance or emitter spreading resistance?
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad23

24. Methodology to Solve Examples
Method 1: Assume transistor in active region
TApply KVL to the base circuit(input loop) and
calculate I
B
TCalculate I
C
using relation I
C
= βI
B
C
C
B
TCalculate V
BC
voltage to conform transistor in
active region
TFor transistor to be in active region following
condition must be satisfied
V
BC
≤ 0.5V (For NPN)
V
BC
≥ 0.5V (For PNP)
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad24

25. Methodology to Solve Examples(Cont..)
Method 2: Assume transistor in saturation region
TDon’t use I
C
= βI
B
as transistor is assumed in
saturation
T
Calculate I
B
and I
C
by applying KVL to base circuit
T
Calculate I
B
and I
C
by applying KVL to base circuit
and collector circuit respectively
TCalculate I
Bmin
for transistor to be in saturation
IBmin= IC
sat
/β
TIf I
B
≥ I
Bmin
, Then transistor is in saturation
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad25

26. Example 1
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad26

27. Examples 2
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad27

28. Examples 3
CEsat CC
Csat
B
BEsat BB
B
R
V V
I
A
R
V V
I
saturation
in
transistor
Assume
−
=
=
−
=
µ
21
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad28
C
Csat
R
I
=
min B B
I I
saturation in beto transistor For
≥
β β
C
CEsat CC Csat
B
R
V V I
I
−
= =
min
β
µ
C
CEsat CC
R
V V
A
−
≥ 21
K R
C
66.4
≥

29. Example 3(Cont..)
mA I I
A
R
V V
I
region
active
in
transistor
Assume
B C
B
BE BB
B
15.2
5. 21
= =
=
−
=
β
µ
0= − + = −
B B CB C C BB CC
RI V RI V V
KVL Applying
R
I
R
I
V
V
V
+
−
−
=
⇒
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad29
B B C C BB CC CB
R
I
R
I
V
V
V
+
−
−
=
⇒
B B BB CC C C BC
RI V V RI V
−
+
−
=
⇒
V VBC
region saturation in beto transistor For
V VBC
region active in beto transistor For
5.0
5.0
:
>
∴
≤
K
R
I
RI V V
R
V
V
R
I
V
R
I
C
C
B B BB CC
C
BB B B CC C C
55
.
4
5.0
5
.
0
>
⇒
+ − +
> ⇒
>
−
−
−

30. Example 4 Part (a)
A A
C at I C at I
T T
CBO CBO µ µ
ο ο
64 2) 2(
2 25 75
10
25 75
10
1 2
= × =
× =
−
−
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad30
V IR V V
C at CBO B BB BE
1.0
) 75 (
−
≤
+
−
=
ο
BB C CBOat B
V IR+ −≤ ⇒1.0 ) (
75
ο
V IR
C CBOat B
9.4) (
75
≤ ⇒
ο
K R
B
5.76
≤
⇒
K R
B
5.76
max
=
⇒

31. Example 4(Cont..)
V IR V V
T temp at CBO B BB BE
1.0
) (
−
≤
+
−
=
Part b
BB T temp at CBO B
V V IR
+
−
≤
⇒
1.0
) (
A
K
I
T temp at CBO
µ
18
50
9.0
) (
= ≤ ⇒
T
T
25
25
−
−
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad31
A A C at I CTat I
T
T
CBO CBO
µ µ
ο ο
18 2 2 2) 25 (
10
25
10
25
= × = × =
−
−
9 2
10
25
=
−T
17.3
2 log
9log
10
25
= =
−
⇒
T
C T
ο
57 7.56 25 7.31≈ = + = ⇒

32. CE Current Gain
•Large signal current gain:
•DC current gain:
•
Small signal current gain:
) (
CBO B
CBO C
I I
I I
−−
−
=
β
FE
B
C
DC
h
I
I
= ≡
β
C
fe
I
h
|
∂
=
•
Small signal current gain:
•For active region, relation between h
feand h
FE: 9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad32
CE
B
fe
V
I
I
h
|
∂∂
=
) )( (1
C
FE
B CBO
FE
fe
I
h
I I
h
h
∂
∂
+ −
=

33. The Ebers-Moll Model
•Normal mode of operation:
)1 ( (
)
− − + −=
T
C
CO E
N
C
V
V
e I I I
α
•Inverted mode of operation: 9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad33
)1 ( (
)
− −+ −=
T
E
EO C
I
E
V
V
e I I I
α

34. The Ebers-Moll Model(Cont..)
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad34
Can we use two separate diodes to form transistor?

35. Maximum Voltage Rating
•Avalanche Multiplication
TBV
CBO
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad35

36. Maximum Voltage Rating(Cont..)
•Avalanche Multiplication
TBV
CBO
CBO CO C
MI MI I
=
=
1
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad36
10 2 ,
1
1
to range the inisn Wher
BV
V
M
n
CBO
CB






−
≡

37. Maximum Voltage Rating(Cont..)
•Avalanche Multiplication
TBV
CEO
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad37

38. Maximum Voltage Rating(Cont..)
•Avalanche Multiplication
TBV
CEO
•Under the presence of avalanche
multiplication
αα
II
appears to be
MM
αα
II
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad38
multiplication
αα
II
EE
appears to be
MM
αα
II
EE
•Relation between BV
CBOand BV
CEO: 2
1
n
FE
CBO CEO
h
BV BV





=

39. Maximum Voltage Rating(Cont..)
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad39 CE characteristics extended into the breakdown regi on

40. •Punch-through (Reach-through)
•Unlike avalanche breakdown,
punch-through takes place
at fixed voltage and is
independent of circuit
Maximum Voltage Rating(Cont..)
independent of circuit configuration
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad40
The potential variation through a P-N-P transistor
After “Reach-through”
voltage Breakdown V
W W When
W qN
V
j
B
D
j
=
=
=
, ,
2
2
ε

41. Maximum Voltage Rating(Cont..)
•In a given transistor voltage limit is determined b y
avalanche break down or punch-through whichever
occurs at lower voltage
9/29/2021 Prof. H. B. Rathod, EC Dept. DDU, Nadiad41