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1. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Transistors must be properly biased to work as amplifiers.
DC biasing is used to establish a steady level of transistor current and voltage.
That point of operation is called the dc point or quiescent point (Q-point).
We have three possible states in a transistor:
 Cutoff: Emitter and collector diodes are OFF.
 Active: Emitter diode is ON, collector diode is OFF.
 Saturation: Emitter and collector diodes are OFF.
When we want to amplify a signal, we should operate in the active region.
In general we want to amplify voltage rather than current.
Introduction

2. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
For example, the heads on a tape player (or VCR) pick up the magnetic traces on a tape and
provide a small voltage output.
Speakers used to convert the electrical signal to an ac acoustic (sound) signal need large
voltages!
The stereo amplifier, with tape head input and speaker output, provides the voltage
amplification necessary
That is, the output voltage from amplifier is greater than the input voltage to amplifier.
Amplification is an example of linear applications.
Amplifiers are the most common linear devices.
In general, we need to amplify AC signals (time varying signals).
However, proper operation depends on its DC bias voltages and currents.
We will not deal with cutoff and saturation.
Introduction

3. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
A dc operating point must be set so that signal variations at the input terminal are amplified
and accurately reproduced at the output terminal.
The operating point is given by I
Cand V
CE.
It is referred to as Q-point (quiescent point).
DC Operating Point

4. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
If an amplifier is not properly biased, it will go either into cutoff or saturation.
For example, the inverting amplifier:
DC Bias

5. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Adjusting V
BB­ to get a I
B= 200 μAwe get:
I
C= β
DCI
B= (100)(200 μA) = 20 mA
V
CE= V
CC-I
CR
C= 10 –(20 mA)(220 Ω) = 5.6 V
If we adjust V
BBso that I
B= 300 μAwe get:
I
C= β
DCI
B= (100)(300 μA) = 30 mA
V
CE= V
CC-I
CR
C= 10 –(30 mA)(220 Ω) = 3.4 V
If we adjust V
BBso that I
B= 400 μAwe get:
I
C= β
DCI
B= (100)(400 μA) = 40 mA
V
CE= V
CC-I
CR
C= 10 –(40 mA)(220 Ω) = 1.2 V
DC Bias

6. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
We get three different Q points, one for each case:
Note that when I
B­ ­increases, I
Cincreases and V
CEdecreases.
When I
Bdecreases, I
Cdecreases and V
CEdecreases.
Thus, adjusting V
BBshifts the operating point of the transistor along a sloping line.
This line is called the dc load line.
The dc load line intersects the V
CEaxis at 10 V. At this point V
CE= V
CC.
At this point we are entering cutoff (since I
B= I
C= 0 in the ideal case).
The dc load line intersects the I­
Caxis at 45.5 mAideally.
At this point we are entering the saturation state (I
Cis maximum, V
CE = 0 and I
C= V
CC/R
C).
Applying KVL around the collector loop we get:
V
CC–I
CR
C–V
CE= 0
I
C= -(1/R
C) V
CE+ V
CC/R
C
Which indicates that the slope is -(1/R
C) and the V
CC/R
Cis the ordinate intercept.
DC Bias

7. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Linear Operation
•All points along the dc load line, between saturation and cutoff form the linear regionof
operation.
•This means that as long as we operate in this region, the output voltage is a linear reproduction
of the input.
•Look at the following example.
•A sinusoidal wave, V
in
, is superimposed to the base voltage.

8. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Linear Operation
V
incauses a ±100 μAvariation in the base current (I
B) with respect to the Q-point value of 300
μA.
This causes the collector current to vary 10 mAabove and below its Q-point value of 30 mA.
In result, the collector-to-emitter voltage varies 2.2 V above and below its Q-point value of 3.4
V.
Note that V
CEQ, I
CQ, and I
BQare the dc Q-point values with no input sinusoidal voltage applied.

9. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Waveform distortion
If we operate to close to cutoff or too close to saturation, waveform distortion may occur.
The top or the bottom of the output wave will appear clipped.
When the positive peak is clipped,
transistor is being driven into saturation.
If the negative peak is clipped,
transistor is going into cutoff.
If the negative and positive peaks are
clipped, the input is too large.

10. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Example:
Determine the Q-point in the following circuit. Assume β
DC= 200. Find the maximum peak
value of the base current for linear operation.

11. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Example:
The Q-point is defined by I
Cand V
CE. We find these values as follows:
I
B= (V
BB–V
BE)/R
B= (10 V –0.7 V)/47 kΩ= 198 μA
I
C= β
DCI
B= (200)(198 μA)= 39.6 mA
V
CE= V
CC–I
CR
C = 20 V –13.07V = 6.93 V
Thus the Q-point is at I
C= 39.6 mAand V
CE= 6.93 V. Since I
C(cutoff)= 0, we need to know I
C(sat)to
determine how much variation in collector current can occur and still maintain linear operation.
I
C(sat)=V
CC/R
C= 20 V/330 Ω = 60.6 mA
The dc load line looks as follows:

12. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Example:
Thus, before saturation is reached, I
Ccan increase, ideally, by
I
C(sat)–I
CQ= 60.6 mA–39.6 mA= 21 mA
And it can decrease by 39.6 mAbefore cutoff (I
C= 0) is reached. The limiting value is, then, 21
mA. Thus we can see that we are closer to saturation than to cutoff.
The maximum peak variation of the base current is:
I
b(peak)= I
c(peak)/β
DC= 21 mA/200 = 105 μA

13. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
This is the most widely used method for biasing a transistor for linear operation.
It uses a single voltage source and a voltage divider circuit.
Unlike other methods, this method results in a β (almost) independent circuit.
That is, β
DCand V
BEdo not affect the stability of the Q-point.
Considering the following circuit, we can see that the there are two paths between point A
and ground: through R
2and through the BE junction.

14. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
If I
Bis much smaller than current through R
2, we can view the circuit just
as a voltage divider consisting of R
1 and R
2.
If I
Bis NOT small enough to neglect, compared to I
2, then the dc input
resistance, R
IN(base) must be considered.

15. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
Consider the following circuit.
The resistance looking into the base of the transistoris
R
IN(base)= V
IN/I
IN
Applying KVL and assuming V
BE<< I
ER
Ewe get
V
IN= V
BE+ I
ER
E
V
IN ≈ I
ER
E
And since I
E≈ I
C= β
DCI
BV
IN becomes
V
IN≈ β
DCI
BR
E
The input current is the base current, I
IN = I
B. Substituting we get
R
IN(base)= V
IN/I
IN= β
DCI
BR
E/I
B= β
DCR
E
Thus, the resistance seen by looking into the base of the transistor is the
gain, β
DC, times the emitter resistance, R
E.
Input resistance at the transistor base

16. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
Consider the following circuit.
As shown before, R
IN(base)= β
DCR
E. The resistance from base to ground is R
2||R
IN(base)= R
2||
β
DCR
E.
The voltage at the base is, then, V
B= (R
2||β
DCR
E)/(R
1+ (R
2||β
DCR
E))V
CC
Assuming β
DCR
E>> R
2(at least ten times): V
B ≈ R
2(R
1 + R
2) V
CC
Knowing the base voltage, we can find the emitter voltage: V
E= V
B–V
BE.
Ohm’s law gives us the emitter current: I
E= V
E/R
Eand the
rest of the values:
I
C≈ I
E
V
C= V
CC-I
CR
C
V
CE= V
C-V
E
We can also express V
CEin terms of I
Cby using KVL:
V
CC–I
CR
C–I
ER
E–V
CE= 0
V
CE≈ V
CC–I
CR
C–I
CR
E
V
CE≈ V
CC–I
C(R
C + R
E)
Analysis of a Voltage-Divider Bias Circuit( approximate method)

17. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
V­
TH= R
2/(R
1+ R
2)V
CC
R
TH= R
1R
2/(R
1+ R
2)
Apply KVL around the equivalent base-emitter loop:
V­
TH–V­
R(th) –V
BE –V
R(E) = 0
V­
TH= I
B­R
TH + V
BE + I
ER
E
But I
B=I
E/β
DC,
V­
TH= I
E(R
E+ R
TH/β
DC) + V
BE
Solve for I
E:
I
E= (V
TH–V
BE)/(R
E+ R
TH/β
DC)
As usual, assume R
E>> R
TH/β
DC, then
I
E= (V
TH­ –V
BE)R
E
Analysis of a Voltage-Divider Bias Circuit (exact method)

18. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
Example:
Determine V
CEand I
­Cin the voltage-divider biased transistor circuit shown below. Assume β
DC=
100.
Analysis of a Voltage-Divider Bias Circuit

19. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
Example:
Determine the dc input resistance at the base:
R
IN(base)= β
DCR
E= (100)(560 Ω) = 56 kΩ
Since R
IN(base) = 10R
2, we may neglect R
IN(base). Thus,
V
B≈ R
2(R
1 + R
2) V
CC = (5.6 kΩ)(15.6 kΩ) 10 V = 3.59 V
So,
V
E= V
B–V
BE= 3.59 V –0.7 V = 2.89 V
and
I
E= V
E/R
E= 2.89 V/ 560 Ω = 5.16 mA
Thus,
I
C≈ 5.16 mA
and
V
CE≈ V
CC–I
C(R
C+ R
E) = 10V–5.16mA(1.56kΩ)= 1.95 V
Since V
CE>0, the transistor is NOT in saturation.
Analysis of a Voltage-Divider Bias Circuit(approximate method)

20. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
Example:
V­
TH= R
2/(R
1+ R
2)V
CC=3.69 volt
R
TH= R
1R
2/(R
1+ R
2)=3.59 KΩ
Apply KVL around the equivalent base-emitter loop:
V­
TH–V­
R(th) –V
BE –V
R(E) = 0
I
E= (V
TH–V
BE)/(R
E+ R
TH/β
DC)
I
E= (3.59 –0.7)/(560 + 3.59/100)=4.85 mA
Analysis of a Voltage-Divider Bias Circuit(exact method)

21. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Voltage-divider Bias
Solve for I
E:
I
E= (V
TH–V
BE)/(R
E+ R
TH/β
DC)
As usual, assume R
E>> R
TH/β
DC, then
I
E= (V
TH­ –V
BE)R
E
Note that the expression for I
Eis independentof β
DC. Thus, varying β
DC’swill not affect I
­E.
Thus, I
C will also be unaffected by β
DC.
Remember that for this type of biasing (voltage-divider) we mustmake sure R
Eis at least ten
times R
TH/β
DC.
This is not an unreasonable assumption, since β
DCis generally large.
Stability of Voltage-Divider Bias

22. An-NajahNational University
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Transistor Bias Circuits
Base Bias
Looking at the figure below, we can see that
V
CC–V
R(B)–V
BE= 0 Or V
CC–I
BR
B–V
BE= 0
Which results in:
I
B= (V
CC–V
BE)/R
B
I
C= β
DC(V
CC–V
BE)/R
B
Apply KCL at collector to get:
V
CC–I
CR
C-V
CE= 0
V
CE= V
CC–I
CR
C
Note that I
Cis dependenton β
DC.
Any variation in β
DCwill result in a variation in I
C.
This makes this bias method very unstable!!
Analysis of a Base Bias BiasCircuit

23. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Base Bias
Example:
Determine how much the Q-point (I
C , V
CE) in the circuit below will change over a temperature
range where β
DCincreases from 85 to 100 and V
BEdecreases from 0.7 V to 0.6 V (both changes
happen at the same time).
Analysis of a Base Bias BiasCircuit

24. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Base Bias
Example:
Solution:
Before the temperature rises, we have β
DC= 85 and V
BE= 0.7 V. Thus
I
C(1) = β
DC(V
CC–V
BE)/R
B= 85(12 V –0.7 V)/100 kΩ= 9.61 mA
V
CE(1)= V
CC–I
CR
C= 12 V –(9.61mA)(560 Ω) = 6.62 V
After the temperature rise, we have β
DC= 100 and V
BE= 0.6 V. Thus
I
C(2) = β
DC(V
CC–V
BE)/R
B= 100(12 V –0.6 V)/100 kΩ
= 11.4 mA
V
CE(2)= V
CC–I
CR
C= 12 V –(11.4 mA)(560 Ω) = 5.62 V
The percent change in I
Cand V
CE after the temperature change is:
%Δ I
C= (I
C(2)–I
C(1))/I
C(1)100% = 18.6%
%Δ V
CE= (V
CE(2)–V
CE(1))/V
CE(1)100% = -5.1%
Analysis of a Base Bias BiasCircuit

25. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Base Bias
The percent change in I
Cand V
CE after the temperature change is:
%Δ I
C= (I
C(2)–I
C(1))/I
C(1)100% = 18.6%
%Δ V
CE= (V
CE(2)–V
CE(1))/V
CE(1)100% = -5.1%
This shows that the Q-point is very dependent on β
DC. Thus, the bias arrangement becomes
very unstable.
Base bias is very rarely used if linear operation is required (amplification). However, it may be
used in switching applications.
Analysis of a Base Bias BiasCircuit

26. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Base Bias
The percent change in I
Cand V
CE after the temperature change is:
%Δ I
C= (I
C(2)–I
C(1))/I
C(1)100% = 18.6%
%Δ V
CE= (V
CE(2)–V
CE(1))/V
CE(1)100% = -5.1%
This shows that the Q-point is very dependent on β
DC. Thus, the bias arrangement becomes
very unstable.
Base bias is very rarely used if linear operation is required (amplification). However, it may be
used in switching applications.
Analysis of a Base Bias BiasCircuit

27. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Emitter bias
Analysis of Emitter bias Circuit
Uses both a positive and a negative power supply voltage.
KVL yields:
-V
EE+ V
R(B)+ V
BE+ V
R(E)= 0
-V
EE+ I
BR
B+ V
BE+ I
ER
E = 0
+V
EE = I
BR
B+ V
BE+ I
ER
E
But I
C≈ I
Eand I
C= β
DCI
B, thus I
B= I
E/β
DC. This results in
I
E(R
B/β
DC+ R
E) + V
BE= +V
EE
Solving for I
E
I
E= (V
EE–V
BE)/(R
E+R
B/β
DC)
or
I
C≈ (V
EE–V
BE)/(R
E+ R
B/β
DC)

28. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor Bias Circuits
Emitter bias
Example:
Determine the variation in Q-points in the following circuit if β
DCchanges from 85 to 100 and V
BE
from 0.7 V to 0.6 V.
Analysis of a Emitter bias Circuit

29. An-NajahNational University
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Transistor Bias Circuits
Base Bias
Example:
Solution:
For the lower temperature (β
DC= 85 and V
BE= 0.7 V):
I
C(1)≈ I
E= (V
EE–V
BE)/(R
E+ R
B/β
DC) = 1.73 mA
Thus V
CE(1)= Vcc+ V
EE-(RC+RE)*IC = 14.6 V
For the higher temperature case (β
DC= 100 and V
BE= 0.6 V):
I
C(2)≈ I
E= (V
EE–V
BE)/(R
E+ R
B/β
DC) = 1.76 mA
V
CE(2)= Vcc+ V
EE-(RC+RE)*IC = 14.1 V
The percent change in I
Cand V
CEis:
%Δ I
C= (I
C(2)–I
C(1))/I
C(1)100% = 1.73%
%Δ V
CE= (V
CE(2)–V
CE(1))/V
CE(1)100% = -3.42%
Analysis of a Emitter bias Circuit

30. An-NajahNational University
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Transistor Bias Circuits
Collector-feedback bias.
Analysis of Collector-feedback Circuit
The base resistor is connected to the collector rather than to V
CC(as in the base bias
arrangement).
Collector voltage provides the bias for the base-emitter junction.
The negative feedback creates an offsetting effect that tends to keep the Q-point stable.
If I
Cincreases, it drops more voltage across R
C, thus causing V
Cto decrease.
When V
Cdecreases, there is a decrease in voltage across R
B, which decreases I
B.
The decrease in I
Bproduces less I
C which, in turn, drops less voltage across R
C
and thus offsets the decrease in V
C

31. An-NajahNational University
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Transistor Bias Circuits
Collector-feedback bias.
Analysis of Collector-feedback Circuit
We can find I
B by: I
B= (V
C–V
BE)/R
B
Assume I
C>>I
B. Thus V
C≈ V
CC-I
CR
C
I
C/β
DC= (V
CC-I
CR
C–V
BE)/R
B
Solving for I­
C­
I
C= (V
CC–V
BE)/(R
C+R
B/β
DC)
V
CE= V
CC-I
CR
C
By making V
CC>> V
BEand R
C>> R
B/β
DC, we are eliminating the V
BE and the
β
DCdependency.

32. An-NajahNational University
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Transistor Bias Circuits
Collector-feedback bias.
Analysis of Collector-feedback Circuit

33. An-NajahNational University
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Transistor Bias Circuits
Biasing Circuit Emitter bias Voltage-Divider
Bias
Collector-feedback
bias
Base Bias
Schematic Diagram
Circuit
Recognition
A split(dual
polarity) power
supply and the base
resistor connected
to ground.
The voltage
divider in the
base circuit.
The base resistor is
connected between the
base and collector
terminals of the
transistor.
Base resistor
connected to
power, emitter
to ground.
Advantages β-independent
output values.
β-independent
(like-emitter
bias), but does
not require a
dual-polarity
power supply.
A simple circuit that
is relatively β
independent.
Simple.

34. An-NajahNational University
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Transistor Bias Circuits
Biasing Circuit Emitter bias Voltage-Divider
Bias
Collector-feedback
bias
Base Bias
Schematic Diagram
Disadvantages Requires the use of
a dual-polarity
power supply.
None (as compared
to other biasing
circuits) in
terms of dc
operation.
Poor ac
characteristics.
dependent.
Applications Used primarily to
set the dc biasing
for linear
amplifiers.
Used primarily to
bias linear
amplifiers.
Linear amplifiers Switching
applications.

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Transistor application
Logic Gates

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Electrical Engineering Department
Transistor application
Voltage indicator

37. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor problems

38. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor problems

39. An-NajahNational University
Faculty of Engineering
Electrical Engineering Department
Transistor problems