Chapter introduction to comuting 04(1).pptx

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About This Presentation

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Slide Content

Computer Organization Chapter 4

List the three subsystems of a computer . Describe the role of the central processing unit (CPU). Describe the fetch-decode-execute phases of a cycle. Describe the main memory and its addressing space . Define the input/output subsystem. Understand the interconnection of subsystems. Describe different methods of input/output addressing. Distinguish the two major trends in the design of computers . Understand how computer throughput can be improved using pipelining and parallel processing . Objectives After studying this chapter, the student should be able to:

Computer Subsystems CPU Memory I/O subsystems Subsystems Interconnections Connecting CPU and memory Connecting I/O devices Program Execution Different Architectures * CISC * RISK *Pipelining * Parallel processing CHAPTER OUTLINE

Computer Subsystems

Computer Subsystems Three broad categories make up a computer: CPU (Central Processing Unit) Main Memory I/O (Input / Output) subsystems Storage Devices

Computer Subsystems CPU (Central Processing Unit) The CPU performs operations on data. It consists three parts: ALU (Arithmetic Logic Unit) CU (Control Unit) Set of Registers

Computer Subsystems CPU (Central Processing Unit) ALU (Arithmetic Logic Unit) It performs logic, shift & arithmetic operations on data. CU (Control Unit) It controls the operation of each subsystem. Controlling is achieved through signals sent from the control unit to other subsystems. Set of Registers Registers are fast stand-alone storage locations that hold data temporarily.

Computer Subsystems CPU (Central Processing Unit) Set of Registers Multiple registers are needed to facilitate the operation of the CPU. They are categorized into three groups: Data Registers Dozens of registers to hold the intermediate results from operations. Instruction Registers (IR) Program is made of instructions to run by a computer… Instructions of a program are loaded to instruction registers to be called by CU. Program Counter (PC) It keeps tracking of the instruction currently being executed. After execution of the instructions, the counter is incremented to point the address of the next instruction in memory.

Computer Subsystems Main Memory It consists of a collection of storage locations, each with a unique identifier, called an address . Data is transferred to and from memory in groups of bits called words. A word can be a group of 8 bits, 16 bits, 32 bits or 64 bits (and growing). If the word is 8 bits, it is referred to as a byte. The term “byte” is so common in computer science that sometimes a 16-bit word is referred to as a 2-byte word, or a 32-bit word is referred to as a 4-byte word.

Computer Subsystems Main Memory Address Contents (values)

Computer Subsystems Main Memory Address space To access a word in memory, it requires an identifier. Each word is identified by an address. The total number of uniquely identifiable locations in memory is called the address space. For example, a memory with 64 kilobytes and a word size of 1 byte has an address space that ranges from 0 to 65,535.

Computer Subsystems  

Computer Subsystems Main Memory Address space This table assists to know the exact number of bytes. Memory addresses are defined using unsigned binary integers .

Computer Subsystems Main Memory Memory types can be classified into three types: RAM (Random Access Memory) SRAM ( Static RAM ) DRAM ( Dynamic RAM ) ROM (Read Only Memory) PROM ( Programmable read-only memory ) EPROM ( Erasable programmable read-only memory ) EEPROM ( Electrically erasable programmable read-only memory ) Cache memory

Computer Subsystems Main Memory RAM (Random Access Memory) It makes up most of the main memory. It hold data as long as power is on. It has two types based on its design: DRAM (Dynamic RAM) SRAM (Static RAM) Uses capacitors Uses flip-flop gates Its cells need to be refreshed periodically because capacitors lose some of its charge with time Data stored as long as the power is on there is no need to refresh memory locations Slow but inexpensive Fast but expensive. used for a computer's main memory Typically used for CPU cache T-RAM  ? Z-RAM ?

Computer Subsystems Main Memory ROM (Read Only Memory) It is written by the manufacturer & the CPU can read from. It is not like RAM, data on ROM is not lost when the power is off. One example of data that ROM keeps is boot program that runs when computer switched on. It can be found in three types: PROM ( Programmable read-only memory ) EPROM ( Erasable programmable read-only memory ) EEPROM ( Electrically erasable programmable read-only memory )

Computer Subsystems Main Memory Cache memory Cache memory is faster than main memory, but slower than the CPU and its registers. Cache memory, which is normally small in size, is placed between the CPU and main memory. The CPU always check first the cache.

Computer Subsystems Main Memory Memory hierarchy Very fast and inexpensive memory is not always possible to satisfy. A compromise needs to be made. The solution is hierarchical levels of memory.

Computer Subsystems Input / Output subsystem The collection of devices referred to as the input/output (I/O) subsystem. This subsystem allows a computer to communicate with the outside world and to store programs and data even when the power is off. Input/output devices can be divided into two broad categories: Non-storage devices Storage devices

Computer Subsystems Input / Output subsystem Non-storage devices They allow the CPU/memory to communicate with the outside world, but they cannot store information. Keyboard & monitor Printer Storage devices They store large amounts of information to be retrieved at a later time. They are cheaper than main memory, and their contents are nonvolatile—that is, not erased when the power is turned off. They are sometimes referred to as auxiliary storage devices. They can be categorized to: Magnetic devices (e.g. Hard Disk) Optical devices (e.g. CD)

Magnetic Disk Consist of one or more disks stacked on top of each other. Information is stored on and retrieved from the surface of the disk using read/write head Surface organization: Each surface  track  sector. The tracks are separated by an intertrack gap, and the sectors are separated by inter sector gap. A magnetic disk

Magnetic Disk Data access: Data can be access randomly without the need to access all other data located before it Performance: Depends on several factors Rotational speed: how fast the disk is spinning Seek time: time to move read/write head to the desired track where the data is stored. Transfer time: time to move data from the disk to the CPU/memory

Magnetic Tape The tape is mounted on two reels and uses read/write head to read or write information when the tape is passed through it. Surface organization: The width of the tape is divided into nine tracks Each location on a track can store 1 bit of information Nine vertical location can store 8 bits (1 byte) of information plus error detection. A magnetic tape

Magnetic Tape Data access: Sequential access device. The surface may be divided into blocks There is no addressing mechanism to access each block. To retrieve a specific block on the tape, we need to pass through all the previous blocks Performance: Tape is slower and cheaper than magnetic disk Today people use magnetic tape to back up large amounts of data

Optical Devices Optical storage devices use laser light to store and retrieve data. CD-ROM Creation: CD-ROM technology uses 3 steps to create large number of discs Master disk: is created using high-power laser The laser translates the bit into a sequence of pits (holes) and lands (no holes) The pits represent 0’s and the lands represent 1’s

Optical Devices Mold it is made from the master disk The pits (holes) are replaced by bumps Polycarbonate is injected into the mold to produce the same pits as the master disk A very thin layer of aluminum is added to the polycarbonate layer to provide reflective surface.

CD-RW CD-Rs can be written only once. To overwrite previous material, a new technology allows a new type of disk called compact disk rewritable (CD-RW) and sometimes called erasable optical disk Creation: same as CD-R to create disk with the following differences Instead of the dye layer, the technology uses alloy. This alloy has two stable state: crystalline (transparent) and amorphous (nontransparent) The drive uses laser to create simulated pits in the alloy

CD-RW Reading: The drive uses the same laser beam as CD-ROM and CD-R to detect pits and lands Erasing: The drive uses medium-power laser beam to change pits to lands. This beam changes state from amorphous to crystalline. Forma and Speed: format, capacity, and speed of CD-RWs are the same as CD-ROMs

CD-RW Application: CD-RW is more attractive than CD-R. However, CD-R is more popular for 2 reasons: Blank CD-R disks are less expensive than blank CD-RW disks CD-Rs are preferable in the cases where the created disk must not be changed, either accidently or intentionally

Making a CD-RW

DVD The capacity of a CD-ROM is 650 MB is insufficient to store video information Thus, there is a need for digital media with even higher capacity. The latest optical storage device is called a digital versatile disk (DVD)

DVD Creation: Uses a technology similar to CD-ROM, but with the following differences The pits are smaller The track are closer to each other The beam is a red laser instead of infrared DVDs use one to two recording layers, and it can be single-sided or double-sided Capacity: These improvement result in higher capacities as shown in the table

DVD Compression: DVD technology uses MPEG for compression. This means the single-sided layer DVD can hold 133 minutes of the video at high resolution. Application: Today, the high capacity of DVDs attracts many applications that need to store a high volume of data

Subsystems Interconnections

Subsystems Interconnections Information needs to be exchanged between the three subsystems (CPU, Memory, and I/O). The three subsystems have to communicate. How are these three subsystems interconnected? CPU and memory connections CPU and I/O connections

Subsystems Interconnections Connecting CPU and memory The CPU and memory are normally connected by three groups of connections, each called a bus: Data bus Address bus Control bus

Subsystems Interconnections Connecting CPU and memory Data bus It is made of several connections, each carrying 1 bit at a time. The number of connections depends on the size of the word used by the computer E.g. 32 bits word  32 data buses Address bus It allows access to a particular word in memory. The number of connections depends on the address space of the memory. If the memory has words, the address bus need to carry bits at a time  connections are needed.  

Subsystems Interconnections Connecting CPU and memory Control bus It carries communication between CPU & memory. E.g. there must be a code from CPU to memory to specify a read or write operation. The number of connections depends on the total number of control commands a computer needs. If a computer has control actions  connections are needed. bits can define different operations.  

Subsystems Interconnections Connecting I/O devices I/O devices cannot be connected directly to the buses that connect the CPU and memory, because the nature of I/O devices is different from the nature of CPU and memory. I/O devices are electromechanical, magnetic, or optical devices, whereas the CPU and memory are electronic devices. I/O devices also operate at a much slower speed than the CPU/memory. There is a need for some sort of intermediary to handle this difference. Input/output devices are therefore attached to the buses through input/output controllers or interfaces.

Subsystems Interconnections Connecting I/O devices

Subsystems Interconnections Connecting I/O devices Two types of controllers can be found Serial  one data connection, moving bits in serials. Parallel  several data connections, moving bits in blocks. Common kinds of I/O controllers SCSI (Small Computer System Interface) FireWire USB (Universal Serial bus) Parallel Serial Serial Need terminator high speed devices High /low speed devices Few devices number Up to 63 devices Up to 127 devices

Subsystems Interconnections Connecting I/O devices In the following photo, what type of controllers the I/O devices use?

Controller (FireWire controller) IEEE standard 1394 defines a serial interface called FireWire It is a high-speed serial interface that transfers data in packets, achieving a transfer rate of up to 50 MB/sec, or double in the most recent version It can be used to connect up to 63 devices in a daisy chain or tree connection using one connection only

FireWire controller

Controller (USB controller) Universal serial bus (USB) is a serial controller that connects both low and high-speed devices to the computer bus USB controller is referred to as a root hub USB-2 (USB version 2) allows up to 127 devices to be connected to the USB controller using a tree-like topology with the controller as the root of the tree, Hubs are the intermediate nodes, and The devices are the end nodes

USB controller

Addressing input/output devices The CPU usually uses the same bus to read data from or write data to main memory and I/O device. The only difference is the instruction. If the instruction refers to a word in main memory, data transfer is between main memory and the CPU. If the instruction identifies an I/O device, data transfer is between the I/O device and the CPU. There are two methods for handling the addressing of I/O devices: isolated I/O memory-mapped I/O.

Isolated I/O Addressing The instruction used to read/write memory are totally different from the instruction used to read/write I/O devices Each I/O devices has its own address The I/O addresses can overlap with memory addresses without any ambiguity because the instruction itself is different. Isolated I/O addressing

Memory-Mapped I/O Addressing The CPU treats each register in the I/O controller as a word in memory The CPU does not have separate instructions for transferring data from memory and I/O devices The advantage of the memory-mapped configuration is that it has a smaller number of instructions  all memory instructions can be used by I/O devices The disadvantage is that part of the memory address space is allocated to registers in I/O controllers

Memory-mapped I/O addressing
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