Computer architecture PART 1

Computer architecture MCQ's and ANSWER

1. COMPUTER ARCHITECTURE MCQ’S & ANSWERS PART – 1 Follow Us O n Instagram:- https://www.instagram.com/knowledge_center_computer/?hl=en KCC

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3. 1. The ______ format is usually used to store data. a. BCD b. Decimal c. Hexadecimal d. Octal Answer: - A 2. The 8-bit encoding format used to store data in a computer is ______ . a. ASCII b. EBCDIC c. ANCI d. USCII Answer: - B Answer: C 3. A source program is usually in _______ . a. Assembly language b. Machine level language c. High-level language d. Natural language KCC

4. 4. Which memory device is generally made of semi-conductors ? a. RAM b. Hard-disk c. Floppy disk d. Cd disk Answer: - A 5. The small extremely fast, RAM’s are called as _______ . a. Cache b. Heaps c. Accumulators d. Stacks Answer: - A Answer: - A 6. The ALU makes use of _______ to store the intermediate results . a. Accumulators b. Registers c. Heap d. Stack KCC

5. 7. The control unit controls other units by generating ____ . a. Control signals b. Timing signals c. Transfer signals d. Command Signals Answer: - B 8. ______ are numbers and encoded characters, generally used as operands . a. Input b. Data c. Information d. Stored Values Answer: - B Answer: - A 9. The Input devices can send information to the processor, a. When the SIN status flag is set b. When the data arrives regardless of the SIN flag c. Neither of the cases d. Either of the cases KCC

6. 10. ______ bus structure is usually used to connect I/O devices . a. Single b. Multiple c. Star d. Ra Answer: - A 11. In which of the following gates, the output is 1, if and only if at least one input is 1? a. NOR b. AND c. OR d. NAND Answer: - C Answer: - C 12 . The time required for a gate or inverter to change its state is called a. Rise time b. Decay time c. Propagation time d. Charging time KCC

7. 13 . The time required for a pulse to change from 10 to 90 percent of its maximum value is called a. Rise time b. Decay time c. Propagation time d. Operating speed Answer: - A 14 . The maximum frequency at which digital data can be applied to gate is called a. Operating speed b. Propagation speed c. Binary level transaction period d. Charging time Answer: - A Answer: - C 15 . What is the minimum number of two-input NAND gates used to perform the function of two input OR gate ? a. one b. two c. three d. four KCC

8. 16. Odd parity of word can beconveniently tested by a. OR gate b. AND gate c. NOR gate d. XOR gate Answer: - D 17 . Which one of the following will give the sum of full adders as output ? a. Three point majority circuit b. Three bit parity checker c. Three bit comparator d. Three bit counter Answer: - D Answer: - B 18. The number of full and half-adders required to add 16-bit numbers is a. 8 half-adders, 8 full-adders b. 1 half-adder, 15 full-adders c. 16 half-adders, 0 full-adders d. 4 half-adders, 12 full-adders KCC

9. 19. The time required for a pulse to decrease from 90 to 10 per cent of its maximum value is called a. Rise time b. Decay time c. Binary level transition period d. Propagation delay Answer: - B 20. Which of the following gates would output 1 when one input is 1 and other input is 0 ? a. OR gate b. AND gate c. NAND gate d. both a and c Answer: - D Answer: - A 21. In memory-mapped I/O… a. The I/O devices and the memory share the same address space b. The I/O devices have a seperate address space c. The memory and I/O devices have an associated address space d. A part of the memory is specifically set aside for the I/O operation KCC

10. 22. The usual BUS structure used to connect the I/O devices is a. Star BUS structure b. Multiple BUS structure c. Single BUS structure d. Node to Node BUS structure Answer: - C 23. The advantage of I/O mapped devices to memory mapped is a. The former offers faster transfer of data b. The devices connected using I/O mapping have a bigger buffer space c. The devices have to deal with fewer address lines d. No advantage as such Answer: - C KCC

11. 24. The system is notified of a read or write operation by a. Appending an extra bit of the address b. Enabling the read or write bits of the devices c. Raising an appropriate interrupt signal d. Sending a special signal along the BUS Answer: - D Answer: - B 25. To overcome the lag in the operating speeds of the I/O device and the processor we use a. Buffer spaces b. Status flags c. Interrupt signals d. Exceptions KCC

12. 26. The method of accessing the I/O devices by repeatedly checking the status flags is a. Program-controlled I/O b. Memory-mapped I/O c. I/O mapped d. None of the above Answer: - A 27. The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is a. Exceptions b. Signal handling c. Interrupts d. DMA Answer: - C Answer: - D 28 . The method which offers higher speeds of I/O transfers is a. Interrupts b. Memory mapping c. Program-controlled I/O d. DMA KCC

13. 29. The process where in the processor constantly checks the status flags is called as a. Polling b. Inspection c. Reviewing d. Echoing Answer: - A Answer: - B 30. The interrupt-request line is a part of the a. Data line b. Control line c. Address line d. None of the above KCC