Computer Organization and architecturech5.pptx

Computer Organization and architecture

1. 1 S u nd a y , A p ril 2 1 , 2 19

2. Bas i c Computer Organ i zat i on and Design Instruction Codes Computer Registers Computer Instructions Timing and Control Instruction Cycle Memory Reference Instructions Input-Output and Interrupt 2 S u nd a y , A p ril 2 1 , 2 19

3. Instruction Codes A program is a set of instructions that specify the operations, operands, and the sequence by which processing has to occur. A computer instruction is a binary code that specifies a sequence of micro-operations for the computer. An instruction code is a group of bits that instruct the computer to perform a specific operation. 3 S u nd a y , A p ril 2 1 , 2 19

4. Instruction Codes… Instruction format: Two major components of an instruction code: The operation code (opcode) Address An opcode specifies the operation for the instruction. An address specifies the registers and/or locations in memory to use for that operation Opcode Fig: Instruction Format 1 1 0 15 14 I Address 12 Addressing mode 4 S u nd a y , A p ril 2 1 , 2 19

5. Instruction Codes… Address Mode: The address field of an instruction represents Direct address: the address in memory of the data to use (the address of the operand) Indirect address: the address in memory of the address in memory of the data to use 5 S u nd a y , A p ril 2 1 , 2 19

6. Basic Computer Registers Fig: Basic Processor registers 6 S u nd a y , A p ril 2 1 , 2 19

7. Basic Computer Registers… Fig: Registers Connected to Common Bus 7 S u nd a y , A p ril 2 1 , 2 19

8. Computer Instructions o The basic computer has three instruction code formats: 8 S u nd a y , A p ril 2 1 , 2 19

9. Computer Instructions… Fig: Basic Computer Instructions 9 S u nd a y , A p ril 2 1 , 2 19

10. Computer Instructions… Instruction Types: Functional Instructions Arithmetic, logic, and shift instructions ADD, CMA, INC, CIR, CIL, AND, CLA Transfer Instructions Data transfers between the main memory and the processor registers LDA, STA Control Instructions Program sequencing and control BUN, BSA, ISZ Input/Output Instructions Input and output INP, OUT 10 S u nd a y , A p ril 2 1 , 2 19

11. T iming and Cont r ol Control Unit: Control units are implemented in one of two ways: Hardwired Control CU is made up of sequential and combinational circuits to generate the control signals Microprogrammed Control A control memory on the processor contains microprograms that activate the necessary control signals 11 S u nd a y , A p ril 2 1 , 2 19

12. T iming and Cont r ol… Fig: Control unit of Basic Computer 12 S u nd a y , A p ril 2 1 , 2 19

13. T iming and Cont r ol… o T imi n g Signal: o Example: T , T 1 , T 2 , T 3 , T 4 , T , T 1 , . . . Assume: At time T 4 , SC is cleared to if decoder output D3 is active. T0 T1 T3 T4 T0 C l o c k T0 T1 T2 T3 T4 D3 C L R SC 13 S u nd a y , A p ril 2 1 , 2 19 D 3 T 4 : SC  T2

14. Instruction Cycle In the basic computer each instruction cycle consists: Fetch an instruction from memory Decode the instruction Read the effective address from memory if the instruction has an indirect address. Execute the instruction. 14 S u nd a y , A p ril 2 1 , 2 19

15. Instruction Cycle… o Fe t ch and De c ode T0: AR  PC (S S 1 S 2 =010, T0=1) T1: IR  M [AR], PC  PC + 1 (S0S1S2=111, T1=1) T2: D0, . . . , D7  Decode IR(12-14), AR  IR(0-11), I  IR(15) 15 S u nd a y , A p ril 2 1 , 2 19

16. Instruction Cycle… o Determine the Type of Instruction D'7IT 3 : AR  M[AR] D' 7 I'T 3 : Nothing D 7 I'T 3 : Execute a register-reference instr. D 7 IT 3 : Execute an input-output instr. 16 S u nd a y , A p ril 2 1 , 2 19

17. Instruction Cycle… o Register Reference Instructions 17 S u nd a y , A p ril 2 1 , 2 19 Instruction Micro-operation Description D7l'T3: SC  Clear SC CLA D7l'T3IR(11):AC  Cl e ar AC CLE D7l'T3IR(10):E  Clear E CMA D7l'T3IR(9):AC  (AC)’ Co m ple m ent AC CME D7l'T3IR(8): E  (E)’ Complement E CIR D7l ' T3IR(7): AC  shr AC, AC(I5 )  E, E  AC(0) Circulate right CIL D7l'T3IR(6): AC  shl AC, AC(0)  E, E  AC(I5) Circulate left INC D7l'T3IR(5):AC  AC+1 Increment AC SPA D7l'T3IR(4): If (AC(I5) = 0) then (PC  PC +1) Skip if positive SNA D7l'T3IR(3): If (AC(I5) = 1) then (PC  PC +1) Skip if negative SZA D7l'T3IR(2): If (AC = 0) then (PC  PC +1) Skip if A C z e ro SZE D7l'T3IR(1): If (E = 0) then (PC  PC +1) Skip if E zero HLT D7l'T3IR(0): S  (Sis a start-stop flip-flop) Halt computer

18. Instruction Cycle… o M e mo r y R e f e r en c e Inst r ucti o n 18 S u nd a y , A p ril 2 1 , 2 19 Symbol Operation Decoder Symbolic Description AND D AC  AC  M[AR] AC  AC + M[AR], E  C out AC  M[AR] M[AR]  AC PC  AR M[AR]  PC, PC  AR + 1 M[AR]  M[AR] + 1, if M[AR] + 1 = then PC  PC+1 ADD D 1 LDA D 2 STA D 3 BUN D 4 BSA D 5 ISZ D 6 DR  M[AR] AC  AC  DR, SC  Read operand AN D with AC AND to AC D T 4 : D T 5 : ADD to AC D 1 T 4 : D 1 T 5 : DR  M[AR] Read operand AC  AC + DR, E  C out , SC  Add to AC and store carry in E

19. Instruction Cycle… o M e mo r y R e f e r en c e Instruction… LD A : Load to AC D 2 T 4 : DR  M[AR] D 2 T 5 : AC  DR, SC  S T A: Sto r e AC D 3 T 4 : M[ A R]  AC, SC  BUN: Branch Unconditionally D 4 T 4 : P C  A R , S C  BSA: Branch and Save Return Address M[AR]  PC, PC  AR + 1 D 5 T 4 : M[AR]  PC, AR  AR + 1 D 5 T 5 : PC  AR, SC  ISZ: Increment and Skip-if-Zero D 6 T 4 : DR  M[AR] D 6 T 5 : DR  DR + 1 D 6 T 4 : M[AR]  DR, if (DR = 0) then (PC  PC + 1), SC  19 S u nd a y , A p ril 2 1 , 2 19

20. Instruction Cycle… o Flow c hart For Memory R e fe r ence Instructions 20 S u nd a y , A p ril 2 1 , 2 19

21. Inpu t- output and Interrupt Input and output instructions are needed for transferring information to and from AC register. o f o r che c k i ng t h e flag b it s , and o for cont r ol l ing the in t erru p t fa c ilit y . Note: Input-output instructions have an operation code 1111 and are recognized by the control when D 7 = 1 and I = 1. 21 S u nd a y , A p ril 2 1 , 2 19

22. Input-Output and Interrupts… o Inpu t -Outp u t Instructions… D 7 IT 3 = p IR(i) = B i , i = 6, …, 11 22 S u nd a y , A p ril 2 1 , 2 19 p: p B 1 1 : p B 10 : pB 9 : pB 8 : pB 7 : pB 6 : SC  AC(0-7)  INPR, FGI  OUTR  AC(0-7), FGO  if(FGI = 1) then (PC  PC + 1) if(FGO = 1) then (PC  PC + 1) IEN  1 IEN  Clear SC INP I n p u t cha r . to AC OUT O u tput cha r . f r om AC SKI Skip on input flag SKO Skip on output flag ION Interrupt enable on IOF Interrupt enable off INPR Input register - 8 bits OUTR Output register - 8 bits FGI Input flag - 1 bit FGO Output flag - 1 bit IEN Interrupt enable - 1 bit

23. Input-Output and Interrupts… External events can force the computer to quit the normal program flow to react fast on the events. Such event that requires fast response by the computer is called interrupt . o inte r rupt r outine: The collection of instructions that have to be executed to respond to the interrupt IEN (Interrupt-enable flip-flop) can be set and cleared by instructions when cleared, the computer cannot be interrupted 23 S u nd a y , A p ril 2 1 , 2 19

24. Input-Output and Interrupts… o Flo w ch a rt f o r Inte r rupt C y cle 24 S u nd a y , A p ril 2 1 , 2 19

25. Programming the Basic Computer Introduction Machine Language Assembly Language Pro g ra m m i ng Arithmetic and L ogic Op e rations 25 S u nd a y , A p ril 2 1 , 2 19

26. Int r oduction o I n str u cti o n Set of the Basic Computer m: effective address M: memory word (operand) found at m 26 S u nd a y , A p ril 2 1 , 2 19

27. Int r odu c tion… Types of programming language: Machine language: 1’s and 0’s (Binary code), Octal, and Hexadecimal code Assembly language: symbolic Code High-level language 27 S u nd a y , A p ril 2 1 , 2 19

28. Machine Lan g uage o Comparison of Programming Languages 28 S u nd a y , A p ril 2 1 , 2 19

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