Digital Old Question Paper for Reference (Bharathiyar University)

Digital QP.pdf

1. Reg. No. :
Q.P. Code
:
[10
SC
02/11
IT
02/
319
(For
the
candidates
admitted
from
2010-2016)
B.Sc./B.C.A. DEGREE EXAMINATION,
NOVEMBER 2018.
First Semester
Part
III
Computer
Science/lnformation
Technology/
Software Systems/Computer Technologyl
Multimedia
and
Web
Technology/Computer
Applications
DIGITAL
FUNDAMENTALS
AND
ARCHITECTURE Maximum: 75 marks
Time: Three hours
Answer ALL questions.
SECTION
A-(10 x
1=
10
marks)
Choose
the
correct
answer :
Normally
digital
computers
are
based
on
AND
and
OR
gates
1.
(a)
NAND
and
NOR
gates
(b)
NOT gate
None
of
the
above
(c) (d)
11
CTG
02/11
SS
02/
11
MM
02/11
CA
02]

2. Half adder performs
2.
Decimal
addition
operation
for
2
decimal
inputs
(a) (b)
Binary
addition
operation
for
2
binary
inputs
Decimal addition
(c)
Binary
addition
operation
for
2
decimal
inputs
(d) By
3
2
(b)
1
(a)
(d) 4
3
(c)
Which
Logic
circuit
would
you
use
for
addressing
memory?
4.
Full adder
(a)
Multiplexer
b)
Decoder
(c)
Direct
memory
access
circuit
(d)
BIU stands for.
5.
Bus interface unit
(a)
Bess interface unit
(b)
(a) and (b)
(c)
None of these
(d)
319
2
operation
for
2
binary
inputs
default counters are
incremented by

3. CPU consists of
6.
ALU,
Control
Unit
and
Registers
(a)
(a)
Illustrate
the
assOCiative
memory
concept
in
detail.
ALU
and
Control
Unit
(b)
Or
ALU,
Control
Unit
and
Hard
Disk
(c) (d)
ALU,
Control
Unit
and
Monitor
Discuss
on
associative
and
set
associative
mapping.
(b)
In
the
memory
hierarchy
the
fastest
memory
is
(a) SRAM
(a)
Explain
micro
controllers
in
detail.
7.
(b) Cache
Or
(d) DRAM
Registers
(c)
(b)
Explain
the
various
addressing
modes
of
80386.
Virtual
memory
of
a
computer
system
may
be
8.
Of unlimited size
(a)
As
big
as
maximum
addressing
capability
of
the computer system
(b)
capacity of
secondary
storage
plus
size
of
RAM
Of
size
equivalent
to
total
(c)
None
of
the
above
(d) In
an
instruction
the
address
part
points
to
the
address
of
actual
data.
The
addressing
mode
is
9.
Immediate addressing
(a)
Direct addressing
(b)
Indirect addressing
(c)
None of these
319
(d)
3
319
6

4. 10.
1.
(b)
(a)
(b)
b)
The 80286 is able to address the physical memor
of
(a)
(c)
(a)
24 MB
8 MB
i)
(i1)
SECTION B (5 x 5=25 marks)
(iii)
Convert the following decimal numbers to
the bases indicated.
7562 to octal
175 to binary
(b)
1938 to hexadecimal
Or
(a) Explain the
(d)
Or
16 MB
Discuss about the parallel binary adder with
suitable diagram.
64 MB
Explain the Don't care conditions with
example.
Or
Explain the functioning of a Demultiplexer
with diagram.
4
working
asynchronous data transfer.
Distinguish between
memory mapped I/O.
principle
of
isolated I/O and
319
14.
15.
16.
17.
18.
(a)
(b)
(a)
(b)
(a)
(b)
(a)
(b)
Explain main
memory in detail.
(a)
Or
Discuss the cache
memory concept diagram. What is its need?
Explain the
architecture of 80286.
Or
Explain the basic features of 80486.
SECTION C -(5 x8= 40 marks)
Why NAND gate is called as an ur
gate? Explain with example.
Or
Explain Full and Half subtractor wi
diagram.
Minimize four variables Boolean e
using K-map method.
Or
Describe the design of the synch
counter and explain with truth table.
Explain Priority interrupt in detail.
Or
(b) Discuss on DMA controller.
5

5. Reg. No. :
5213
Q.P.
Code
:
[17
SC
01/17
CA
01/
17
IT
01/17
CTG
01/
17
SS
01/17
MM
01]
admitted
from
2017
onwards)
(For the candidates
EXAMINATION, APRIL 2019.
B.Sc./B.C.A. DEGREE
First Semester
Part
III

Computer
Science/ Computer Applications/
DIGITAL
FUNDAMENTALS
AND
COMPUTER
ARCHITECTURE
Maximum: 75 marks
Time:Three hours
SECTION
A-(10
x
1=
10
marks)
Answer
ALL
th
questions.
Choose
the
correct
answer:
number
10111101 is
1.
(b) 572
573
(d) 275
(a)
675
(c)
Information Technology
Technology/
Computer
Software Systems/
Web
and Multimedia Technology
of
the
binary
The octal equivalent

6. The
non
weighted
eode
in
(n) Oetal code
(b) Eeenn code
Grny codé
(e)
Binary code
(d) The
systematie
reduction
of
logic
circuit#
aCcomplished by
3
(a) TTL.
Using
a
truth
table
(b)
Symbolic reduction
(c)
(d) Boolean algebra
Which
one
of
the
following
gate
is
a
two-level
logic
gate
Exclusive OR
(a)
NOT gate
(b)
OR gate
(c)
NAND
(d)
5.
Tabulation
method
is
adopted
for
giving
simplified
function in
(a)
subtraction
of
product
sum of product
(b)
subtraction of sum
(c) (d)
product
of
sum
2
5213

7. The
condition
occurring
when
two
or
more
devices
try
to
write
data
to
a
bus
simulta
neously
6.
Differentiate between software
bus collisions
(a)
address multiplexing
Or
(b)
with controller DMA
address decoding
(c)
diagram.
bus contention
(b)
registers.
(d)
The
DMA
controller
has
(a)
Describe
about
set-aSsociate
7
1
(b)
3
(a)
The
bit
used
to
signify
the
updation
of
cache
location is
Or
(d)
2
(c)
technique
with necessary illustration.
8
(b) Dirty bit
Reference bit
Update bit
OCcurs.
During
a
write
operation
if
the
required
block
is
not
present
in
the
cache
then
(d)
(a)
Flag bit
(c)
9
Write latency
(b)
Write delay
Write miss
(d)
(a)
What
is
a
major
disadvantage
of
RAM?
Write hit
(c)
lts
access
speed
is
too
slow
10.
(a)
It is volatile
Its
matrix
size
is
too
big
(b)
5213
power consumption
(c)
High
3
(d)
interrupt
and
hardware interrupt with
example.
Discuss about
Feat
mapping. List
down
its
merits
and
them.
using
demerits of
direct mapping
b) Explain about

8. different
memory
in
a
computer
8ystem.
List
and
explain
about
(a)
15.
SECTION
B
-
(5
x
5
=
25
marks)
Or
Answer
ALL
the
questions.
What cache
(b)
in program execution?
11,
(a)
Perform
binary
addition,
subtraction
and
multiplication
for
the
numbers
(67,
75,
24,
5).
SECTION
C
(5
x
8
=
40
marks)
Or
Answer
ALL
the
questions.
(b) Short notes
adder.
(a)
on
l's
and
2's
complement
addition
and
subtraction
with
example.
16.
its truth
12.
(a)
Explain
about
demultiplexer
with
example.
Or
Or
Explain
Full
adder
with
its
truth
table
(b)
the follb
simplify
f(w,x,y,z)
=
I(3,
5,
7,
8,
10,
1l1,
12,
13).
K-map
Using
(a)
17.
(b)
Describe
the
working
principle
of
counters.
What
is
strobe
control?
Explain.
(a)
13.
Or
Or
(b)
With
neat
sketch,
explain
the
operations
the
JK
flip
flop.
(b)
How
is
an
interface
useful
in
data
transfer?
Discus
about
the
differences
between
0
and memory bus.
18. (a)
4.
(a)
Explain
about
priority
interrupts
with
example.
Or
How
many
128
x
8
RAM
chips
are
needel
provide
a
memory
capacity
of
2048
byt
Explain.
(b)
Or
(b)
Short
notes
on
DMA
transfer.
5
5213
4
is
memory?
How
are
they
circuit
the Draw of
BCD Explain v
table.

9. Reg. No.
3346
2P.
Code :
[23
SC
02|
from 2023
NOVEMBER 2023
First Semester
Part III
Computer Science/Computer
Application/Computer Technology/Software
Systemn/Multimedia
and
Web
Technology/Information
Technology/Hardware Systems and
Networking/Computer
Science
and
Application
DIGITAL
FUNDAMENTALS
AND
COMPUTER
ARCHITECTURE
Time :Three hours
Maximum :75 marks
SECTION
A
(10
x
1=
10
mnarks)
Answer
ALL
the
questions.
Choose
the
correct
answer
State
1.
(B35)16?
(b) (4564)8
(6454)8
(a)
(d) (5645)%
(5465)%
(c)
(For
the
candidates
admitted
onwards)
B.Sc./B.C.A DEGREE EXAMINATION,
the
octal
equivalent
hexa
of decimal number

10. gate?
known
(b)
(a) NAND
pass
the
signal
only
OR
2.
6.
if it has
AND
XOR
(d)
(c)
Interrupt request
(a) (b)
No Interrupt request
dependent
only
on
presernt
input?
a) Analog circuits
Interrupt
request.
from
device
request from device
(C)
(d)
A) Combinational
Flip flop
7.
(c)
its data?
Sequential circuits
d)
Non-volatile memory
(a)
Volatile memory
(b)
Cache memory
(c)
following
is
a
combinational
logic
line?
Secondary memory
(d)
(a) Demultiplexer
ln
direct
mapping
cache
organization,
the
CPU
address
is
divided
into
which
two
fields?
8.
(b) Decoder (c) Encoder
Index, code
(a)
(b)
Sequence, tag
(a)
Multiplexer
Index, tag
(c)
i
The
method
which
offers
higher
Page, table
(d)
transfer is
In
which
one
of
the
following
processors,
the
barrel
shifter
is
absent?
9.
(a) Interrupts
(b) Memory mapping
S0286
(b)
a) 80486
80386
9 Program-controlled I/O
(d)
80586
(c)
(d) DMA
3346
3
3346
2 as
Which the
universal gate is
In
daisy
chaining
device 0 will
The
output
is
No Interrupt
1 ce
which
memory
When
loses
power
is
switched
off
circuits
Which
of
the
has
2n
input
lines
and
a
single
output
circuit
that
speeds of I/O

11. 14.
(a)
Write
short
Virtual
10
is performed
Or
mapping
(b)
How
the
address
USing pages? Discuss.
which
can
be
disabled
by
the
The
interrupts
using
same
instruction
is
called
as
80486
of
15.
register
maskable
flag
(a)
the
Microprocessor.
Draw
SECTIONB
Or
of
types
various
the
out
List
(b)
(5
x
5=
25
marks)
Answer
ALL
the
questions.
Microcontrollers.
the
Represent
decimal
number
8620
in
excess-3 code.
SECTION
C(5x8=
40
marks)
Or
Answer
ALL
the
questions.
Perform
the
subtraction
with
the
following
binary
numbers
using
l's
complement
and
2's complements.
a)
16.
Draw
the
circuit
of
ia
(b)
half
subtractor
and
give
its truth table.
12
(a)
State
and
prove
Demorgan's
theorem.
11010 1101
(1)
Or
100 -110000
(i)
(6)
Show
the
logic
diagram
of
a
clocked
D
Flip
flop
with
AND
and
NOR
gates.
Or
13.
(a)
Differentiate
I/O
bus
and
memory
bus.
(b)
Draw
the
circuit
of
a
BCD
adder
and
explain
its
Or
3346
5
0)
What
are
the
problems
faced
in
strobe
based
asynchronous
input
output
synchronization?
Explain.
3346
4
memory. note on
microcontroller
(a)
External interrupt Vectored interrupt
(b)
Internal interrupt
(d) interrupt Non.
I1.
(a)
working.

12. loe
simpl1thed
expressions
in
surm
f
following Boolean function
a) Obtain
ABCD D'AC'D'++BCD'+ABCD+BCD
products for
17.
Or
working
principle
of
JK
master
with necessary steps.
slave o-flop
6)
Discuss the
parallel
priority
method
of
priority to interrupts.
18. (a)
ass1gning
Or
Explain
about
the
communication
channel
CPU
between
and
IOP
in
briefly.
A) (b)
10
(a)
Construct
with
neat
sketch,
explain
about
memory hierarchy design.
Or
(b)
Explain
about
hardware
organization
of
associative memory.
20.
(a)
With
neat
diagram
about
the
architecture
of
80286 Microprocessor.
Or
Explain
in
detail
about
the
working
Principles of Microcontroller.
b)
3346
6
the
with Flip-
Explain the

13. Reg. No.:
11 CA 02
11
CTG
02/11
SS
02/11
MM
02/
Code
:[10
SC
02/11
IT
021
1076
(For the admitted
First Semester
Part
II[
-Computer
Applications/Computer Science/lnformation Technology/Computer
Technologv/Software
Systems/Multimedia
and
Web
Technology
DIGITAL
FUNDAMENTALS
AND
ARCHITECTURE
Maximum:75 marks
Time:Three hours
SECTION
A(10
x
1=
10
marks)
Answer ALL questions.
Choose
the
correct
answer.
The
base
of
hexadecimal
number
is
1.
(b) 16
6
(a)
(d) 8
10
(c)
Q.P.
candidates
from
2010
-2016)
B.Sc./B.C.A.
DEGREE
EXAMINATION,
APRIL
2018.

14. system a
2.
10
(b)
(a) 2
(d) 6
4
(c) D
3.
divider circuit
(a)
delay switch
(b)
time delay switch
(c)
differentiator
(d)
is
used
to
eliminate
race
condition
problem.
4.
Master
Slave
J-K
flip-flop
(a)
R-S flip-flop
(b)
J-K flip-flop
(c)
None of these
(d)
gate
is
also
called
any-or-all
gate.
5.
OR
(a)
(b) AND (c) NOT
All of these
(d)
1076
2
are in binary
number The
digits of
flip-flop
is
used
as

15. 6.
the following
Page table
Explain
is
a
bidirectional
bus.
(a) address bus
(9) Memory hierarchy.
()
(b)
address
and
data
bus
data bus
(c)
Or
all
of
the
above
(d)
IIO
devices
attached
to
the
computers
are
called
7.
Discuss about
memory.
(a) kernel
of 8051
architecture
the
(b) cpu
Elaborate
(c)
block
storage device
(d)
Or
The
8.
Explain
briefly
block
diagram
of
80386
decoded
(a)
microprocessor.
(b) loaded
multiplexed
de-multiplexed
(c) (d)
bit processor.
80486 is a
(b) 8
9.
(a) 32
(d) 64
used
to
increase
the
speed
(c) 16
memory 1s
cache
10.
of processing.
Both
(a)
and
(c)
(b)
(a) virtual
(d)
secondary
1076
(c)
3
the
concept
of
virtual in detail
peripherals
with
diagram.
microcontroller
address/data
bus
in
8085
is
about

16. (a)
15.
SECTIONB-(5
x
5
=
25
marks)
Describe
the
address1ng
modes
Or
Answer ALL questions.
(b) the
1f adder
Answer ALLL questions,
(a)
Discuss
in
detail
about
parallel
16.
Or
and
its
working
principles.
Or
(b)
Convert
the
number
(725.25)s
into
equivalent
decimal
and
hexadecimal
numbers.
Discuss
State
and
prove
DeMorgan's
theorems
Discuss
on
the
following
17. (a)
12. (a)
RS flip-flop
1)
Or
(ii) Shift registers.
(b)
Write
short
notes
on
multiplexers.
Or
13.
(a)
Explain
briefly
about
I/O
interfaces.
(b)
Simplify
the
following
using
Karnaut
y
f
(A,B,C,D)
=E
(2,3,5,6,7,9,
I1.13).
Or
18.
(a)
Discuss
in
detail
about
DMA
transe
diagram.
(b)
What
is
the
difference
Or
(b)
Write
short
notes
on
the
following
(a)
Explain
briefly
about
page
replacement
algorithm.
14.
Memory bus
)
Or
Handshaking.
(ii)
(b)
Write
short
notes
on
associative
memory.
5
1076
Draw
pin
diagram
of
80486.
SECTION
C-(5
x
8:
=
40
marKa
and
give
11.
(a)
Draw
the
circuit
of
ve
its
a half
truth table.
(b)
about
BCD
adder
in
detail
between isolated and
memory
mapped
I/0?
Explain.

17. Reg. No. :
2P.
Code
:
[10
SC
02/11
IT
02I
11
CTG
02/11
SS
02/
11
MM
02/11
CA
02]
3398
(For
the
candidates
admitted
from
2010
onwards)
B.Sc.
DEGREE
EXAMINATION,
APRIL
2017.
First Semester
Part
IIIComputer
Applications/Computer Science
DIGITAL
FUNDAMENTALS
AND
ARCHITECTURE
Maximum: 75 marks
Time: Three hours
SECTION
A-
(10
x
1
=
10
marks)
Answer ALL questions.
Choose
the
correct
answer
Hexadecimal
number
F
is
equal
to
octal
number
1.
16
(b)
15
(a)
18
(d)
17
(c)
Information Technology /Computer
Technology/Software
Systems
/
Multimedia
and
Web
Technology

18. Minimum number
4
(b)
(d) 6
(a) 3 () 5
3.
Sequential
ciruits
types
Synchronous
(a)
Asynchronous
(b)
Both
(a)
&
(0)
(c)
Only (b)
In
JK
flip
flop,
if
JFK,
the
resulting
flip
flop
is
(d)
4.
referred as
T lip flop
(b)
D flip flop
SRflip flop
(a)
(d)
KJ flip flop
(c)
registers
The
DMA
controller
has
5.
4
(b)
(a) 3
(d) 1
(c) 5
The
DMA
transfer
is
initiated
by
6
(b) IIO Devices
Processors
(a)
(d) Interface
Bus
(c)
3398
2
2 input of:
NAND gates required
to
implement
t
the
function
F=
(X
+ø)
(2+
W)
is
are of

19. The
idea
of
cache
memory
is
based
7.
(a
Explain
about
the
memory
hierarchy
with
suitable illustrations.
on
the
heuristic
90-10
rule
on
the
fact
that
references
generally
tend
to
cluster
(a)
Or
(b)
the
concept
of
page
replacement
on
the
property
of
locality
of
reference
with necessary examples,
Discuss
(c)
all
of
the
above
(d)
80486
of
replacement
architecture
the
page
following
algorithms
suffers
from
Belady's
Anomaly?
Which
Explain
the
microprOcessor
with
neat
diagram.
of
8.
Or
FIFO
(a)
Discuss
about
addressing
modes
of
80386.
LIFO
(b)
(b)
LRU
Optimal replacement
(c)
Which
of
the
block
is
not
considered
as
a
block
of
architecture of 80286?
(d)
9.
Address Unit
(b)
Control Unit
Bus unit
(d)
(a)
Instruction unit
If
the
paging
unit
is
enabled,
then
it
converts
linear address into
(c)
10.
Effective Address Physical Address
(a)
Segment Base Address
(b)
Memory Address
(c)
3398
(d)
3

20. 15.
(a)
List
the
features
of
80286.
SECTIONB-(5
x5=
25
marks)
Or
Discuss
the
following
instruction
(b)
Answer ALL questions.
LTR
i)
11.
(a)
Convert
the
following
hexadecimal
to
octal
(ii) LLDT
(5A8),6
(ii) SMSW
Or
SECTION
C
(5
x
8=
40
marks)
Answer ALL questions.
(b)
Discuss
about
l's
complement
and
2's
complement with examples.
16.
(a)
Explain
the
full
subtractor
with
truth
table
and
diagram.
12.
(a)
State
the
importance
of
shift
registers
with
suitable diagram.
Or
Or
Discuss about excess-3
(b)
Discuss
about
product
of
sum
and
sum
of
product
simplifications
with
examples.
(b)
(a)
Explain
briefly
about
Boolean
algebra.
17.
13.
(a)
Write
short
note
on
isolated
memory
Or
Or
SU
about K-map with
Describe
examples.
(b)
(b)
Discuss
about
chaining
priority.
Elucidate
the
concept
of
DMA
transfer
neat diagram.
4.
18. (a)
(a)
List
the
various
types
of
main
memory
and
write
each
one
briefly.
Or
Or
Discuss
in
detail
about
the
parallel
pr
interrupt.
(b)
(b)
State
the
difference
between
cache
memory
and virtual memory.
5
3398
4
code with
examples.

21. Reg. No. :
Q.P.
Code
:
(10
SC
02/11
1T
02/
CTG
02/11
SS
02/
11 MM
4369
(For
the
candidates
admitted
from
2010
onwards)
B.Sc.
DEGREE
EXAMINATION,
NOVEMBER
2016.
First Semester
Part
III
-Computer
Applications/Computer
Science/
Information
DIGITAL
FUNDAMENTALS
AND
ARCHITECTURE
Maximum:75 marks
Time: Three hours
SECTION
A(10
x
1=
10
marks)
Answer ALL questions.
Choose
the
correct
answer
:
The
number
FF
in
hexadecimal
system
has
equivalence
in
decimal
system
to
1.
(b) 240
(a) 256
239.
(d)
255
(c)
02/11 CA 02]
Technology/Computer Technology/
Software
Systems/Multimedia
and
Web
Technology

22. 2's
complement
of
binary
number
0101
is
2.
1101
(b)
1011
(a)
1110.
(d)
1111
(c)
in
clocked
sequential
circuits
Memory elements
are called
3.
(b) Latches
Counters
(a)
Flip-Flop.
(d)
Shift Registers
(c) In
JK
flip
flop
the
function
K=
J
is
used
to
realize
4.
D flip flop
(a)
Master
Slave
flip
flop
(b)
T
(c)
SR flip flop.
(d) In
DMA
transfers,
the
required
signals
and
addresses
are
given
by
the
5.
Device Drivers
(b)
Processor
(a)
DMA
Controllers
(d)
The
program
itself.
(c)
The
return
address
from
the
interrupt-service
routine
is
stored
on
the
(b) Process Register
(a) System Heap
Processor Stack.
(d)
Memory
(c)
4369
2
flip flop

23. Generally Dynamic
7.
Describe
the
importance
of
page
table
with
examples.
(a)
(a)
has
higher
speed
consumes
(6)
Or
has
lower
cell
density
(c) (d)
needs
refreshing
circuitry.
Discuss
about
associative
cache
memory
and
direct
(b)
Cache
memory
acts
between
80286
of
8.
RAM and ROM
architecture
microprocessor
with
neat
diagram.
the
(a) Explain
(a)
CPU
and
Hard
Disk
(b)
Or
CPU and RAM
(c)
(b)
Discuss
about
80486
pin
out
with
neat
sketch.
Hard
Disk
and
RAM.
(d)
The
flags
that
are
used
for
controlling
machine
operation are called
9.
(a) status flags
(b) control flags
machine controlled flags
(c)
(d) data flags.
10.
The
segments
in
80386
real
mode
are
non-overlapped
overlapped
(a) (b)
set-associative
either
overlapped
or
non-overlapped.
(c) (d)
4369
3
4369
RAM
is
used
as
main
memory
in
a
computer
system
as
it less power
cache memory.

24. the
15. (a)
and microcontroller.
SECTION
B
(5
×
5
=
25
marks)
Or
Answer ALL questions.
Which imtetr
What is interrupt?
in critical events?
(b)
11.
(a)
Make
a
note
on
hexadecimal
system
with
suitable examples.
SECTION
C
(5
x
8=
40
marka,
Or
Answer ALL questions,.
16.
(a)
floating
point
Discuss
about
parallel
binary
adder
with
neat circuit diagram.
(b)
with suitable examples.
Describe
about
associative
and
distributive
law.
(a)
Or
12.
(b)
digital
logic
gates
wita
Or
pin
diagram
and
truth
table.
(b)
Write
short
notes
on
decoder.
Discuss
about
JK
flip
lop
with
truth
table
and
sketch.
17. (a)
Discuss
about
the
mapped
I/O.
13. (a)
Or
Or
What
do
you
meant
by
(b)
(b)
Compare
and
contrast
I/O
bus
with
memory
bus.
18.
(a)
Explain
in
detail
about
1OP
Make
a
note
on
read
operation.
(a)
14.
Or
Or
Contr.
strobe about
handshaking with
(b)
What
is
cache
memory?
Mention
its
uses.
(b)
5
4369
4
List differences between
Describe
about
Explain the
implicants'
about
prime
implicants
in
detail.
commun
neat diagram.
Discuss