Embedded and Real Time Systems Unit II.pptx

This ppt covers topic in Embedded Systems - Embedded Computing Platform Design

1. UNIT II EMBEDDED COMPUTING PLATFORM DESIGN

2. SYLLABUS The CPU Bus- Memory devices and systems – Designing with computing platforms – consumer electronics architecture – Platform- level performance analysis – Components for embedded programs- Models of programs-

3. SYLLABUS Assembly , linking and loading – Compilation techniques- Program level performance analysis – Software performance optimization – Program level energy and power analysis and optimization – Analysis and optimization of program size- Program validation and testing.

4. Basic Computing Platform

5. 1. CPU Bus Bus is the mechanism by which CPU communicates with memory and I/O devices

6. Bus Organization and Protocol 4 way handshake

7. DMA (Direct Memory Access)

8. System Bus configuration

9. AMBA BUS (Advanced Microcontroller Bus Architecture) AMBA bus supports CPU’s, memories and peripherals integrated in a system-on-silicon. AMBA specification includes 2 buses:

10. AMBA BUS

11. 2 .Memory Devices and Systems

12. Memory Device Organization

13. RANDOM ACCESS MEMORY

14. Types of DRAM

15. READ ONLY MEMORY (ROM)

16. Memory System Organization Memory chips have complex organization that allow us to make some useful optimization. Memories are usually divided into several smaller memory arrays. Channels and Banks are the two ways to add parallelism to the memory system. Channel is a connection to a group of memory components. Bank can perform accesses in parallel because each has its own memory arrays and addressing logic.

17. 3 . Designing with computing platforms

18. Beagle Board

19. Evaluation Boards

20. Choosing a Platform Hardware: CPU, Bus, Memory, Input / Output Devices Software: Run Time Components: An operating system is required to control the CPU and its multiple processes. Support Components: are critical to making use of complex hardware platforms.

21. 4. Consumer Electronics Architecture Consumer electronics refers to any device containing an electronic circuit board that is intended for everyday use by individuals. TV, digital cameras, DVD, Clock, smart phones. Most devices select features from a common menu.

22. 4. Consumer Electronics Architecture Types of functions Functional Requirements: Multimedia, Data storage and Management, Communications Non-functional Requirements: Battery operated. Should be inexpensive and provide high performance.

23. 5. Platform level Performance Analysis CPU plays very important role in design. Since any part of system can affect total system performance and slow down the system platform level performance analysis is important.

24. 5. Platform level Performance Analysis Consider the simple system – Move data from memory to CPU Read from memory Transfer over the bus to the cache Transfer from the cache to the CPU The rate at which data can be moved is known as bandwidth. Bandwidth can be increased in two ways: Increase the clock rate of the bus Increase the amount of data transferred per clock cycle

25. 5. Platform level Performance Analysis Bus Bandwidth formulas t= TP t- bus cycle counts T – bus cycles P-bus cloak period

26. 6. Components for Embedded programs Three components to write embedded programs State machine Circular buffer Queue State Machine: When inputs given to any kinds of systems, the reaction of most systems can be characterized in terms of the input received and the current state of the system

27. State machine

28. 6. Components for Embedded programs Circular Buffers and Stream Oriented Programming Circular buffer is a data structure that handles streaming data in an efficient way. Signal flow graph is used to represent different types of filtering structures.

29. 6. Components for Embedded programs Queues Queues are used whenever data may arrive and depart at unpredictable time or when variable amount of data may arrive. Queues can be built in two ways: linked list or arrays Circular buffer always has a fixed number of data elements while a queue may have a varying number of elements in it.

30. 7. Models of Program Programs are collection of instructions to execute a specific task. CDFG – control data flow graph is the fundamental model for programs. A data flow graph is a model of a program with no condition. Code segment with no condition have only one entry and exit point is known as a basic block.

31. 7. Models of Program

32. 7. Models of Program In the above code ‘X’ is having two assignments and it appears twice on the left side of an assignment. Code should be rewritten in single-assignment form, in which a variable appears only once on the left side .

33. we use two types of nodes in the graph round nodes denote operators Square nodes represent values .

34. In CDFG, we have two types of nodes: decision nodes and data flow nodes. Decision nodes are used to describe the control in a sequential program. A data flow node encapsulates a complete data flow graph to represent a basic block.

35. 8. Assembly, Linking and Loading

36. 8. Assembly, Linking and Loading

37. 8. Assembly, Linking and Loading Program may be built from many files, the final step is determining the address of instructions and data are performed by the linker. Linker will produce an executable binary file. Loader will load the program into memory for execution.

38. 9. Compilation Techniques A compiler is a special program that processes statements written in a particular language and turns them into machine language or code that a computer’s processor uses.

39. 10. Program Level Performance Analysis CPU performance is important but it will not reflect program performance. The execution time of the program varies with the input data values because those values select different execution paths in the program. The execution time of an instruction in a pipeline depends not only on that instruction but on the instruction around it in the pipeline.

40. 11. Software Performance Optimization Loop Optimization Cache Optimization

41. Loop Optimization Loop Unrolling- It helps expose parallelism that can be used by later stages of compiler. Loop Fusion-It combines two are more loops into a single loop. Loop Distribution is the opposite of loop fusion that is decomposing a single loop into multiple loops. Loop tiling breaks up a loop into a set of nested loops, with each inner loop performing the operations on a subset of the data. Array padding adds dummy data elements to a loop in order to change the layout of the array in the cache.

42. Dead Code Elimination Dead code is the code that can never be executed. Dead code elimination analyzes code for reachability and trims away dead code.

43. Induction Variable Elimination

44. Strength Reduction Y = X * 2 Can use left shift instead of multiplication by 2.

45. Cache Optimization If the cache is too small, the program runs slowly. If the cache is too large, the power consumption is high. At intermediate values the execution time and power consumption are good.

46. Program Level Energy And Power Analysis And Optimization Fast chips run hot, and controlling power consumption is an important element of increasing reliability and reducing system cost. We may be able to replace the algorithms with others that do things in clever ways that consume less power. By optimizing memory accesses we may be able to significantly reduce power. We may be able to turn off parts of the system—such as subsystems of the CPU, chips in the system, and so on when we do not need them in order to save power .

47. 12. Analysis and Optimization of Program Size The memory size of program is determined by the size of its data and instructions. Both must be considered to minimize program size. Data depends on program size Programs have many copies of the same data. Eliminating duplications lead to memory utilization.

48. 13. Program Validation and Testing Complex system need testing the ensure the system works correctly. Breaking the problem into sub problems and analyzing each sub problems Two types: Black Box: generate tests without looking at the internal structure of the program. Clear Box (White Box Test ): methods generate tests based on the program structure.

49. Clear Box Testing

50. Black Box Test