final presentation on power system analysis

power

1. An integral backstepping controller design for compensated distribution networks with rapid earth fault current limiters in bushfire prone areas Course No: EE 4130 Course Title: Technical Seminar Authors Name Naruttam Kumar Roy Tushar Kanti Roy Md Apel Mahmud Presented By Pritom Aich Roll: 1803033 Department of EEE KUET Source In Published in: IET Generation, Transmission & Distribution. Impact Factor: 5.1 DOI: 10.1049/gtd2.12576 Date of Publication: 20 June,2022 . Khulna University Of Engineering & Technology 1 of 21

2. 2 of 21 OUTLINE

3. INTRODUCTION Why integral backstepping controller for mitigating powerline bushfires? -Traditional Arc suppression devices are unable to limit the fault current immediately. -PI and PR controllers are unable to compensate the fault current fully. -Using T type inverter over H bridge to reduce stress for switch and increase efficiency. -First convergence of tracking error. Integral Backstepping controller used for RCC inverter is fast , effective and reliable than other controllers to limit the fault current 3 of 21 Motivation

4. 1 4 of 21 2 3 4 5 MODELING OF ASD WITH RCC INVERTER PROPOSED I-BSC DESIGN Comparison of I-BSC and T-BSC Simulation with various fault resistance PIL validation analysis with T-BSC,I-BSC,NT-SMC Overview of Research

5. Circuit Diagram of the propose system. 5 of 21 Fig 1:A T-type RCC inverter in a REFCL-compensated distribution substation in bushfire prone areas

6. 6 of 21 Methodology : Numerical Analysis Calculated neutral current : i N = i f + i A Σ + i B + i C Σ . i N = ( 3/ R + 1/ R f )* v A + 3 C 0* dv A /dt − ( 3 R / e A + 3 C de A /dt ) . Desired neutral current excluding fault current : i N-REF = - (3 R / e A + 3 C de A /dt) )dt= )dt where tracking error , e i =   Lyapunov function for Integral Bsc : W i =1/2( e i 2 + 𝜌𝜉 i 2 ), where 𝜌 i is a positive constant that is used for controlling the convergence speed of the error with the integral action. Lyapunov function for Traditional Bsc : W T =1/2 *e T 2 ,

7. 7 of 21 FIGURE 2: Fault current (instantaneous and rms) when the SLG fault occurs on Phase A with Rf =50 Ω Simulation &Results (a)SLG fault with RF=50 Ω Fault occurs At 0.2 sec. Inverter is activated at 0.4 sec.

8. 8 of 21 Simulation & Results FIGURE 3: Faulty phase voltage (instantaneous and rms) when the SLG fault occurs on Phase A with Rf =50 Ω Faulty voltage reduces to 2kv at .2 sec for short circuit Further reduced to 8v for I-BSC and 22v for T-BSC

9. 9 of 21 Simulation & Results FIGURE 4: Injected current (instantaneous and rms) by the RCC inverter when the SLG fault occurs on Phase A with Rf =50 Ω More stable injected current for I-BSC

10. 10 of 21 Simulation & Results FIGURE 5: Tracking error of the injected current by the RCC inverter when the SLG fault occurs on Phase A with Rf =50 Ω Less tracking error for using integral action

11. 11 of 21 Simulation & Results (b)SLG fault with RF=10 k Ω FIGURE 6: Faulty phase voltage (instantaneous and rms) when the SLG fault occurs on Phase A with Rf =10 kΩ FIGURE 7: Fault current (instantaneous and rms) when the SLG fault occurs on Phase A with Rf =10 kΩ

12. 12 of 21 Simulation & Results FIGURE 9: Tracking error of the injected current by the RCC inverter when the SLG fault occurs on Phase A with Rf = 1 0 kΩ FIGURE 8: Injected current (instantaneous and rms) by the RCC inverter when the SLG fault occurs on Phase A with Rf = 10 k Ω

13. 13 of 21 Simulation & Results (b)SLG fault with RF=26 k Ω (THE WORST VALUE!!) FIGURE 10: Faulty phase voltage (instantaneous and rms) when the SLG fault occurs on Phase A with Rf = 26 kΩ FIGURE 11: Fault current (instantaneous and rms) when the SLG fault occurs on Phase A with Rf = 26 kΩ

14. 14 of 21 Simulation & Results FIGURE 13: Tracking error of the injected current by the RCC inverter when the SLG fault occurs on Phase with Rf =26 kΩ FIGURE 12: Injected current (instantaneous and rms) by the RCC inverter when the SLG fault occurs on Phase A with Rf =26 k Ω

15. 15 of 21 PIL Platform Figure 14 :PIL simulation implementing T-BSC,I-BSC and NTSMC

16. 16 of 21 Simulation & Results (c)SLG fault with RF=500 Ω Figure 15: Faulty phase voltage (instantaneous and rms) when the SLG fault occurs on Phase A with Rf = 500 Ω Figure 16: Fault current (instantaneous and rms) when the SLG fault occurs on Phase A with Rf = 500 Ω At .4 sec The rms value of the faulty phase voltage and current drop to values lower than 750 V and 0.5 A

17. 17of 21 Simulation & Results Figure 17: Injected current (instantaneous and rms) by the RCC inverter when the SLG fault occurs on Phase A with Rf = 500 Ω

18. 18 of 21 Simulation & Results (c)SLG fault with RF=20 k Ω Figure 18: Fault current (instantaneous and rms) when the SLG fault occurs on Phase A with Rf =20kΩ

19. 19 of 21 Simulation & Results Figure 19: Faulty phase voltage (instantaneous and rms) when the SLG fault occurs on Phase A with Rf = 20k Ω I t can be found that there is no noticeable decrease in the faulty phase voltage after the fault is initiated at .2 sec as the fault current is extremely small.(i.e. 0.0005175 A for the I-BSC, 0.003326 A for the T-BSC, and 0.002549 A for the NT-SMC)

20. 20 0f 21 Simulation & Results RCC activation time(s) Simulation time(s) Voltage(v) with I-BSC Voltage(v) with T-BSC 0.085 .485 171.80 241.60 0.5 .9 53.80 60.63 2 2.4 50.14 53.88 Table 1: The rms value of the faulty phase voltage (v) for R f =50Ω at different instants Table 2: The rms value of the faulty phase voltage (v) for R f =26kΩ at different instants RCC activation time(s) Simulation time(s) Voltage(v) with I-BSC Voltage(v) with T-BSC 0.085 .485 8.05 22.92 0.5 .9 8.04 22.88 2 2.4 8.01 22.88

21. Conclusion Simulation results for all these scenarios clearly depict that the integral backstepping controller performs better than the traditional backstepping controller in terms of injecting the desired current to the neutral. T he proposed controller always ensures the fault current to a value lower than 0.5A irrespective of the fault impedance. T his approach can easily expanded for three-phase arc suppression devices with three-phase inverters. 21 of 21