Flipflop for Electronics and Communication Engineering students.pdf

Note on Flip flop for DE

1. FLIPFLOPS

2. INTRODUCTION:
•Flip–flopshavetwostablestatesandhencetheyare
bistablemultivibrators.ThetwostablestatesareHigh
(logic1)andLow(logic0).
•Theycanswitchbetweenthestatesundertheinfluenceof
acontrolsignal(clockorenable)i.e.theycan‘flip’toone
stateand‘flop’backtootherstate.
•Theyarebinarystoragedevicesbecausetheycanstore
binarydata(0or1).

3. INTRODUCTION:
•Theyarealsoknownassignalchangesensitive
deviceswhichmeanthatthechangeinthelevelof
clocksignalwillbringchangeinoutputoftheflip
flop.
•AFlip–flopworksdependingonclockpulses.
•Flipflopsarealsousedtocontrolthedigital
circuit’sfunctionality.Theycanchangethe
operationofadigitalcircuitdependingonthestate

4. CONVENTIONS
•Thetwooutputsarecomplementarytoeach
other.
•IfQis1thatissetQ’to0.
•IfQis0,resetQ’to1.(QandQ’can’tbeatthe
samestatesimultaneously.Ifithappens,itwill
violatethedefinitionoftheflip-flopandhenceis
calledundefinedcondition).

5. •Qiscalledthestateoftheflip-flopwhereasQ’
iscalledcomplementarystateoftheflip-flop.
•WhentheoutputQiseither0or1,itremains
inthatstateunlessoneormoreinputsare
excitedtoeffectthechangeontheoutput.

6. FLIP-FLOPS
3classesofflip-flops
•latches:outputsrespondimmediatelywhile
enabled(notimingcontrol)
•pulse-triggeredflip-flops:outputsresponseto
thetriggeringpulse
•edge-triggeredflip-flops:outputsresponsesto
thecontrolinputedge

7. TYPES OF FLIPFLOPS
•S-RFlip-flop
•J-K Flip-flop
•D Flip-flop
•TFlip-flop

8. S-R FLIP FLOP
•The S-R flip-flop is basicflip-flop among all the flip-
flops. All the other flip flops are developed after SR-flip-
flop.
•SR flip flop is represented as shown below

9. S-R FLIP FLOP
•Anyflipflopcanbebuildusinglogicgates.NANDandNOR
gateswereusedastheyareuniversalgates.

10. The Basic SR Flip-flop
The Basic SR Flip-flop with clock

11. Working
From the diagram it is evident that the flip flop has
mainly four states. They are
S=1, R=0 —Q=1, Q’=0
This state is also called the SET state.
S=0, R=1—Q=0, Q’=1
This state is k nown as the RESET state.
Inboththestates,theoutputsarejustcompliments
ofeachotherandthatthevalueofQfollowsthe
valueofS.

12. S=0,R=0—Q&Q’=Remember
IfboththevaluesofSandRareswitchedto0,
thenthecircuitremembersthevalueofSandRin
theirpreviousstate.
S=1,R=1—Q=0,Q’=0[Invalid]
•Thisisaninvalidstatebecausethevaluesof
bothQandQ’are0.
•Theyaresupposedtobecomplimentsofeach
other.Normally,thisstatemustbeavoided.

13. JK-FLIP FLOP
•TheJ-Kflip-flopisoperationallysimilartotheS-
Rflip-flop.
•TheJ-Kflip-flopisclockdrivenliketheclocked
S-Rflip-flop.
•ThedifferenceisthattheJ-Kflip-flopwillretain
itsoutputstatuswhentwolowsarepresentat
itsinputs.Also,whenbothinputsarehigh,the
outputswilltoggleonandoff

14. WORKING
•QandQ'arefeedbacktothepulse-steering
NANDgates.
•Noinvalidstate.
•Includeatoggle(switch)state.
•J=HIGH(andK=LOW)-aSETstate
•K=HIGH(andJ=LOW)-aRESETstate
•bothinputsLOW-anochange
•bothinputsHIGH-atoggle

15. •Togglingmeans‘Changingthenextstateoutputto
complementofthepresentstateoutput’
•Togglingwillcausetheoutputtocomplement
againandagain.
•Thiscomplementoperationcontinuesuntilthe
Clockpulsegoesbackto0.Sincethisconditionis
undesirable,wehavetofindawaytoeliminatethis
condition.
•Thisundesirablebehaviorcanbeeliminatedby
EdgetriggeringofJKflip-floporbyusingmaster
slaveJKFlip-flops.

16. JK-FLIP FLOP

17. J-K FLIP FLOP TRUTH TABLE previous values present values
clk J K Q Q’ S R Q Q’
1 0 1 1 0 0 1 0 1
0 1 0 0 0 1
1 1 0 1 0 0 0 1 0
0 1 1 0 1 0
1 0 0 1 0 0 0 1 0 previous
values
0 1 0 0 0 1
1 1 1 1 0 0 1 0 1 compliment
of previous
values
0 1 1 0 1 0

S=J.Q’
R=K.Q

18. J-K FLIP FLOP TRUTH TABLE
summary

19. D-FLIP FLOP
•single input D (data)
•D=HIGH -a SET state
•D=LOW -a RESET state
BycomparingR-S,J-K,andDflip-flopsonecan
seethattheDflip-flopneverhasanunknown
state,unliketheR-SandJ-K.
The D flip-flop is widely used. It is also known as a
"data" or "delay" flip-flop and negative edge
triggered flip flop.

20. D-FLIP FLOP

21. CLK D J K Q Q’
1 1 0 1 0 1
1 1 1 0 1 0
J=Q
D-FLIP FLOP TRUTH TABLE

22. T-FLIP FLOP
•ATflipflopislikeJKflip-flop.
•ThesearebasicallyasingleinputversionofJK
flipflop.
•ThismodifiedformofJKflip-flopisobtainedby
connectingbothinputsJandKtogether.
•
•Thisflip-flophasonlyoneinputalongwiththe
clockinput.

23. clk T J K Q Q’ S R Q Q’
1 0 0 0 1 0 0 0 1 0 previous
values
0 1 0 0 0 1
1 1 1 1 1 0 0 1 0 1 compliment
of previous
values
0 1 1 0 1 0

24. THE USE OF FLIPFLOP
•For RegisterDevices:
Flipflopscanstoreasinglebitofdatai.e.1or0.
Registersareusedtostoremultiplebitsofdata.So
flipflopsareusedtodesignRegisters.Accordingto
digitalelectronics,aRegisterisadevicewhichis
usedtostoretheinformation.
•Data Transfer
The process of transferring the data from one
register to another register