Introduction to 8085 Microprocessors
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Oct 06, 2021
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About This Presentation
To understand the basic concepts of 8085 microprocessor, microcontroller. The students will also learn about the programming methods and integration of peripherals to the micro-controller.
Slide Content
UNIT-IIi
8085 MICROPROCESSOR &
8051 MICROCONTROLLER
8085 MICROPROCESSOR &
8051 MICROCONTROLLER
LECTURE-1
INTRODUCTION
INTRODUCTION
8085 MICROPROCESSOR
The microprocessor is a semiconductor device (Integrated
Circuit) manufactured by the VLSI (Very Large Scale
Integration) technique.
It includes the Arithmetic and Logic Unit, registers and control
circuit on a single chip, to perform a function or useful task.
We can connect memory and other add-ons like keyboard,
logic circuit, etc. to the microprocessor.
The microprocessor is a semiconductor device (Integrated
Circuit) manufactured by the VLSI (Very Large Scale
Integration) technique.
It includes the Arithmetic and Logic Unit, registers and control
circuit on a single chip, to perform a function or useful task.
We can connect memory and other add-ons like keyboard,
logic circuit, etc. to the microprocessor.
8085 MICROPROCESSOR
The microprocessor then commands these devices to
act according to the program or code written in it.
Inside the microprocessor there is a Central Processing
Unit, semiconductor memories like EPROM and RAM,
input device, output device and interfacing devices.
The memories, input device, output device and
interfacing devices are called peripherals.
The popular input devices are keyboard and floppy disk
and the output devices are printer, LED/LCD displays,
CRT monitor, etc.
The microprocessor then commands these devices to
act according to the program or code written in it.
Inside the microprocessor there is a Central Processing
Unit, semiconductor memories like EPROM and RAM,
input device, output device and interfacing devices.
The memories, input device, output device and
interfacing devices are called peripherals.
The popular input devices are keyboard and floppy disk
and the output devices are printer, LED/LCD displays,
CRT monitor, etc.
8085 MICROPROCESSOR
What is the Microprocessor?
A microprocessor, sometimes called a logic chip,
is a computer processor on a microchip.
The microprocessor contains all, or most of, the
central processing unit (CPU) functions and is the
"engine" that goes into motion when you turn
your computer on.
8085 is pronounced as "eighty-eighty-five"
microprocessor. It is an 8-bit microprocessor
designed by Intel in 1977 using NMOS
technology.
A microprocessor, sometimes called a logic chip,
is a computer processor on a microchip.
The microprocessor contains all, or most of, the
central processing unit (CPU) functions and is the
"engine" that goes into motion when you turn
your computer on.
8085 is pronounced as "eighty-eighty-five"
microprocessor. It is an 8-bit microprocessor
designed by Intel in 1977 using NMOS
technology.
8051 MICROCONTROLLER
A microcontroller is a computer present in a single
integrated circuit which is dedicated to perform one
task and execute one specific application.
It contains memory, programmable input/output
peripherals as well a processor.
The Intel 8051 is an 8-bit microcontroller which
means that most available operations are limited to 8
bits.
A microcontroller is a computer present in a single
integrated circuit which is dedicated to perform one
task and execute one specific application.
It contains memory, programmable input/output
peripherals as well a processor.
The Intel 8051 is an 8-bit microcontroller which
means that most available operations are limited to 8
bits.
Why do we need to learn
8051 microcontroller?
Its not an exaggeration if I say that ,today there is no
electronic gadget on the earth which is designed
without a Microcontroller.
Ex: communication devices, digital entertainment,
portable devices etc…
8051 microcontroller?
Its not an exaggeration if I say that ,today there is no
electronic gadget on the earth which is designed
without a Microcontroller.
Ex: communication devices, digital entertainment,
portable devices etc…
APPLICATIONS OF 8051
Personal information products: Cell phone, pager,
watch, pocket recorder, calculator
Laptop components: mouse, keyboard, modem, fax
card, sound card, battery charger
Home appliances: door lock, alarm clock,
thermostat, air conditioner, TV remote, VCR, small
refrigerator, exercise equipment, washer/dryer,
microwave oven
Industrial equipment: Temperature/pressure controllers,
Counters, timers, RPM Controllers
Toys: video games, cars, dolls, etc.
Personal information products: Cell phone, pager,
watch, pocket recorder, calculator
Laptop components: mouse, keyboard, modem, fax
card, sound card, battery charger
Home appliances: door lock, alarm clock,
thermostat, air conditioner, TV remote, VCR, small
refrigerator, exercise equipment, washer/dryer,
microwave oven
Industrial equipment: Temperature/pressure controllers,
Counters, timers, RPM Controllers
Toys: video games, cars, dolls, etc.
What is the microcontroller?
A Microcontroller is a VLSI IC that contains a CPU
(Processor) along with some other peripherals like
Memory (RAM and ROM), I/O Ports,
Timers/Counters, Communication Interface, ADC,
etc.
A Microcontroller is a VLSI IC that contains a CPU
(Processor) along with some other peripherals like
Memory (RAM and ROM), I/O Ports,
Timers/Counters, Communication Interface, ADC,
etc.
MICROPROCESSOR
vs
MICROCONTROLLER
vs
MICROCONTROLLER
Thursday, October 22, 2020 Mahdi Hassanpour
CPU
General-
Purpose
Micro-
processor
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Data Bus
Address Bus
General-Purpose Microprocessor System
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
Example：Intel’s x86, Motorola’s 680x0
Many chips on mother’s board
MICROPROCESSOR
CPU
General-
Purpose
Micro-
processor
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Data Bus
Address Bus
General-Purpose Microprocessor System
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
Example：Intel’s x86, Motorola’s 680x0
Many chips on mother’s board
MICROPROCESSOR
Thursday, October 22, 2020 Mahdi Hassanpour
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Microcontroller
CPU
•A smaller computer
•On-chip RAM, ROM, I/O ports...
•Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC
16X
A single chip
MICROCONTROLLER
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Microcontroller
CPU
•A smaller computer
•On-chip RAM, ROM, I/O ports...
•Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC
16X
A single chip
MICROCONTROLLER
Thursday, October 22, 2020 Mahdi Hassanpour
Microprocessor
•CPU is stand-alone, RAM,
ROM, I/O, timer are separate
•designer can decide on the
amount of ROM, RAM and I/O
ports.
•expansive
•versatility
•general-purpose
Microcontroller
•CPU, RAM, ROM, I/O and
timer are all on a single chip
•fix amount of on-chip ROM,
RAM, I/O ports
•for applications in which cost,
power and space are critical
•single-purpose
MICROPROCESSOR vs MICROCONTROLLER
Microprocessor
•CPU is stand-alone, RAM,
ROM, I/O, timer are separate
•designer can decide on the
amount of ROM, RAM and I/O
ports.
•expansive
•versatility
•general-purpose
Microcontroller
•CPU, RAM, ROM, I/O and
timer are all on a single chip
•fix amount of on-chip ROM,
RAM, I/O ports
•for applications in which cost,
power and space are critical
•single-purpose
MICROPROCESSOR vs MICROCONTROLLER
SAliENT FEATURES
MICROPROCESSOR vs MICROCONTROLLER
8-bit data bus
16-bit address bus, which can
address upto 64KB
A 16-bit program counter
A 16-bit stack pointer
Six 8-bit registers arranged in
pairs: BC, DE, HL
Requires +5V supply to operate at
3.2 MHZ single phase clock
The maximum clock frequency
used in 8085 is 3 MHz.
It has two serial lines viz SID and
SOD.
It consists of ACC, one flag
register, 6 general purpose
registers and 2 special registers.
64K bytes on-chip program
memory (ROM)
128 bytes on-chip data memory
(RAM)
Four register banks
128 user defined software flags
8-bit bidirectional data bus
16-bit unidirectional address bus
32 general purpose registers
16 bit Timers
Three internal and two external
Interrupts
Four 8-bit ports
16-bit program counter and data
pointer
MICROPROCESSOR vs MICROCONTROLLER
8-bit data bus
16-bit address bus, which can
address upto 64KB
A 16-bit program counter
A 16-bit stack pointer
Six 8-bit registers arranged in
pairs: BC, DE, HL
Requires +5V supply to operate at
3.2 MHZ single phase clock
The maximum clock frequency
used in 8085 is 3 MHz.
It has two serial lines viz SID and
SOD.
It consists of ACC, one flag
register, 6 general purpose
registers and 2 special registers.
64K bytes on-chip program
memory (ROM)
128 bytes on-chip data memory
(RAM)
Four register banks
128 user defined software flags
8-bit bidirectional data bus
16-bit unidirectional address bus
32 general purpose registers
16 bit Timers
Three internal and two external
Interrupts
Four 8-bit ports
16-bit program counter and data
pointer
BLOCK DIAGRAM OF 8085
MICROPROCESSOR
MICROPROCESSOR
BLOCK DIAGRAM OF 8051
MICROCONTROLLER
MICROCONTROLLER
Specifications
MICROCONTROLLER vs MICROPROCESSOR
Specifications 8051 8085
Device Type It is a microcontroller. It is a microprocessor.
Timers/Counters YES
No, Need to be connected
externally.
Data bus width 8 lines 8 lines
Address Bus lines 16 16
DMA Access signals NO
YES, Has HOLD and
HLDA signals
Internal RAM, ROM YES
No, need to be connected
externally with 8085 chip,
if data and code size
requirement is more.
Programming 8051 programming 8085 programming
MICROCONTROLLER vs MICROPROCESSOR
Specifications 8051 8085
Device Type It is a microcontroller. It is a microprocessor.
Timers/Counters YES
No, Need to be connected
externally.
Data bus width 8 lines 8 lines
Address Bus lines 16 16
DMA Access signals NO
YES, Has HOLD and
HLDA signals
Internal RAM, ROM YES
No, need to be connected
externally with 8085 chip,
if data and code size
requirement is more.
Programming 8051 programming 8085 programming
LECTURE-2
ARCHITECHTURE OF 8085
ARCHITECHTURE OF 8085
ARCHITECTURE OF 8085
MICROPROCESSOR
What is the architecture of a microprocessor?
A microprocessor is a computer processor
that incorporates the functions of a central processing
unit on a single integrated circuit (IC), or at most a few
integrated circuits. ... Microprocessors combined this
into one or a few large-scale ICs.
MICROPROCESSOR
What is the architecture of a microprocessor?
A microprocessor is a computer processor
that incorporates the functions of a central processing
unit on a single integrated circuit (IC), or at most a few
integrated circuits. ... Microprocessors combined this
into one or a few large-scale ICs.
SALIENT FEATURES OF MICROPROCESSOR
8-bit data bus
16-bit address bus, which can address upto 64KB
A 16-bit program counter
A 16-bit stack pointer
Six 8-bit registers arranged in pairs: BC, DE, HL
Requires +5V supply to operate at 3.2 MHZ single phase clock
The maximum clock frequency used in 8085 is 3 MHz.
It has two serial lines viz SID and SOD.
It consists of ACC, one flag register, 6 general purpose registers and 2 special
registers
Mahdi Hassanpour
8-bit data bus
16-bit address bus, which can address upto 64KB
A 16-bit program counter
A 16-bit stack pointer
Six 8-bit registers arranged in pairs: BC, DE, HL
Requires +5V supply to operate at 3.2 MHZ single phase clock
The maximum clock frequency used in 8085 is 3 MHz.
It has two serial lines viz SID and SOD.
It consists of ACC, one flag register, 6 general purpose registers and 2 special
registers
Mahdi Hassanpour
FUNCTIONAL BLOCKS OF 8085
It consists of various functional blocks as listed below :
Registers
Arithmetic and Logic Unit
Instruction decoder and machine cycle encoder
Address buffer
Address/Data buffer
Incrementer/Decrementer Address Latch
Interrupt control
Serial I/O control
Timing and control circuitry.
It consists of various functional blocks as listed below :
Registers
Arithmetic and Logic Unit
Instruction decoder and machine cycle encoder
Address buffer
Address/Data buffer
Incrementer/Decrementer Address Latch
Interrupt control
Serial I/O control
Timing and control circuitry.
ARCHITECTURE OF 8085 MICROPROCESSOR
REGISTERS
It has eight addressable 8-bit registers : A, B,
C, D, E, H, L, F, and two 16-bit registers PC and SP.
These registers can be classified as:
I.General Purpose Registers
II.Temporary Registers:
a) Temporary data register
b) W and Z registers
III. Special Purpose Registers:
a) Accumulator
b) Flag registers
c) Instruction register
IV. Sixteen bit Registers:
a) Program counter(PC)
b) Stack Pointer (SP)
It has eight addressable 8-bit registers : A, B,
C, D, E, H, L, F, and two 16-bit registers PC and SP.
These registers can be classified as:
I.General Purpose Registers
II.Temporary Registers:
a) Temporary data register
b) W and Z registers
III. Special Purpose Registers:
a) Accumulator
b) Flag registers
c) Instruction register
IV. Sixteen bit Registers:
a) Program counter(PC)
b) Stack Pointer (SP)
1.GENERAL PURPOSE REGISTERS
B, C, D, E, H, and L are 8-bit general purpose registers can be
used as a separate 8-bit registers or as 16-bit register pairs, BC,
DE, and HL.
When used in register pair mode, the high order byte resides in
the first register (i.e. in B when BC is used as a register pair) and
the low order byte in the second (i.e. in C when BC is used as a
register pair).
HL pair also functions as a data pointer or memory pointer. These
are also called scratchpad registers, as user can store data in
them.
To store and read data from these registers bus access is not
required, it is an internal operation.
Thus it provides an efficient way to store intermediate results and
use them when required.
The efficient programmer prefers to use these registers to store
intermediate results than the memory locations which require bus
access and hence more time to perform the operation.
B, C, D, E, H, and L are 8-bit general purpose registers can be
used as a separate 8-bit registers or as 16-bit register pairs, BC,
DE, and HL.
When used in register pair mode, the high order byte resides in
the first register (i.e. in B when BC is used as a register pair) and
the low order byte in the second (i.e. in C when BC is used as a
register pair).
HL pair also functions as a data pointer or memory pointer. These
are also called scratchpad registers, as user can store data in
them.
To store and read data from these registers bus access is not
required, it is an internal operation.
Thus it provides an efficient way to store intermediate results and
use them when required.
The efficient programmer prefers to use these registers to store
intermediate results than the memory locations which require bus
access and hence more time to perform the operation.
2.TEMPORARY REGISTERS
(a) Temporary Data Register : The ALU has two inputs.
One input is supplied by the accumulator and other from
temporary data register. The programmer can not access this
temporary data register. However, it is internally used for
execution of most of the arithmetic and logical instructions
(b) W and Z registers : W and Z registers are temporary
registers. These registers are used to hold 8-bit data during
execution of some instructions. These registers are not
available for programmer, since 8085 Microprocessor
Architecture uses them internally.
(a) Temporary Data Register : The ALU has two inputs.
One input is supplied by the accumulator and other from
temporary data register. The programmer can not access this
temporary data register. However, it is internally used for
execution of most of the arithmetic and logical instructions
(b) W and Z registers : W and Z registers are temporary
registers. These registers are used to hold 8-bit data during
execution of some instructions. These registers are not
available for programmer, since 8085 Microprocessor
Architecture uses them internally.
3.SPECIAL PURPOSE REGISTERS
(a) Register A (Accumulator) : It is a tri-state eight bit
register. It is extensively used in arithmetic, logic, load, and
store operations, as well as in, input/output (I/O) Most of the
times the result of arithmetic and logical operations is stored in
the reg
b) Instruction Register : In a typical processor operation, the
processor first fetches the opcode of instruction from memory
The CPU stores this opcode in a register called the instruction
register. This opcode is further sent to the instruction decoder
to select one of the 256 alternatives.
(a) Register A (Accumulator) : It is a tri-state eight bit
register. It is extensively used in arithmetic, logic, load, and
store operations, as well as in, input/output (I/O) Most of the
times the result of arithmetic and logical operations is stored in
the reg
b) Instruction Register : In a typical processor operation, the
processor first fetches the opcode of instruction from memory
The CPU stores this opcode in a register called the instruction
register. This opcode is further sent to the instruction decoder
to select one of the 256 alternatives.
3.SPECIAL PURPOSE REGISTERS
c) Flag Register : It is an 8-bit register having five
1-bit flip-flops, which holds either 0 or 1 depending
upon the result stored in the accumulator.
These are the set of 5 flip-flops −
Sign (S)
Zero (Z)
Auxiliary Carry (AC)
Parity (P)
Carry (C)
c) Flag Register : It is an 8-bit register having five
1-bit flip-flops, which holds either 0 or 1 depending
upon the result stored in the accumulator.
These are the set of 5 flip-flops −
Sign (S)
Zero (Z)
Auxiliary Carry (AC)
Parity (P)
Carry (C)
3.SPECIAL PURPOSE REGISTERS
c) Flag Register :
Sign flag (S): when the result of ALU operation is negative sign
flag is set. If the result is positive, then sign flag is reset. i. e. the
D7 bit of accumulator is copied into the sign flag, as D7 anyhow
contains sign.
Zero flag (Z): when the result of ALU operation is zero, Zero
flag is set. If the result is non-zero then flag is reset.
Auxiliary carry (AC): If an ALU operation results in carry from
lower nibble to upper nibble (or) bit D3 to bit D4, Auxiliary flag
is set. Else it is reset. This flag is used in BCD arithmetic.
Parity flag (P): If the result contains even number of ones, the
flag is set else it is reset. So the parity flag is odd parity bit.
Carry flag (CY): If the arithmetic operation results in carry, CY
flag is set, else it is reset.
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
Its bit position is shown in the following table −
c) Flag Register :
Sign flag (S): when the result of ALU operation is negative sign
flag is set. If the result is positive, then sign flag is reset. i. e. the
D7 bit of accumulator is copied into the sign flag, as D7 anyhow
contains sign.
Zero flag (Z): when the result of ALU operation is zero, Zero
flag is set. If the result is non-zero then flag is reset.
Auxiliary carry (AC): If an ALU operation results in carry from
lower nibble to upper nibble (or) bit D3 to bit D4, Auxiliary flag
is set. Else it is reset. This flag is used in BCD arithmetic.
Parity flag (P): If the result contains even number of ones, the
flag is set else it is reset. So the parity flag is odd parity bit.
Carry flag (CY): If the arithmetic operation results in carry, CY
flag is set, else it is reset.
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
Its bit position is shown in the following table −
Arithmetic Logic Unit (ALU)
The 8085’s ALU performs arithmetic and
logical functions on eight bit variables.
The arithmetic unit performs bitwise
fundamental arithmetic operations such as
addition and subtraction.
The logic unit performs logical operations such
as complement, AND, OR and EX-OR, as well
as rotate and clear.
The ALU also looks after the branching
decisions.
The 8085’s ALU performs arithmetic and
logical functions on eight bit variables.
The arithmetic unit performs bitwise
fundamental arithmetic operations such as
addition and subtraction.
The logic unit performs logical operations such
as complement, AND, OR and EX-OR, as well
as rotate and clear.
The ALU also looks after the branching
decisions.
INSTRUCTION DECODER
As mentioned earlier, the processor first fetches
the opcode of instruction from memory and stores
this opcode in the instruction register.
It is then sent to the instruction decoder. The
instruction decoder decodes it and accordingly
gives the timing and control signals which control
the register, the data buffers, ALU and external
peripheral signals (explained in later sections)
depending on the nature of the instruction.
As mentioned earlier, the processor first fetches
the opcode of instruction from memory and stores
this opcode in the instruction register.
It is then sent to the instruction decoder. The
instruction decoder decodes it and accordingly
gives the timing and control signals which control
the register, the data buffers, ALU and external
peripheral signals (explained in later sections)
depending on the nature of the instruction.
Machine cycle encoder
The 8085 Microprocessor Architecture
executes seven different types of machine
cycles.
It gives the information about which machine
cycle is currently executing in the encoded
form on the S
0, S
1 and 1O/M lines.
This task is done by machine cycle encoder.
The 8085 Microprocessor Architecture
executes seven different types of machine
cycles.
It gives the information about which machine
cycle is currently executing in the encoded
form on the S
0, S
1 and 1O/M lines.
This task is done by machine cycle encoder.
Address buffer
This is an 8-bit unidirectional buffer.
It is used to drive external high order address
bus (A
15-A
8).
It is also used to tri-state the high order address
bus under certain conditions such as reset,
hold, halt, and when address lines are not in
use.
This is an 8-bit unidirectional buffer.
It is used to drive external high order address
bus (A
15-A
8).
It is also used to tri-state the high order address
bus under certain conditions such as reset,
hold, halt, and when address lines are not in
use.
Address data buffer
This is an 8-bit bi-directional buffer.
It is used to drive multiplexed address/data
bus, i.e. low order address bus (A
7-A
0) and
data bus (D
7-D
0).
It is also used to tri-state the multiplexed
address/data bus under certain conditions such
as reset, hold, halt and when the bus is not in
use.
The address and data buffers are used to drive
external address and data buses respectively.
Due to these buffers the address and data buses
can be tri-stated when they are not in use.
This is an 8-bit bi-directional buffer.
It is used to drive multiplexed address/data
bus, i.e. low order address bus (A
7-A
0) and
data bus (D
7-D
0).
It is also used to tri-state the multiplexed
address/data bus under certain conditions such
as reset, hold, halt and when the bus is not in
use.
The address and data buffers are used to drive
external address and data buses respectively.
Due to these buffers the address and data buses
can be tri-stated when they are not in use.
Incremental/ decremental
address latch
This 16-bit register is used to
increment or decrement the contents of
program counter or stack pointer as a part
of execution of instructions related to them.
address latch
This 16-bit register is used to
increment or decrement the contents of
program counter or stack pointer as a part
of execution of instructions related to them.
Interrupt control
The processor fetches, decodes and executes
instructions in a sequence.
Sometimes it is necessary to have processor the
automatically execute one of a collection of special
routines whenever special condition exists within a
program or the microcomputer system.
The most important thing is that, after execution of the
special routine, the program control must be transferred
to the program which processor was executing before
the occurrence of the special condition.
The occurrence of this special condition is referred as
interrupt. The interrupt control block has five interrupt
inputs RST 5.5, RST 6.5, RST 7.5, TRAP and INTR
and one acknowledge signal INTA
The processor fetches, decodes and executes
instructions in a sequence.
Sometimes it is necessary to have processor the
automatically execute one of a collection of special
routines whenever special condition exists within a
program or the microcomputer system.
The most important thing is that, after execution of the
special routine, the program control must be transferred
to the program which processor was executing before
the occurrence of the special condition.
The occurrence of this special condition is referred as
interrupt. The interrupt control block has five interrupt
inputs RST 5.5, RST 6.5, RST 7.5, TRAP and INTR
and one acknowledge signal INTA
Serial i/o control
In situations like, data transmission over long
distance and communication with cassette tapes
or a CRT terminal, it is necessary to transmit
data bit by bit to reduce the cost of cabling.
In serial communication one bit is transferred at
a time over a single line.
The 8085’s serial I/O control provides two lines,
SOD and SID for serial communication.
The serial output data (SOD) line is used to send
data serially and serial input data (SID) line is
used to receive data serially.
In situations like, data transmission over long
distance and communication with cassette tapes
or a CRT terminal, it is necessary to transmit
data bit by bit to reduce the cost of cabling.
In serial communication one bit is transferred at
a time over a single line.
The 8085’s serial I/O control provides two lines,
SOD and SID for serial communication.
The serial output data (SOD) line is used to send
data serially and serial input data (SID) line is
used to receive data serially.
Timing and control circuitry
The control circuitry in the processor 8085
Microprocessor Architecture is responsible for all the
operations.
The control circuitry and hence the operations in
8085 Microprocessor Architecture are synchronized
with the help of clock signal.
Along with the control of fetching and decoding
operations and generating appropriate signals for
instruction execution, control circuitry also generates
signals required to interface external devices to the
processor, 8085 Microprocessor Architecture.
The control circuitry in the processor 8085
Microprocessor Architecture is responsible for all the
operations.
The control circuitry and hence the operations in
8085 Microprocessor Architecture are synchronized
with the help of clock signal.
Along with the control of fetching and decoding
operations and generating appropriate signals for
instruction execution, control circuitry also generates
signals required to interface external devices to the
processor, 8085 Microprocessor Architecture.
LECTURE-3
PIN CONFIGURATION OF 8085
PIN CONFIGURATION OF 8085
8085 PIN CONFIGURATION
The signals of 8085 can be classified into seven
groups according to their functions.
Power supply and frequency signals.
Data bus and address bus
Control bus
Interrupt signals
Serial I/O signals
DMA signals
Reset signals
The signals of 8085 can be classified into seven
groups according to their functions.
Power supply and frequency signals.
Data bus and address bus
Control bus
Interrupt signals
Serial I/O signals
DMA signals
Reset signals
8085 PIN CONFIGURATION
1.POWER SUPPLY AND
FREQUENCY SIGNALS
•(1) V
cc : It requires a single +5 V power supply.
•(2) V
ss : Ground reference.
•(3) X
1 and X
2 : A tuned circuit like LC, RC or
crystal is connected at these two The internal
clock generator divides oscillator frequency by 2,
therefore, to operate a system at 3 MHz, the
crystal of tuned circuit must have a frequency of
6 MHz.
•(4) CLK OUT : This signal is used as a system
clock for other devices. Its frequency is half the
oscillator frequency.
FREQUENCY SIGNALS
•(1) V
cc : It requires a single +5 V power supply.
•(2) V
ss : Ground reference.
•(3) X
1 and X
2 : A tuned circuit like LC, RC or
crystal is connected at these two The internal
clock generator divides oscillator frequency by 2,
therefore, to operate a system at 3 MHz, the
crystal of tuned circuit must have a frequency of
6 MHz.
•(4) CLK OUT : This signal is used as a system
clock for other devices. Its frequency is half the
oscillator frequency.
2. DATA BUS & ADDRESS BUS
A)DATA BUS AD
0 to AD
7 :
The 8 bit data bus (D
0 – D
7) is multiplexed with
the lower half (A
0 – A
7) of the 16 bit address bus.
During first part of the machine cycle (T
1), lower
8 bits of memory address or I/O address appear
on the bus.
During remaining part of the machine cycle (T
2
and T
3) these lines are used as a bi-directional
data bus.
A)DATA BUS AD
0 to AD
7 :
The 8 bit data bus (D
0 – D
7) is multiplexed with
the lower half (A
0 – A
7) of the 16 bit address bus.
During first part of the machine cycle (T
1), lower
8 bits of memory address or I/O address appear
on the bus.
During remaining part of the machine cycle (T
2
and T
3) these lines are used as a bi-directional
data bus.
2. DATA BUS & ADDRESS BUS
B) ADDRESS BUS A
8 to A
15 :
The upper half of the 16 bit address appears on
the address lines A
8 to A
15.
These lines are exclusively used for the most
significant 8 bits of the 16 bit address lines.
B) ADDRESS BUS A
8 to A
15 :
The upper half of the 16 bit address appears on
the address lines A
8 to A
15.
These lines are exclusively used for the most
significant 8 bits of the 16 bit address lines.
3. CONTROL AND STATUS SIGNALS
A)ALE (ADDRESS LATCH ENABLE) :
We, know that AD
0 to AD
7 lines are multiplexed and
the lower half of address (A
0 – A
7) is available only
during T
1 of the machine cycle.
This lower half of address is also necessary during
T
2 and T
3 of machine cycle to access specific
location in memory or I/O port.
This means that the lower half of an address must be
latched in T
1 of the machine cycle, so that it is
available throughout the machine cycle.
The latching of lower half of an address bus is done
by using external latch and ALE signal from 8085
Microprocessor Pin Diagram.
A)ALE (ADDRESS LATCH ENABLE) :
We, know that AD
0 to AD
7 lines are multiplexed and
the lower half of address (A
0 – A
7) is available only
during T
1 of the machine cycle.
This lower half of address is also necessary during
T
2 and T
3 of machine cycle to access specific
location in memory or I/O port.
This means that the lower half of an address must be
latched in T
1 of the machine cycle, so that it is
available throughout the machine cycle.
The latching of lower half of an address bus is done
by using external latch and ALE signal from 8085
Microprocessor Pin Diagram.
3. CONTROL AND STATUS SIGNALS
B) RD and WR :
These signals are basically used to control the
direction of the data flow between processor and
memory or I/O device/port.
A low on RD indicates that the data must be read
from the selected memory location or I/O port
via data bus.
A low on WR indicates that the data must be
written into the selected memory location or I/O
port via data bus.
B) RD and WR :
These signals are basically used to control the
direction of the data flow between processor and
memory or I/O device/port.
A low on RD indicates that the data must be read
from the selected memory location or I/O port
via data bus.
A low on WR indicates that the data must be
written into the selected memory location or I/O
port via data bus.
3. CONTROL AND STATUS SIGNALS
C) IO/M, S
0 and S
1 :
IO/M indicates whether I/O operation
or memory operation is being carried out. S
1 and
S
0 indicate the type of machine cycle in progress.
D) READY :
It is used by the microprocessor to
sense whether a peripheral is ready or not for data
transfer. If not, the processor waits. It is thus used
to synchronize slower peripherals to the
microprocessor.
C) IO/M, S
0 and S
1 :
IO/M indicates whether I/O operation
or memory operation is being carried out. S
1 and
S
0 indicate the type of machine cycle in progress.
D) READY :
It is used by the microprocessor to
sense whether a peripheral is ready or not for data
transfer. If not, the processor waits. It is thus used
to synchronize slower peripherals to the
microprocessor.
4. INTERRUPT SIGNALS
The 8085 has five hardware interrupt signals:
RST 5.5, RST 6.5, RST 7.5, TRAP and INTR.
The microprocessor recognizes interrupt
requests on these lines at the end of the current
instruction execution.
The INTA (Interrupt Acknowledge) signal is
used to indicate that the processor has
acknowledged an INTR interrupt.
The 8085 has five hardware interrupt signals:
RST 5.5, RST 6.5, RST 7.5, TRAP and INTR.
The microprocessor recognizes interrupt
requests on these lines at the end of the current
instruction execution.
The INTA (Interrupt Acknowledge) signal is
used to indicate that the processor has
acknowledged an INTR interrupt.
5. SERIAL I/O SIGNALS
A)SID (Serial I/P Data) :
This input signal is used to accept
serial data bit by bit from the external device.
B) SOD (Serial 0/P Data) :
This is an output signal which enables
the transmission of serial data bit by bit to the
external device.
A)SID (Serial I/P Data) :
This input signal is used to accept
serial data bit by bit from the external device.
B) SOD (Serial 0/P Data) :
This is an output signal which enables
the transmission of serial data bit by bit to the
external device.
6. DMA SIGNALS
A)HOLD :
This signal indicates that another
master is requesting for the use of address
bus, data bus and control bus.
B) HLDA :
This active high signal is used to
acknowledge HOLD request.
A)HOLD :
This signal indicates that another
master is requesting for the use of address
bus, data bus and control bus.
B) HLDA :
This active high signal is used to
acknowledge HOLD request.
7. RESET SIGNALS
A) RESET IN :
A low on this pin Sets the program counter to zero (0000H).
Resets the interrupt enable and HLDA flip-flops.
Tri-states the data bus, address bus and control bus. (Note :
Only during RESET is active).
Affects the contents of processor’s internal registers
randomly.
On reset, the PC sets to 0000H which causes the 8085
Microprocessor Pin Diagram to execute the first instruction
from address 0000H. For proper reset operation reset signal
must be held low for at least 3 clock cycles. The power-on
reset circuit can be used to ensure execution of first
instruction from address 0000H.
A) RESET IN :
A low on this pin Sets the program counter to zero (0000H).
Resets the interrupt enable and HLDA flip-flops.
Tri-states the data bus, address bus and control bus. (Note :
Only during RESET is active).
Affects the contents of processor’s internal registers
randomly.
On reset, the PC sets to 0000H which causes the 8085
Microprocessor Pin Diagram to execute the first instruction
from address 0000H. For proper reset operation reset signal
must be held low for at least 3 clock cycles. The power-on
reset circuit can be used to ensure execution of first
instruction from address 0000H.
7. RESET SIGNALS
B) RESET OUT :
This active high signal indicates that
processor is being reset.
This signal is synchronized to the
processor clock and it can be used to reset
other devices connected in the system.
B) RESET OUT :
This active high signal indicates that
processor is being reset.
This signal is synchronized to the
processor clock and it can be used to reset
other devices connected in the system.
LECTURE-4
ADDRESSING MODES OF
8085
ADDRESSING MODES OF
8085
INTRODUCTION
We have been studying a series of microprocessor
education and discussed about the evolution of
microprocessors, architecture, pin diagram and
signal diagrams of 8085 microprocessor.
We also discussed about how the signals helps in
processing data, storing them and executing them.
But we cannot carry out a process with a
microprocessor with only signals and instructions.
We have been studying a series of microprocessor
education and discussed about the evolution of
microprocessors, architecture, pin diagram and
signal diagrams of 8085 microprocessor.
We also discussed about how the signals helps in
processing data, storing them and executing them.
But we cannot carry out a process with a
microprocessor with only signals and instructions.
Cont..,
We need a data to operate. Every instruction has to operate
on a data.
There is a method in which the instructions address the data
to be operated.
The method of specifying the data to be operated by the
instruction is known as addressing.
Now we know what is addressing. But what are addressing
modes?
The way by which the microprocessor identifies the
operands for a particular instruction is known as
Addressing mode.
We need a data to operate. Every instruction has to operate
on a data.
There is a method in which the instructions address the data
to be operated.
The method of specifying the data to be operated by the
instruction is known as addressing.
Now we know what is addressing. But what are addressing
modes?
The way by which the microprocessor identifies the
operands for a particular instruction is known as
Addressing mode.
Addressing Modes of 8085
58
The method by which the address of source
of data or the address of destination of result
is given in the instruction is called
Addressing Modes.
The term addressing mode refers to the way
in which the operand of the instruction is
specified.
58
The method by which the address of source
of data or the address of destination of result
is given in the instruction is called
Addressing Modes.
The term addressing mode refers to the way
in which the operand of the instruction is
specified.
Addressing Modes of 8085
59
Every instruction is divided into two parts,
one part is opcode and another part is
operand.
Opcode tells the type of operation and
operand is the data on which operation is to
be performed.
The way in which operand is specified in an
instruction is called addressing mode.
59
Every instruction is divided into two parts,
one part is opcode and another part is
operand.
Opcode tells the type of operation and
operand is the data on which operation is to
be performed.
The way in which operand is specified in an
instruction is called addressing mode.
Types of Addressing Modes
60
Intel 8085 uses the following addressing
modes:
1.Immediate Addressing Mode
2.Direct Addressing Mode
3.Register Addressing Mode
4.Register Indirect Addressing Mode
5.Implied/Implict Addressing Mode
60
Intel 8085 uses the following addressing
modes:
1.Immediate Addressing Mode
2.Direct Addressing Mode
3.Register Addressing Mode
4.Register Indirect Addressing Mode
5.Implied/Implict Addressing Mode
Immediate Addressing Mode
In this mode, the operand is specified
within the instruction itself.
MVI is the operation.
05 H is the immediate data (source).
A is the destination.
MVI A, 05 H
61
Move 05 H in accumulator.
In this mode, the operand is specified
within the instruction itself.
MVI is the operation.
05 H is the immediate data (source).
A is the destination.
MVI A, 05 H
61
Move 05 H in accumulator.
Immediate Addressing Mode
EXAMPLES:
(i) MVI B 45
(move the data 45H immediately to register B)
(ii) LXI H 3050
(load H-L pair with the operand 3050H immediately)
(iii) JMP
(jump to the operand address immediately)
62
EXAMPLES:
(i) MVI B 45
(move the data 45H immediately to register B)
(ii) LXI H 3050
(load H-L pair with the operand 3050H immediately)
(iii) JMP
(jump to the operand address immediately)
62
Direct Addressing Mode
In this mode, the address of the
operand is given in the instruction
itself.
LDA is the operation.
2500 H is the address of source.
Accumulator is the destination.
LDA 2500 H
63
Load the contents of memory
location 2500 H in accumulator.
In this mode, the address of the
operand is given in the instruction
itself.
LDA is the operation.
2500 H is the address of source.
Accumulator is the destination.
LDA 2500 H
63
Load the contents of memory
location 2500 H in accumulator.
Direct Addressing Mode
EXAMPLES:
(i) LDA 2050
(load contents of memory location into accumulator A)
(ii) LHLD address
(load contents of 16-bit memory location into H-L
register pair)
(iii) IN 35
(read the data from port whose address is 01)
64
EXAMPLES:
(i) LDA 2050
(load contents of memory location into accumulator A)
(ii) LHLD address
(load contents of 16-bit memory location into H-L
register pair)
(iii) IN 35
(read the data from port whose address is 01)
64
Register Addressing Mode
In this mode, the operand is in general
purpose register.
MOV is the operation.
B is the source of data.
A is the destination.
MOV A, B
65
Move the contents of register B to
A.
In this mode, the operand is in general
purpose register.
MOV is the operation.
B is the source of data.
A is the destination.
MOV A, B
65
Move the contents of register B to
A.
Register Addressing Mode
66
EXAMPLE:
(i) MOV A, B
(move the contents of register B to register A)
(ii)ADD B
(add contents of registers A and B and store the result
in register A)
(iii) INR A
(increment the contents of register A by one)
66
EXAMPLE:
(i) MOV A, B
(move the contents of register B to register A)
(ii)ADD B
(add contents of registers A and B and store the result
in register A)
(iii) INR A
(increment the contents of register A by one)
Register Indirect Addressing
Mode
In this mode, the address of operand
is specified by a register pair.
MOV is the operation.
M is the memory location specified by
H-L register pair.
A is the destination.
MOV A, M
67
Move data from memory location
specified by H-L pair to accumulator.
Mode
In this mode, the address of operand
is specified by a register pair.
MOV is the operation.
M is the memory location specified by
H-L register pair.
A is the destination.
MOV A, M
67
Move data from memory location
specified by H-L pair to accumulator.
Register Indirect Addressing
Mode
68
EXAMPLES:
(i) MOV A, M
(move the contents of the memory location pointed
by the H-L pair to the accumulator)
(ii) LDAX B
(move contains of B-C register to the accumulator)
(iii) LXIH 9570
(load immediate the H-L pair with the address of the
location 9570)
Mode
68
EXAMPLES:
(i) MOV A, M
(move the contents of the memory location pointed
by the H-L pair to the accumulator)
(ii) LDAX B
(move contains of B-C register to the accumulator)
(iii) LXIH 9570
(load immediate the H-L pair with the address of the
location 9570)
Implied Addressing Mode
If address of source of data as well as
address of destination of result is fixed,
then there is no need to give any
operand along with the instruction.
CMA is the operation.
A is the source.
A is the destination.
CMA
69
Complement accumulator.
If address of source of data as well as
address of destination of result is fixed,
then there is no need to give any
operand along with the instruction.
CMA is the operation.
A is the source.
A is the destination.
CMA
69
Complement accumulator.
Implied Addressing Mode
EXAMPLES:
(i) CMA
(finds and stores the 1’s complement of the contains of
accumulator A in A)
(ii) RRC
(rotate accumulator A right by one bit)
(iii) RLC
(rotate accumulator A left by one bit)
70
EXAMPLES:
(i) CMA
(finds and stores the 1’s complement of the contains of
accumulator A in A)
(ii) RRC
(rotate accumulator A right by one bit)
(iii) RLC
(rotate accumulator A left by one bit)
70
LECTURE-5
INSTRUCTION SET OF 8085
INSTRUCTION SET OF 8085
INSTRUCTION SET OF 8085
An instruction is a binary pattern designed
inside a microprocessor to perform a specific
function.
The entire group of instructions, called the
instruction set, determines what functions the
microprocessor can perform.
An instruction is a binary pattern designed
inside a microprocessor to perform a specific
function.
The entire group of instructions, called the
instruction set, determines what functions the
microprocessor can perform.
INSTRUCTION SET OF 8085
These instructions can be classified
into the five functional categories. They are,
1.Data Transfer Instruction
2.Arithmetic Instructions
3.Logical Instructions
4.Branching Instructions
5.Stack, Input/output and Machine
Control Instructions
These instructions can be classified
into the five functional categories. They are,
1.Data Transfer Instruction
2.Arithmetic Instructions
3.Logical Instructions
4.Branching Instructions
5.Stack, Input/output and Machine
Control Instructions
1. DATA-TRANSFER INSTRUCTIONS
The data transfer instructions move the data
between registers (or) between memory and
registers.
These instructions copy data from source to
destination.
While copying, the contents of source are not
modified.
The data transfer instructions move the data
between registers (or) between memory and
registers.
These instructions copy data from source to
destination.
While copying, the contents of source are not
modified.
1. DATA-TRANSFER INSTRUCTIONS
S.NO INSTRUCTION DESCRIPTION EXAMPLE
1 MOV Move MOV B, C
2 MVI Move Immediate MVI B, 57H
3 LDA Load Accumulator directly from memory LDA 20H
4 STA Store Accumulator directly in memory STA 2034H
5 LHLD Load H & L registers directly from memory LHLD 2034H
6 SHLD Store H & L registers directly in memory SHLD 2034H
7 LXI Load Register Pair with Immediate data LXI B, 2034H
8 LDAX Load Accumulator from address in Register Pair LDAX B
9 STAX Store Accumulator in Address in Register Pair STAX B
10 XCHG Exchange H & L registers with D & E register XCHG
11 XTHL Exchange Top of Stack with H & L registers XTHL
NOTE: An 'X' in the name of a data transfer instruction implies that it deals
with a register pair (16-bits)
S.NO INSTRUCTION DESCRIPTION EXAMPLE
1 MOV Move MOV B, C
2 MVI Move Immediate MVI B, 57H
3 LDA Load Accumulator directly from memory LDA 20H
4 STA Store Accumulator directly in memory STA 2034H
5 LHLD Load H & L registers directly from memory LHLD 2034H
6 SHLD Store H & L registers directly in memory SHLD 2034H
7 LXI Load Register Pair with Immediate data LXI B, 2034H
8 LDAX Load Accumulator from address in Register Pair LDAX B
9 STAX Store Accumulator in Address in Register Pair STAX B
10 XCHG Exchange H & L registers with D & E register XCHG
11 XTHL Exchange Top of Stack with H & L registers XTHL
NOTE: An 'X' in the name of a data transfer instruction implies that it deals
with a register pair (16-bits)
2. ARITHMETIC GROUP INSTRUCTIONS
ARITHMETIC GROUP
The group of instructions which are used
to perform the arithmetic operations are called
arithmetic instructions
The operations to be performed in these arithmetic
group of instructions are,
Addition
Subtraction
Increment
Decrement
ARITHMETIC GROUP
The group of instructions which are used
to perform the arithmetic operations are called
arithmetic instructions
The operations to be performed in these arithmetic
group of instructions are,
Addition
Subtraction
Increment
Decrement
2. ARITHMETIC GROUP INSTRUCTIONS
S.NO INSTRUCTION DESCRIPTION EXAMPLE
AND INSTRUCTIONS
1 ADD Add to accumulator ADD B
2 ADI Add Immediate Data to Accumulator ADI 45H
3 ADC Add to Accumulator Using Carry Flag ADC B
4 ACI Add immediate data to Accumulator Using Carry ACI 45H
SUBTRACTION INSTRUCTIONS
5 SUB Subtract from Accumulator SUB B
6 SUI Subtract Immediate Data from Accumulator SUI 45H
7 SBB Subtract from Accumulator using Carry Flag SBB B
8 SBI Subtract Immediate from Accumulator Using carry Flag SBI 45H
INCREMENT & DECREMENT INSTRUCTIONS
9 INR Increment Specified Byte by One INR B
10 DCR Decrement Specified Byte by One DCR B
11 INX Increment Register Pair by One INX H
12 DCX Decrement Register Pair by One DCX H
13 DAD Add register pair to H-L Pair DAD B
S.NO INSTRUCTION DESCRIPTION EXAMPLE
AND INSTRUCTIONS
1 ADD Add to accumulator ADD B
2 ADI Add Immediate Data to Accumulator ADI 45H
3 ADC Add to Accumulator Using Carry Flag ADC B
4 ACI Add immediate data to Accumulator Using Carry ACI 45H
SUBTRACTION INSTRUCTIONS
5 SUB Subtract from Accumulator SUB B
6 SUI Subtract Immediate Data from Accumulator SUI 45H
7 SBB Subtract from Accumulator using Carry Flag SBB B
8 SBI Subtract Immediate from Accumulator Using carry Flag SBI 45H
INCREMENT & DECREMENT INSTRUCTIONS
9 INR Increment Specified Byte by One INR B
10 DCR Decrement Specified Byte by One DCR B
11 INX Increment Register Pair by One INX H
12 DCX Decrement Register Pair by One DCX H
13 DAD Add register pair to H-L Pair DAD B
3. LOGICAL GROUP INSTRUCTIONS
This group performs logical (Boolean)
operations on data in registers and memory
and on condition flags.
The logical operations are AND, OR, XOR,
Compare, Rotate and Complement
This group performs logical (Boolean)
operations on data in registers and memory
and on condition flags.
The logical operations are AND, OR, XOR,
Compare, Rotate and Complement
3. LOGICAL GROUP INSTRUCTIONS
S.NO
INSTRUCTION
DESCRIPTION
EXAMPLE
AND INSTRUCTIONS
1 ANA Logical AND with Accumulator ANA B
2 ANI Logical AND with Accumulator using Immediate Data ANI 45H
OR INSTRUCTIONS
3 ORA Logical OR with Accumulator ORA B
4 ORI Logical OR with Accumulator Using Immediate Data ORI 45H
EXCLUSIVE OR INSTRUCTIONS
5 XRA Exclusive Logical OR with Accumulator XRA B
6 XRI Exclusive OR Using Immediate Data XRI 45H
COMPARE INSTRUCTIONS
7 CMP Compare CMP B
8 CPI Compare Using Immediate Data CPI 45H
ROTATE INSTRUCTIONS
9 RLC Rotate Accumulator Left RLC
10 RRC Rotate Accumulator Right RRC
11 RAL Rotate Left Through Carry RAL
12 RAR Rotate Right Through Carry RAR
COMPLEMENT INSTRUCTIONS
13 CMA Complement Accumulator CMA
14 CMC Complement Carry Flag CMC
15 STC Set Carry Flag STC
S.NO
INSTRUCTION
DESCRIPTION
EXAMPLE
AND INSTRUCTIONS
1 ANA Logical AND with Accumulator ANA B
2 ANI Logical AND with Accumulator using Immediate Data ANI 45H
OR INSTRUCTIONS
3 ORA Logical OR with Accumulator ORA B
4 ORI Logical OR with Accumulator Using Immediate Data ORI 45H
EXCLUSIVE OR INSTRUCTIONS
5 XRA Exclusive Logical OR with Accumulator XRA B
6 XRI Exclusive OR Using Immediate Data XRI 45H
COMPARE INSTRUCTIONS
7 CMP Compare CMP B
8 CPI Compare Using Immediate Data CPI 45H
ROTATE INSTRUCTIONS
9 RLC Rotate Accumulator Left RLC
10 RRC Rotate Accumulator Right RRC
11 RAL Rotate Left Through Carry RAL
12 RAR Rotate Right Through Carry RAR
COMPLEMENT INSTRUCTIONS
13 CMA Complement Accumulator CMA
14 CMC Complement Carry Flag CMC
15 STC Set Carry Flag STC
4. BRANCH GROUP INSTRUCTIONS
The branching instructions alter normal
sequential program flow, either unconditionally
or conditionally.
S.NO
INSTRUCTION
DESCRIPTION
EXAMPLE
1 JMP Jump JMP 2034
H
2 CALL Call CALL 2034
H
3 RET Return RET
UNCODITIONAL BRANCHING INSTRUCTIONS
The branching instructions alter normal
sequential program flow, either unconditionally
or conditionally.
S.NO
INSTRUCTION
DESCRIPTION
EXAMPLE
1 JMP Jump JMP 2034
H
2 CALL Call CALL 2034
H
3 RET Return RET
UNCODITIONAL BRANCHING INSTRUCTIONS
4. BRANCH GROUP INSTRUCTIONS
CONDITIONAL BRANCHING INSTRUCTIONS
Conditional branching instructions
examine the status of one of four condition flags to
determine whether the specified branch is to be
executed. The conditions that may be specified are as
follows:
CONDITIONAL BRANCHING INSTRUCTIONS
Conditional branching instructions
examine the status of one of four condition flags to
determine whether the specified branch is to be
executed. The conditions that may be specified are as
follows:
4. BRANCH GROUP INSTRUCTIONS
CONDITIONAL BRANCHING INSTRUCTIONS
CONDITIONS DESCRIPTION STATUS FLAGS
C Carry CY = 1
NC No Carry CY = 0
P Positive S = 0
M Minus S = 1
Z Zero Z = 1
NZ No Zero Z = 0
PE Parity Even P = 1
PO Parity Odd P = 0
CONDITIONAL BRANCHING INSTRUCTIONS
CONDITIONS DESCRIPTION STATUS FLAGS
C Carry CY = 1
NC No Carry CY = 0
P Positive S = 0
M Minus S = 1
Z Zero Z = 1
NZ No Zero Z = 0
PE Parity Even P = 1
PO Parity Odd P = 0
4. BRANCH GROUP INSTRUCTIONS
Based on the above conditions, the conditional
branching instructions are specified as follows: JUMP
CONDITIONALLY
INSTRUCTIONS
CALL
CONDITIONALLY
INSTRUCTIONS
RETURN
CONDITIONALLY
INSTRUCTIONS
JC CC RC
JNC CNC RNC
JP CP RP
JM CM RM
JZ CZ RZ
JNZ CNZ RNZ
JPE CPE RPE
JPO CPO RPO
Based on the above conditions, the conditional
branching instructions are specified as follows: JUMP
CONDITIONALLY
INSTRUCTIONS
CALL
CONDITIONALLY
INSTRUCTIONS
RETURN
CONDITIONALLY
INSTRUCTIONS
JC CC RC
JNC CNC RNC
JP CP RP
JM CM RM
JZ CZ RZ
JNZ CNZ RNZ
JPE CPE RPE
JPO CPO RPO
5.STACK, INPUT/OUTPUT AND MACHINE CONTROL GROUP
STACK INSTRUCTIONS
STACK INSTRUCTIONS
The following instructions affect the
Stack and/or Stack Pointer
PUSH Push Two bytes of
Data onto the Stack
POP Pop Two Bytes of
Data off the Stack
XTHL Exchange Top of
Stack with H & L
SPHL Move content of H &
L to Stack Pointer
STACK INSTRUCTIONS
STACK INSTRUCTIONS
The following instructions affect the
Stack and/or Stack Pointer
PUSH Push Two bytes of
Data onto the Stack
POP Pop Two Bytes of
Data off the Stack
XTHL Exchange Top of
Stack with H & L
SPHL Move content of H &
L to Stack Pointer
5.STACK, INPUT/OUTPUT AND MACHINE CONTROL GROUP
STACK INSTRUCTIONS
I/O INSTRUCTIONS
• IN Initiate Input Operation
• OUT Initiate Output Operation
MACHINE CONTROL INSTRUCTIONS
•EI Enable Interrupt System
•DI Disable Interrupt System
•HLT Halt
•NOP No Operation
STACK INSTRUCTIONS
I/O INSTRUCTIONS
• IN Initiate Input Operation
• OUT Initiate Output Operation
MACHINE CONTROL INSTRUCTIONS
•EI Enable Interrupt System
•DI Disable Interrupt System
•HLT Halt
•NOP No Operation
LECTURE-6
TIMING DIAGRAM OF 8085
TIMING DIAGRAM OF 8085
INTRODUCTION
It is one of the best way to understand to
process of micro-processor/controller.
With the help of timing diagram we can
understand the working of any system, step by
step working of each instruction and its
execution, etc.
It is the graphical representation of process in
steps with respect to time.
It is one of the best way to understand to
process of micro-processor/controller.
With the help of timing diagram we can
understand the working of any system, step by
step working of each instruction and its
execution, etc.
It is the graphical representation of process in
steps with respect to time.
INTRODUCTION
The timing diagram represents the clock cycle
and duration, delay, content of address bus and
data bus, type of operation ie.
Read/write/status signals.
To know the working of 8085 microprocessor,
we should know the timing diagram of 8085
microprocessor
With help of timing diagram we can easily
calculate the execution time of instruction as
well as program.
The timing diagram represents the clock cycle
and duration, delay, content of address bus and
data bus, type of operation ie.
Read/write/status signals.
To know the working of 8085 microprocessor,
we should know the timing diagram of 8085
microprocessor
With help of timing diagram we can easily
calculate the execution time of instruction as
well as program.
What is Timing Diagram?
The timing diagram is the diagram which provides
information about the various conditions of signals
such as high/low, when a machine cycle is being
executed.
Without the knowledge of timing diagram it is not
possible to match the peripheral devices to the
microprocessors.
These peripheral devices includes memories, ports
etc. Such devices can only be matched with
microprocessors with the help of timing diagram
The timing diagram is the diagram which provides
information about the various conditions of signals
such as high/low, when a machine cycle is being
executed.
Without the knowledge of timing diagram it is not
possible to match the peripheral devices to the
microprocessors.
These peripheral devices includes memories, ports
etc. Such devices can only be matched with
microprocessors with the help of timing diagram
TIMING DIAGRAM OF 8085
Before go for timing diagram of 8085
microprocessor we should know some basic
parameters to draw timing diagram of 8085
microprocessor. Those parameters are
1.Instruction Cycle
2.Machine cycle
3.T-state.
Before go for timing diagram of 8085
microprocessor we should know some basic
parameters to draw timing diagram of 8085
microprocessor. Those parameters are
1.Instruction Cycle
2.Machine cycle
3.T-state.
TIMING DIAGRAM OF 8085
INSTRUCTION CYCLE:
Assume that the microprocessor is executing
an instruction.
Instruction cycle is nothing but the time taken
to complete the execution of that instruction by
the microprocessor.
The 8085 instruction cycle consists of 1 to 6
machine cycles.
INSTRUCTION CYCLE:
Assume that the microprocessor is executing
an instruction.
Instruction cycle is nothing but the time taken
to complete the execution of that instruction by
the microprocessor.
The 8085 instruction cycle consists of 1 to 6
machine cycles.
TIMING DIAGRAM OF 8085
MACHINE CYCLE:
Machine cycle is nothing but the time
required to complete one operation of
accessing memory, I/O.
It is also the time required to complete
one operation of acknowledging an
external request.
One machine cycle may consist of 3 to 6
T-states.
MACHINE CYCLE:
Machine cycle is nothing but the time
required to complete one operation of
accessing memory, I/O.
It is also the time required to complete
one operation of acknowledging an
external request.
One machine cycle may consist of 3 to 6
T-states.
TIMING DIAGRAM OF 8085
T-state:
T-state is nothing but one subdivision
of the operation performed in one
clock period.
These subdivisions are internal state
of the microprocessor synchronized
with system clock.
T-state:
T-state is nothing but one subdivision
of the operation performed in one
clock period.
These subdivisions are internal state
of the microprocessor synchronized
with system clock.
TIMING DIAGRAM OF 8085
Rules to identify number of machine cycles in an
instruction:
1. If an addressing mode is direct, immediate or implicit
then No. of machine cycles = No. of bytes.
2. If the addressing mode is indirect then No. of
machine cycles = No. of bytes + 1. Add +1 to the No. of
machine cycles if it is memory read/write operation.
3. If the operand is 8-bit or 16-bit address then, No. of
machine cycles = No. of bytes +1.
4. These rules are applicable to 80% of the instructions
of 8085
Rules to identify number of machine cycles in an
instruction:
1. If an addressing mode is direct, immediate or implicit
then No. of machine cycles = No. of bytes.
2. If the addressing mode is indirect then No. of
machine cycles = No. of bytes + 1. Add +1 to the No. of
machine cycles if it is memory read/write operation.
3. If the operand is 8-bit or 16-bit address then, No. of
machine cycles = No. of bytes +1.
4. These rules are applicable to 80% of the instructions
of 8085
TYPES OF MACHINE CYCLE
There are various types of machine
cycles which are classified based on
Status signals (IO/M’, S1 and S0)
Control Signals (RD’, WR’, INTA)
The different types of machine cycle
available in 8085 microprocessor are:
Opcode Fetch
Memory Read
Memory write
I/O Read
I/O Write
INTR Acknowledge
Bus Idle
There are various types of machine
cycles which are classified based on
Status signals (IO/M’, S1 and S0)
Control Signals (RD’, WR’, INTA)
The different types of machine cycle
available in 8085 microprocessor are:
Opcode Fetch
Memory Read
Memory write
I/O Read
I/O Write
INTR Acknowledge
Bus Idle
Timing Diagram is a graphical representation. It
represents the execution time taken by each
instruction in a graphical format. The execution
time is represented in T-states.
Instruction Cycle:
The time required to execute an instruction .
Machine Cycle:
The time required to access the memory or
input/output devices .
T-State:
•The machine cycle and instruction cycle takes
multiple clock periods.
•A portion of an operation carried out in one
system clock period is called as T-state.
represents the execution time taken by each
instruction in a graphical format. The execution
time is represented in T-states.
Instruction Cycle:
The time required to execute an instruction .
Machine Cycle:
The time required to access the memory or
input/output devices .
T-State:
•The machine cycle and instruction cycle takes
multiple clock periods.
•A portion of an operation carried out in one
system clock period is called as T-state.
Timing diagrams
•The 8085 microprocessor has 7 basic machine
cycle. They are
1.Op-code Fetch cycle(4T or 6T).
2.Memory read cycle (3T)
3.Memory write cycle(3T)
4.I/O read cycle(3T)
5.I/O write cycle(3T)
6.Interrupt Acknowledge cycle(6T or 12T)
7.Bus idle cycle
•The 8085 microprocessor has 7 basic machine
cycle. They are
1.Op-code Fetch cycle(4T or 6T).
2.Memory read cycle (3T)
3.Memory write cycle(3T)
4.I/O read cycle(3T)
5.I/O write cycle(3T)
6.Interrupt Acknowledge cycle(6T or 12T)
7.Bus idle cycle
1.Opcode fetch cycle(4T or 6T)
OPCODE FETCH
• The Opcode fetch cycle, fetches the instructions from memory
and delivers it to the instruction register of the
microprocessor
Opcode fetch machine cycle consists of 4 T-states.
•
T1 State:
During the T1 state, the contents of the program counter are
placed on the 16 bit address bus. The higher order 8 bits are
transferred to address bus (A8-A15) and lower order 8 bits are
transferred to multiplexed A/D (AD0-AD7) bus.
ALE (address latch enable) signal goes high. As soon as
ALE goes high, the memory latches the AD0-AD7 bus. At
the middle of the T state the ALE goes low
• The Opcode fetch cycle, fetches the instructions from memory
and delivers it to the instruction register of the
microprocessor
Opcode fetch machine cycle consists of 4 T-states.
•
T1 State:
During the T1 state, the contents of the program counter are
placed on the 16 bit address bus. The higher order 8 bits are
transferred to address bus (A8-A15) and lower order 8 bits are
transferred to multiplexed A/D (AD0-AD7) bus.
ALE (address latch enable) signal goes high. As soon as
ALE goes high, the memory latches the AD0-AD7 bus. At
the middle of the T state the ALE goes low
T2 State:
During the beginning of this state, the RD’ signal goes
low to enable memory. It is during this state, the selected
memory location is placed on D0-D7 of the Address/Data
multiplexed bus.
T3 State:
In the previous state the Opcode is placed in D0-D7 of the
A/D bus. In this state of the cycle, the Opcode of the A/D bus
is transferred to the instruction register of the
microprocessor. Now the RD’ goes high after this action and
thus disables the memory from A/D bus.
T4 State:
In this state the Opcode which was fetched from the
memory is decoded.
During the beginning of this state, the RD’ signal goes
low to enable memory. It is during this state, the selected
memory location is placed on D0-D7 of the Address/Data
multiplexed bus.
T3 State:
In the previous state the Opcode is placed in D0-D7 of the
A/D bus. In this state of the cycle, the Opcode of the A/D bus
is transferred to the instruction register of the
microprocessor. Now the RD’ goes high after this action and
thus disables the memory from A/D bus.
T4 State:
In this state the Opcode which was fetched from the
memory is decoded.
2. Memory read cycle (3T)
• These machine cycles have 3 T-states.
T1 state:
The higher order address bus (A8-A15) and lower order
address and data multiplexed (AD0-AD7) bus. ALE goes high so
that the memory latches the (AD0-AD7) so that complete 16-
bit address are available.
The mp identifies the memory read machine cycle from the
status signals IO/M’=0, S1=1, S0=0. This condition indicates the
memory read cycle.
T2 state:
Selected memory location is placed on the (D0-D7) of the A/D
multiplexed bus. RD’ goes LOW
T3 State:
The data which was loaded on the previous state is transferred
to the microprocessor. In the middle of the T3 state RD’ goes
high and disables the memory read operation. The data which
was obtained from the memory is then decoded.
•
•
•
T1 state:
The higher order address bus (A8-A15) and lower order
address and data multiplexed (AD0-AD7) bus. ALE goes high so
that the memory latches the (AD0-AD7) so that complete 16-
bit address are available.
The mp identifies the memory read machine cycle from the
status signals IO/M’=0, S1=1, S0=0. This condition indicates the
memory read cycle.
T2 state:
Selected memory location is placed on the (D0-D7) of the A/D
multiplexed bus. RD’ goes LOW
T3 State:
The data which was loaded on the previous state is transferred
to the microprocessor. In the middle of the T3 state RD’ goes
high and disables the memory read operation. The data which
was obtained from the memory is then decoded.
•
•
•
3. Memory write cycle (3T)
•These machine cycles have 3 T-states.
T1 state:
•The higher order address bus (A8-A15) and lower order
address and data multiplexed (AD0-AD7) bus. ALE goes high so
that the memory latches the (AD0-AD7) so that complete 16-
bit address are available.
The mp identifies the memory read machine cycle from the
status signals IO/M’=0, S1=0, S0=1. This condition indicates the
memory read cycle.
T2 state:
•Selected memory location is placed on the (D0-D7) of the A/D
multiplexed bus. WR’ goes LOW
T3 State:
•In the middle of the T3 state WR’ goes high and disables the
memory write operation. The data which was obtained from
the memory is then decoded.
T1 state:
•The higher order address bus (A8-A15) and lower order
address and data multiplexed (AD0-AD7) bus. ALE goes high so
that the memory latches the (AD0-AD7) so that complete 16-
bit address are available.
The mp identifies the memory read machine cycle from the
status signals IO/M’=0, S1=0, S0=1. This condition indicates the
memory read cycle.
T2 state:
•Selected memory location is placed on the (D0-D7) of the A/D
multiplexed bus. WR’ goes LOW
T3 State:
•In the middle of the T3 state WR’ goes high and disables the
memory write operation. The data which was obtained from
the memory is then decoded.
4.I/O read cycle(3T)
5.I/O write cycle(3T)
STA instruction
ex: STA 526A
ex: STA 526A
It require 4 m/c cycles
13 T states
1.opcode fetch(4T)
2.memory read(3T)
3.memory read(3T)
4.Memory
write(3T)
collected by C.Gokul AP/EEE,VCET
13 T states
1.opcode fetch(4T)
2.memory read(3T)
3.memory read(3T)
4.Memory
write(3T)
collected by C.Gokul AP/EEE,VCET
Timing diagram for IN C0H
•Fetching the Opcode DBH from the memory
4125H.
•Read the port address C0H from 4126H.
•Read the content of port C0H and send it
to the accumulator.
•Let the content of port is 5EH.
•Fetching the Opcode DBH from the memory
4125H.
•Read the port address C0H from 4126H.
•Read the content of port C0H and send it
to the accumulator.
•Let the content of port is 5EH.
collected by C.Gokul AP/EEE,VCET
It require 3 m/c
cycles 10 T states
opcode fetch(4T)
memory read(3T) I/O
read(3T)
It require 3 m/c
cycles 10 T states
opcode fetch(4T)
memory read(3T) I/O
read(3T)
collected by C.Gokul AP/EEE,VCET
OUT
instruction
Machines
Cycles(10T):
1.instruction fetch(4T)
2.memory read (3T)
3.IO write (3T)
instruction
Machines
Cycles(10T):
1.instruction fetch(4T)
2.memory read (3T)
3.IO write (3T)
Timing diagram for MVI B, 43h
•Fetching the Opcode 06H from the
memory 2000H. (OF machine cycle)
•Read (move) the data 43H from memory
2001H. (memory read)
collected by C.Gokul AP/EEE,VCET
•Fetching the Opcode 06H from the
memory 2000H. (OF machine cycle)
•Read (move) the data 43H from memory
2001H. (memory read)
collected by C.Gokul AP/EEE,VCET
collected by C.Gokul AP/EEE,VCET
INR M
ADD M
LECTURE-7
8051 MICROCONTROLLER –
BLOCK DIAGRAM &
ARCHITECTURE
8051 MICROCONTROLLER –
BLOCK DIAGRAM &
ARCHITECTURE
8051 MICROCONTROLLER
A microcontroller is a computer present in a single
integrated circuit which is dedicated to perform one
task and execute one specific application.
It contains memory, programmable input/output
peripherals as well a processor.
The Intel 8051 is an 8-bit microcontroller which
means that most available operations are limited to 8
bits.
A microcontroller is a computer present in a single
integrated circuit which is dedicated to perform one
task and execute one specific application.
It contains memory, programmable input/output
peripherals as well a processor.
The Intel 8051 is an 8-bit microcontroller which
means that most available operations are limited to 8
bits.
Why do we need to learn
8051 microcontroller?
Its not an exaggeration if I say that ,today there is no
electronic gadget on the earth which is designed
without a Microcontroller.
Ex: communication devices, digital entertainment,
portable devices etc…
8051 microcontroller?
Its not an exaggeration if I say that ,today there is no
electronic gadget on the earth which is designed
without a Microcontroller.
Ex: communication devices, digital entertainment,
portable devices etc…
APPLICATIONS OF 8051
Personal information products: Cell phone, pager,
watch, pocket recorder, calculator
Laptop components: mouse, keyboard, modem, fax
card, sound card, battery charger
Home appliances: door lock, alarm clock,
thermostat, air conditioner, TV remote, VCR, small
refrigerator, exercise equipment, washer/dryer,
microwave oven
Industrial equipment: Temperature/pressure controllers,
Counters, timers, RPM Controllers
Toys: video games, cars, dolls, etc.
Personal information products: Cell phone, pager,
watch, pocket recorder, calculator
Laptop components: mouse, keyboard, modem, fax
card, sound card, battery charger
Home appliances: door lock, alarm clock,
thermostat, air conditioner, TV remote, VCR, small
refrigerator, exercise equipment, washer/dryer,
microwave oven
Industrial equipment: Temperature/pressure controllers,
Counters, timers, RPM Controllers
Toys: video games, cars, dolls, etc.
What is the microcontroller?
A Microcontroller is a VLSI IC that contains a CPU
(Processor) along with some other peripherals like
Memory (RAM and ROM), I/O Ports,
Timers/Counters, Communication Interface, ADC,
etc.
A Microcontroller is a VLSI IC that contains a CPU
(Processor) along with some other peripherals like
Memory (RAM and ROM), I/O Ports,
Timers/Counters, Communication Interface, ADC,
etc.
Thursday, October 22, 2020 Mahdi Hassanpour
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Microcontroller
CPU
•A smaller computer
•On-chip RAM, ROM, I/O ports...
•Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC
16X
A single chip
MICROCONTROLLER
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Microcontroller
CPU
•A smaller computer
•On-chip RAM, ROM, I/O ports...
•Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC
16X
A single chip
MICROCONTROLLER
FEATURES of 8051
MICROCONTROLLER
64K bytes on-chip program memory (ROM)
128 bytes on-chip data memory (RAM)
Four register banks
128 user defined software flags
8-bit bidirectional data bus
16-bit unidirectional address bus
32 general purpose registers
16 bit Timers
Three internal and two external Interrupts
Four 8-bit ports
16-bit program counter and data pointer
MICROCONTROLLER
64K bytes on-chip program memory (ROM)
128 bytes on-chip data memory (RAM)
Four register banks
128 user defined software flags
8-bit bidirectional data bus
16-bit unidirectional address bus
32 general purpose registers
16 bit Timers
Three internal and two external Interrupts
Four 8-bit ports
16-bit program counter and data pointer
BASIC COMPONENTS OF A
MICROCONTROLLER
The difference between a Microprocessor and
a Microcontroller is the availability of the on –
chip peripherals like Memory (both RAM and
ROM), I/O Ports, Timers / Counters,
Communication Interfaces (like Serial Port),
etc.
The following image shows the basic
components of a Microcontroller. As all the
components (and a few other components) are
integrated on a single chip (Integrated Circuit
– IC), a Microcontroller can be considered as a
Microcomputer (or a Computer on – chip).
MICROCONTROLLER
The difference between a Microprocessor and
a Microcontroller is the availability of the on –
chip peripherals like Memory (both RAM and
ROM), I/O Ports, Timers / Counters,
Communication Interfaces (like Serial Port),
etc.
The following image shows the basic
components of a Microcontroller. As all the
components (and a few other components) are
integrated on a single chip (Integrated Circuit
– IC), a Microcontroller can be considered as a
Microcomputer (or a Computer on – chip).
BASIC COMPONENTS OF A
MICROCONTROLLER
MICROCONTROLLER
BLOCK DIAGRAM OF 8051
MICROCONTROLLER
MICROCONTROLLER
ADVANTAGES OF
MICROCONTROLLER
Low time required for performing operation.
The processor chips are very small and flexibility occurs.
Due to their higher integration, cost and size of the system is
reduced.
The microcontroller is easily to interface additional RAM,
ROM and I/O ports.
Once microcontrollers are programmed then they cannot be
reprogrammed.
At the same time many task can be performed so human effect
can saved.
Without any digitals parts it can be act as microcomputer.
It is easy to use, troubleshooting and systems maintain is
simple.
MICROCONTROLLER
Low time required for performing operation.
The processor chips are very small and flexibility occurs.
Due to their higher integration, cost and size of the system is
reduced.
The microcontroller is easily to interface additional RAM,
ROM and I/O ports.
Once microcontrollers are programmed then they cannot be
reprogrammed.
At the same time many task can be performed so human effect
can saved.
Without any digitals parts it can be act as microcomputer.
It is easy to use, troubleshooting and systems maintain is
simple.
DISADVANTAGES OF
MICROCONTROLLER
The microcontroller cannot interface high
power devices directly.
It has more complex structure as compared to
microprocessor.
It only performed limited number of
executions simultaneously.
It is generally used in micro equipment.
MICROCONTROLLER
The microcontroller cannot interface high
power devices directly.
It has more complex structure as compared to
microprocessor.
It only performed limited number of
executions simultaneously.
It is generally used in micro equipment.
What is the Microcontroller?
A Microcontroller is a VLSI IC that contains a CPU
(Processor) along with some other peripherals like
Memory (RAM and ROM), I/O Ports,
Timers/Counters, Communication Interface, ADC,
etc.
A Microcontroller is a VLSI IC that contains a CPU
(Processor) along with some other peripherals like
Memory (RAM and ROM), I/O Ports,
Timers/Counters, Communication Interface, ADC,
etc.
FEATURES of 8051
MICROCONTROLLER
64K bytes on-chip program memory (ROM)
128 bytes on-chip data memory (RAM)
Four register banks
128 user defined software flags
8-bit bidirectional data bus
16-bit unidirectional address bus
32 general purpose registers
16 bit Timers
Three internal and two external Interrupts
Four 8-bit ports
16-bit program counter and data pointer
MICROCONTROLLER
64K bytes on-chip program memory (ROM)
128 bytes on-chip data memory (RAM)
Four register banks
128 user defined software flags
8-bit bidirectional data bus
16-bit unidirectional address bus
32 general purpose registers
16 bit Timers
Three internal and two external Interrupts
Four 8-bit ports
16-bit program counter and data pointer
ARCHITECTURE OF 8051
ARCHITECTURE OF 8051
8051 has 4 K Bytes of internal ROM. The address
space is from 0000 to 0FFFh. If the program size is
more than 4 K Bytes 8051 will fetch the code
automatically from external memory.
Accumulator is an 8 bit register widely used for all
arithmetic and logical operations. Accumulator is also
used to transfer data between external memory. B
register is used along with Accumulator for
multiplication and division. A and B registers together is
also called MATH registers.
8051 has 4 K Bytes of internal ROM. The address
space is from 0000 to 0FFFh. If the program size is
more than 4 K Bytes 8051 will fetch the code
automatically from external memory.
Accumulator is an 8 bit register widely used for all
arithmetic and logical operations. Accumulator is also
used to transfer data between external memory. B
register is used along with Accumulator for
multiplication and division. A and B registers together is
also called MATH registers.
ARCHITECTURE OF 8051
ARCHITECTURE OF 8051
Stack Pointer (SP) – it contains the address of the data
item on the top of the stack. Stack may reside anywhere on
the internal RAM. On reset, SP is initialized to 07 so that
the default stack will start from address 08 onwards.
Data Pointer (DPTR) – DPH (Data pointer higher byte),
DPL (Data pointer lower byte). This is a 16 bit register
which is used to furnish address information for internal
and external program memory and for external data
memory.
Program Counter (PC) – 16 bit PC contains the address of
next instruction to be executed. On reset PC will set to
0000. After fetching every instruction PC will increment
by one.
Stack Pointer (SP) – it contains the address of the data
item on the top of the stack. Stack may reside anywhere on
the internal RAM. On reset, SP is initialized to 07 so that
the default stack will start from address 08 onwards.
Data Pointer (DPTR) – DPH (Data pointer higher byte),
DPL (Data pointer lower byte). This is a 16 bit register
which is used to furnish address information for internal
and external program memory and for external data
memory.
Program Counter (PC) – 16 bit PC contains the address of
next instruction to be executed. On reset PC will set to
0000. After fetching every instruction PC will increment
by one.
PIN DIAGRAM OF 8051
PIN DIAGRAM OF 8051
Pins 1 – 8:- recognized as Port 1. Different from other
ports, this port doesn’t provide any other purpose. Port 1 is
a domestically pulled up, quasi bi directional Input/output
port.
Pin 9:- As made clear previously RESET pin is utilized to
set the micro-controller 8051 to its primary values, whereas
the micro-controller is functioning or at the early beginning
of application. The RESET pin has to be set elevated for
two machine rotations.
Pins 10 – 17:- recognized as Port 3. This port also supplies
a number of other functions such as timer input, interrupts,
serial communication indicators TxD & RxD, control
indicators for outside memory interfacing WR & RD, etc.
This is a domestic pull up port with quasi bi directional port
within.
Pins 1 – 8:- recognized as Port 1. Different from other
ports, this port doesn’t provide any other purpose. Port 1 is
a domestically pulled up, quasi bi directional Input/output
port.
Pin 9:- As made clear previously RESET pin is utilized to
set the micro-controller 8051 to its primary values, whereas
the micro-controller is functioning or at the early beginning
of application. The RESET pin has to be set elevated for
two machine rotations.
Pins 10 – 17:- recognized as Port 3. This port also supplies
a number of other functions such as timer input, interrupts,
serial communication indicators TxD & RxD, control
indicators for outside memory interfacing WR & RD, etc.
This is a domestic pull up port with quasi bi directional port
within.
PIN DIAGRAM OF 8051
Pins 18 and 19:- These are employed for interfacing an
outer crystal to give system clock.
Pin 20:- Titled as Vss – it symbolizes ground (0 V)
association.
Pins- 21-28:- recognized as Port 2 (P 2.0 – P 2.7) –
other than serving as Input/output port, senior order
address bus indicators are multiplexed with this quasi bi
directional port.
Pin- 29:- Program Store Enable or PSEN is employed
to interpret sign from outer program memory.
Pins 18 and 19:- These are employed for interfacing an
outer crystal to give system clock.
Pin 20:- Titled as Vss – it symbolizes ground (0 V)
association.
Pins- 21-28:- recognized as Port 2 (P 2.0 – P 2.7) –
other than serving as Input/output port, senior order
address bus indicators are multiplexed with this quasi bi
directional port.
Pin- 29:- Program Store Enable or PSEN is employed
to interpret sign from outer program memory.
PIN DIAGRAM OF 8051
Pin-30:- External Access or EA input is
employed to permit or prohibit outer memory
interfacing. If there is no outer memory need,
this pin is dragged high by linking it to Vcc.
Pin-31:- Aka Address Latch Enable or ALE is
brought into play to de-multiplex the address
data indication of port 0 (for outer memory
interfacing). Two ALE throbs are obtainable for
every machine rotation.
Pin-30:- External Access or EA input is
employed to permit or prohibit outer memory
interfacing. If there is no outer memory need,
this pin is dragged high by linking it to Vcc.
Pin-31:- Aka Address Latch Enable or ALE is
brought into play to de-multiplex the address
data indication of port 0 (for outer memory
interfacing). Two ALE throbs are obtainable for
every machine rotation.
PIN DIAGRAM OF 8051
Pins 32-39: recognized as Port 0 (P0.0 to P0.7) – other
than serving as Input/output port, low order data &
address bus signals are multiplexed with this port (to
provide the use of outer memory interfacing). This pin
is a bi directional Input/output port (the single one in
microcontroller 8051) and outer pull up resistors are
necessary to utilize this port as Input/output.
Pin-40: termed as Vcc is the chief power supply. By
and large it is +5V DC.
Pins 32-39: recognized as Port 0 (P0.0 to P0.7) – other
than serving as Input/output port, low order data &
address bus signals are multiplexed with this port (to
provide the use of outer memory interfacing). This pin
is a bi directional Input/output port (the single one in
microcontroller 8051) and outer pull up resistors are
necessary to utilize this port as Input/output.
Pin-40: termed as Vcc is the chief power supply. By
and large it is +5V DC.
applications of 8051
The 8051 has been in use in a wide number of
devices, mainly because it is easy to integrate into a project or
build a device around. The following are the main areas of
focus:
Energy Management: Efficient metering systems help in
controlling energy usage in homes and industrial
applications. These metering systems are made capable by
incorporating microcontrollers.
Touch screens: A high number of microcontroller providers
incorporate touch-sensing capabilities in their designs.
Portable electronics such as cell phones, media players and
gaming devices are examples of microcontroller-based
touch screens.
The 8051 has been in use in a wide number of
devices, mainly because it is easy to integrate into a project or
build a device around. The following are the main areas of
focus:
Energy Management: Efficient metering systems help in
controlling energy usage in homes and industrial
applications. These metering systems are made capable by
incorporating microcontrollers.
Touch screens: A high number of microcontroller providers
incorporate touch-sensing capabilities in their designs.
Portable electronics such as cell phones, media players and
gaming devices are examples of microcontroller-based
touch screens.
applications of 8051
Automobiles: The 8051 finds wide acceptance in
providing automobile solutions. They are widely used
in hybrid vehicles to manage engine variants.
Additionally, functions such as cruise control and
anti-brake system have been made more efficient with
the use of microcontrollers.
Medical Devices: Portable medical devices such as
blood pressure and glucose monitors use
microcontrollers will to display data, thus providing
higher reliability in providing medical results.
Automobiles: The 8051 finds wide acceptance in
providing automobile solutions. They are widely used
in hybrid vehicles to manage engine variants.
Additionally, functions such as cruise control and
anti-brake system have been made more efficient with
the use of microcontrollers.
Medical Devices: Portable medical devices such as
blood pressure and glucose monitors use
microcontrollers will to display data, thus providing
higher reliability in providing medical results.
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