ES in Automobile
High end automobiles uses more than
100 microcontroller
4 bit for seat belt
8 bit for dash board device
16/32 bit to control signals
RISC Architecture
Fixed size registers
Load and store architecture is used.
Large register banks can be used for
any purpose
Pipeline execution is possible
Single cycle execution
ARM (Advanced RISC Machine) Microprocessor was
based on the Berkeley/Stanford RISC concept
Originally called Acorn RISC Machine because
developed by Acorn Computer in 1985
Features of ARM Processor
32 bit processor
Load and store architecture is used
RISC instruction set is used
Uniform and fixed length instructions
Inbuilt circuit for debugging
RISC vs CISC
RISC CISC
Fixed size registers Variable length
Large register banks can be used
for any purpose
Registers have their assigned
tasks
Pipeline execution is possible Allowed up to certain level
Hardwired instruction decode logic Large microcode
Single cycle execution Many cycles were needed
ARM’s
Programmer model
Data Sizes and Instruction Sets
When used in relation to the ARM
Half word means 16 bits (two bytes)
Word means 32 bits (four bytes)
Double word means 64 bits (eight bytes)
Most ARM implement two instruction sets
32-bit ARM Instruction Set
16-bit Thumb Instruction Se
Processor Modes
The ARM has seven basic operating modes
Each mode has access to own stack and a different
subset of registers
Some operations can only be carried out in a
privileged mode
Modes of ARM
The ARM Register Set
The Program Counter (R15)
When the processor is executing in ARM state:
All instructions are 32 bits in length
R14 is used as the subroutine link register (LR) and stores the return
address when Branch with Link operations are performed,
calculated from the PC.
Thus to return from a linked branch
MOV r15,r14
or
MOV pc,lr
Embedded System
15 general purpose 32 bit register
(r0-r14)
R15 is used as PC
R14 is used as lr or linker register
CPSR – Current Program Status
Register
CPSR Format
Bit 0-4 is used for mode selection
Bit 5 is used for Thumb instruction set
Bit 6-7 is used for Interrupt handling
N: Negative
Z: Zero
C: Carry
V: Overflow
Logical Instruction Arithmetic Instruction
Flag
Negative No meaning Bit 31 of the result has been set
(N=‘1’) Indicates a negative number in
signed operations
Zero Result is all zeroes Result of operation was zero
(Z=‘1’)
Carry After Shift operation Result was greater than 32 bits
(C=‘1’) ‘1’ was left in carry flag
oVerflow No meaning Result was greater than 31 bits
(V=‘1’) Indicates a possible corruption of
the sign bit in signed
numbers
Condition Flags