MuhammadAbdullah813963
6 views
21 slides
Oct 21, 2025
Slide 1 of 21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
About This Presentation
John von Neumann’s vs. Harvard Architecture
Size: 386.52 KB
Language: en
Added: Oct 21, 2025
Slides: 21 pages
Slide Content
Memory (Instructions & Data) Control Bus Instructions (program code) and data stored in a memory CPU uses busses to access code and data from memory Program execution occurs in sequential manner from one instruction or data to the next 1 John von Neumann’s vs. Harvard Architecture Address Bus Data Bus CPU John von Neumann Architecture
Memory (Code) Control Bus Program code and data stored in separate memories CPU uses separate busses to access code and data from memory Program execution speeds up as code and data can be accessed in parallel 2 John von Neumann’s vs. Harvard Architecture Address Bus Data Bus Harvard Architecture Memory (Data) Control Bus Address Bus Data Bus CPU
Memory (Code) Control Bus CPU with separate busses to large external Code and Data memory will make CPU board large and expensive Harvard Architecture is expensive to implement in laptops 3 John von Neumann’s vs. Harvard Architecture Address Bus Data Bus Harvard Architecture Memory (Data) Control Bus Address Bus Data Bus CPU
Harvard Architecture can be easily implemented in AVR microcontroller Code and Data memory is small and inside the AVR microcontroller chip AVR can still use von Neumann architecture to support extra external code and data memory 4 John von Neumann’s vs. Harvard Architecture
Microprocessor Pentium (Intel) Have no internal RAM, ROM or I/O Have to connect external RAM, ROM and I/O which can be expanded Can execute wide range of programs High processing speed and Complex Architecture 5 Microcontroller Vs Microprocessor
Microcontroller 8051, PIC, AVR Have built-in RAM, ROM which has limited size Have built in I/O Ports, Timer, Serial Port Have built in ADCs Used for specific embedded applications Simple 8-bit Architecture 6 Microcontroller Vs Microprocessor
Meeting Computing needs of the task Processing Speed Packaging Power Consumption Amount of RAM and ROM Number of I/O ports USB support, Timer support Compatibility with higher versions Cost per unit 7 Choosing a Microcontroller
Availability of Software Development Tools Compliers Assemblers Third party support Ready Availability and reliable Sources 8051 manufactured by Intel, Atmel, Philips, Dallas etc. Atmel, Zilog , Microchip Technology have dedicated massive resources to ensure availability of their products 8 Choosing a Microcontroller
Industrial Control Home appliances Vehicles Security Systems Defense Systems Health Systems 9 Microcontroller Applications
Basic architecture designed by two students of Norwegian Institute of Technology Alf- Egil Bogen and Vegard Wollan ATMEL bought and developed the design and named it AVR Advanced Virtual RISC or Alf and Vegard RISC AVR are mostly 8-bit processors Classified into four broad groups Mega, Tiny, Special Purpose and Classic AVRmega32 will be considered 10 AVR Microcontroller Introduction
Code ROM Flash 32 KB Data ROM EEPROM 1 KB DATA RAM SRAM 2 KB 4 IO Ports PA, PB, PC, PD Each 8-bit Oscillator 16 MHz max. 11 ATmega32
Serial Comm. Interface SPI I 2 C (TWI) USART 10-bit ADC 8 i /p channels Timers/Counters Two, 8-bit One, 16 bit 12 ATmega32
PWM 4 channels Watchdog Timer Power Management 13 ATmega32
The registers and general architecture of a microcontroller should be understood for programming it General Purpose Registers (GPRs) Store temporary data ALU carries out operations on data held in GPR Result is stored back in GPR Inside the ATmega32 14
32 registers R0 to R31 All registers are 8-bit registers bits D7 to D0 GPRs are a part of the processor 2 KB SRAM Inside the ATmega32 15
Load Immediate instruction is used to copy data into GPR What additional information is required by the LDI instruction to load data in GPR? Register Name R0 – R31 8 bit Data value LDI Rn, k LDI R20, 0x25 LDI Instruction 16
LDI instruction only loads R16 to R31 R0 to R15 can not be loaded LDI instruction only loads 8 bit data Prefix 0x 25 or $ 25 Hexadecimal value of 25 is loaded No Prefix 25 Decimal value of 25 is loaded LDI Instruction Limitations 17
ADD instruction Adds two data values in GPR What additional information is required by the ADD instruction to add data in GPR? Register Name R0 – R31 ADD Rd, Rr ADD R16, R17 Where is the result stored? R16 ADD Instruction 18
Data Memory is composed of three parts GPRs Use 32 Bytes of Data Memory at address $00 to $1F IO Memory Dedicated to IO devices IO memory made of 8-bit registers IO Memory can vary depending upon AVR device 19 Data Memory (RAM)
All AVRs have at least 64 Bytes of IO Memory called Standard IO Memory In other microcontrollers these registers are called Special Function Registers (SFRs) General Purpose RAM (SRAM) Its purpose is to store data and parameters by programmers It is also known as scratch pad memory Each location is 8-bits and stores any data Size of SRAM can vary for different AVR chips 20 Data Memory (RAM)
ATmega32 GPR: 32 bytes IO Registers: 64 bytes SRAM: 2048 bytes IO Register Names Names have been assigned to IO registers for ease of use and to make programming easier Registers can be accessed through their names 21 Data Memory (RAM)