linear5 circuit analysis Charateristics of Op-Amp.ppt
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May 18, 2024
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About This Presentation
sem notes
Size: 6.73 MB
Language: en
Added: May 18, 2024
Slides: 178 pages
Slide Content
LINEAR INTEGRATED CIRCUITS
Subject Code: EE3402
Presented By:
Dr. A. SANTHI MARY ANTONY,
ASSISTANT PROFESSOR,
DEPARTMENT OF EEE,
LOYOLA –ICAM COLLEGE OF ENGINEERING AND TECHNOLOGY (LICET)
LOYOLA –ICAM
COLLEGE OF ENGINEERING AND TECHNOLOGY (LICET)
Loyola Campus, Nungambakkam, Chennai.
UNIT III –APPLICATIONS OF OP-AMP
INSTRUMENTATION AMPLIFIERANDITSAPPLICATIONSFORTRANSDUCER BRIDGE
LOGANDANTILOGAMPLIFIERS
ANALOGMULTIPLIER&DIVIDER
FIRSTANDSECONDORDERACTIVEFILTERS
COMPARATORS, MULTIVIBRATORS
WAVEFORM GENERATORS
CLIPPERS,CLAMPERS,PEAKDETECTOR,S/HCIRCUIT
D/ACONVERTER (R-2RLADDERANDWEIGHTEDRESISTORTYPES)
A/DCONVERTERS USINGOP-AMPS
FEATURES OF INSTRUMENTATION AMPLIFIER
The important features of an instrumentation amplifier are :
1.High gain accuracy
2.High CMRR
3. High gain stability with low temperature coefficient
4.Low DC Offset
5. Low output impedance
What is Op-Amp
INSTRUMENTATION AMPLIFIER
What an Op-Amp looks like to a lay-person
Thesearespeciallydesignedop-ampsuchasµa25tomeettheabovestated
requirementsofagoodinstrumentationAmplifier.
Monolithic(Singlechip)Instrumentationamplifierarealsoavailablecommercially
suchasAD521,AD524,AD620byNationalSemiconductorandINA101,104,3626,
3629bBurrBrown.
Differential Amplifier using Single Op-amp
(CIRCUIT ANALYSIS)
Consider the basic differential amplifier. It can been seen that the output voltage is given by,
Differential Amplifier Analysis
Differential Amplifier Analysis
When Non inverting input alone is given,
When both the inputs are given
simultaneously,
•In this circuit , source V1sees an input impedance =R3 + R4 (=101Kῼ) and the impedance
seen by source V2is only 1Kῼ
•This low impedance may load the signal source heavily.
•Therefore, high resistance buffer is used proceeding each input to avoid this loading effect.
•The output voltage is thus proportional to the logarithm of input voltage. The circuit gives natural log (In), one can
find log10 by proper scaling
•Thecircuithoweverhasoneproblem.
•TheemittersaturationcurrentIs,variesfromtransistortotransistorandwithtemperature.Thusa
stablereferencevoltageVrefcannotbeobtained.
•ThisiseliminatedbythecircuitgiveninFig.
•Theinputisappliedtoonelog-amp,whileareferencevoltageisappliedtoanotherlogamp.Thetwo
transistorsareintegratedclosetogetherinthesamesiliconwafer.Itprovidesaclosematchof
saturationcurrentsandensuresgoodthermaltracking.
Fig. Log-amp with saturation current and temperature compensation
•ThevoltageV0isstilldependentupontemperatureandisdirectlyproportionaltoT.
•Thisiscompensatedbythelastop-ampstageA4whichprovidesanon-invertinggainof(1+R2/RTC).Now,the
outputvoltageis,
Where, RTCis a temperature-sensitive resistance with a positive coefficient of temperature.
•The slope of the equation becomes constant as the temperature changes.
Fig. Log-amp using two op-amps only
OP-AMP USED AS COMPARATORS
•A comparator is a circuit which compares a signal voltage applied at one input of an op-amp with a known
reference voltage at the other input.
•It is basically an open-loop op-amp with output ±Vsat(=Vcc) as shown in the ideal transfer characteristics
Fig. The transfer characteristics (a) ideal comparator. (b) Practical comparator
There are basically two types of comparators: (i) Non-inverting comparator (ii) Inverting comparator
Non-Inverting Comparator
•AfixedreferencevoltageVrefappliedto(-)inputandatimevaryingsignalViisappliedto(+)input.
•Theoutputvoltageisat-VsatforVi<VrefandVogoesto+VsatforVi>Vref.
•TheoutputwaveformforaSinusoidalinputsignalappliedtothe(+)inputisshowninFig.(bandc)forpositiveand
negativeVrefrespectively.
Fig. Input and output of a Comparator when
(a) Vref > 0 V (b) Vref < 0V
Fig. Non-Inverting Comparator
•The values of these voltages can be determined and adjusted by selecting proper values of R1and R2.
and
•TheoutputvoltageremainsinagivenstateuntiltheinputvoltageexceedthethresholdVoltageleveleither
positiveornegative.
•Thefig.showsthegraphofoutputvoltageagainstinputvoltage.Thisiscalledtransfercharacteristicsof
Schmitttrigger.
•Thegraphindicatedthatoncetheoutputchangesitsstateitremainsthereindefinitelyuntiltheinputvoltage
crossesanyofthethresholdvoltagelevels.ThisiscalledhysteresisofSchmitttrigger.
•Thehysteresisisalsocalledasdead-zoneordead-band.
Fig. Hysteresis of Schmitt trigger.
•The difference between VUTand VLTis called width of
the hysteresis denoted as H,
•Theschmitttriggereliminatestheeffectofnoisevoltageslessthan
thehysteresisH,cannotcausetriggering.
•AsforpositiveVingreaterthanVUT,theoutputbecomes–Vsatand
fornegativeVinlessthanVLT,theoutputbecomes+Vsat,thisiscalled
InvertingSchmittTrigger.
•Ifinputappliedispurelysinusoidal,theinputandoutputwaveforms
forinvertingSchmitttriggercanbeshownasinfig.
Fig. Input and output waveforms of Schmitt trigger
Fig. Feedback Oscillator Output
•Forasustained(continuousandsteady)oscillationsBarkhausen‟scriteriaaretobesatisfied.
•Thecriteriastates,
1.Thetotalgainofthecircuitshouldbeequaltoormorethanoneand2.
2.Theoverallphaseshiftinthecircuit(amplifierandfeedbackcircuit)shouldbezero.
•IfgainoftheamplifierisconsideredasAandfeedbackfactorisβ,then
Criterion 1:
•Modulus of the product of the amplifier gain A and feedback factor of feedback network β should be equal to
or greater than zero.
•As shown in fig, a noise voltage introduced by existing imbalances in the circuit is amplified by the circuit
itself.
•The frequency of noise voltage depends on the design aspects of the circuit and when multiplication factor
of total gain |A β | =1 and when |A β | 1, the amplitude of the generated voltage increases till saturation is
reached.
•The oscillation at the particular frequency is generated and sustained.
•This is done when the phase shift of the circuit is 0°or 360°(0 or radians).
•In the following sections two such sinusoidal oscillators are being explained. They are
(1) RC phase shift oscillator
(2) Wien Bridge oscillator
Criterion2: Aβ=0°or360°(0orradians)
•PhaseanglebetweentheamplifiergainAandfeedbackfactoroffeedbacknetworkβortotalphase
shiftinthecircuitshouldbeequaltoorgreaterthanzero.Criterion1and2areBarkhausen‟scriteriafor
sustainedoscillations.
Derivation of frequency of oscillation of RC Phase shift oscillator
Problem 1 : Solved Problem
•The capacitor value of an RC phase shift oscillator using OP AMP is 0.01μF and the desired frequency of
oscillation is 25 KHz.
•The voltage gain of the amplifier should be 30.
•Thus calculate the value of R of RCfeedback network, input resistor R1and feedback resistor R2connected
to the amplifier.
Wien’s Bridge Oscillators
•Unlike RC phase shift oscillator, Wien bridge oscillator never uses phase-shift concept. It uses balancing
concept of lead-lag network.
Construction:
•Here this oscillator is connected in a bridge fashion.
•The inverting terminal is connected to a junction where resistors R3and RFare connected.
•The other end of R3is grounded and RFis connected to output terminal of the amplifier.
•This forms a reference voltage across R3being fed into inverting terminal as shown in the fig.
Fig a. Wien’s Bridge Oscillator
Fig. Wien’s Bridge Oscillator-Reconstructed
•The non-inverting connected in between two reactance offering components Z1 and Z2 as shown in the fig.
•Z1comprises of serially connected resistor R1and capacitor C1whereas Z2 comprises of parallel connected
resistor R2and capacitor C2.
•This combination of Z1and Z2is termed as lead-lag circuit.
Possible question:
•ExplainbrieflyaboutconstructionandworkingofWienbridgeoscillatorusingOPAMPwithneat
sketches.
OP-AMP MULTIVIBRATORS
•Multivibrators are square wave oscillators that produce pulse waveforms with various ON time and OFF time.
•As shown in fig.a, P1, P2 and P3 are ON time of the pulse whose total time period is 10 ms with TON and
TOFF are 3.5 ms and 6.5 ms respectively. TON and TOFF are two states of the pulse.
•The place where TON transits to TOFF or TOFF to TON is termed as state transition.
•The state transition may have slope (with a small time for transition) or infinite slope (No time for transition-
being abrupt).
Fig a. Pulse waveform -model
•Bistable multivibrator is one that generates pulses those transits from one state to another with the help of
two external trigger.
•The multivibrator remains in one state (stable state) and when an external pulse is applied then it transits
state from present Stable state to a next stable state.
•It remains at second stable state until another external trigger is applied.
•Thus this multivibrator has stable states only and the transitions happen only when triggers are applied, it
is termed as bistable multivibrators.
Possible questions:
What is a Multivibrator?
Define the terminology of astable, monostable and bistable multivibrators.
Astable Multivibrators
These multivibrators are termed as “Free Running” multivibrators, and they have only quasi stable
states as seen earlier in introduction.
The circuit diagram of astable multivibrator using Operational amplifier is shown below fig.a.
Fig a. Astable Multivibrator –Circuit Diagram
Construction:
•ThecircuitassimpleandresembleslikeOPAMPSchmitttriggercircuit.OneendofacapacitorCanda
resistorRareconnectedtotheinvertingterminal.
•Theotherendoftheresistorisconnectedtotheoutputterminalandthatofcapacitorisconnectedto
groundterminal.
•ThiscapacitorCandfeedbackresistorRdecidetheperiodforoscillationofthemultivibrator.
•AresistorR1isconnectedbetweentheoutputterminalandnon-invertingterminalandanotherresistorR2
isconnectedbetweennon-invertingterminalandgroundterminals.
•IftheoutputvoltageisconsideredasVo,thenthevoltagetappedbetweenR2shallbeareferencevoltage
appliedtothenon-invertingterminalwithamplitudeofβVowhereβisfeedbackfactorforcomparison.
Working:
•Consideringfig.aandb,theworkingpartofthisgeneratorcanbeexplained.AtTime0:Attime0,
assumetheoutputtransitsfrom-V
satto+V
sat.Sincetheoutputis+V
satattime0,referencevoltage+βV
o
andcapacitorvoltageis-βV
o.
Possible question:
Explain construction and working of Astable Multivibrator using OP AMP using neat sketches.
Monostable Multivibrators
•These multivibrators are termed as “one-shot multivibrators” and they have only one stable state and
other is quasi-stable state induced by single external trigger as seen earlier in introduction.
•The circuit diagram of monostable multivibrator using Operational amplifier is shown below fig.a.
Fig a. Monostable Multivibrator Using OP AMP
This is shown in the fig. of waveforms fig.d. thus this rectifier converts bipolar AC input to unipolar DC output
Fig.d Full-wave precision rectifier waveform
Possible questions:
What is the principle behind precision rectification?
Explain the construction and working of half and full wave precision rectifiers with neat sketches.
WAVE SHAPING CIRCUITS
Wave shaping circuitsare the electronic circuits, which produce
the desired shape at the output from the applied input wave form.
These circuits perform two functions :
(i) Attenuate the applied wave
(ii) Alter the dc level of the applied wave.
There are two types of wave shaping circuits:
1. Clippers
2. Clampers
CLAMPERS
CLIPPERS
POSITIVE CLIPPERS
PEAK DETECTOR
APeakDetectorisacircuitthatproducesanoutputvoltageequaltothepositiveor
negativepeakvalueoftheinputvoltage.Apositivepeakdetectordetectsthepositivepeak
magnitudeoftheinputandanegativepeakdetectoridentifiesthenegativepeakmagnitude
oftheinput
The basic blocks required for the peak detector circuit are:
(i)an analog memory such as a capacitor to store the charge proportional to the peak value
(ii)a unidirectional switch such as a diode to charge the capacitor when a new peak arrives
at the input
(iii)a device such as a voltage follower circuit for making the capacitor charge to the input
voltage
(iv)a switch to periodically reinitialisethe output to zero
Sample and Hold Circuit
•Asampleandholdcircuitsamplesaninputsignalandholdsontoitslastsampledvalueuntilthe
inputissampledagain.
•Thistypeofcircuitisveryusefulindigitalinterfacingandanalogtodigitalandpulsecodemodulation
systems.
•OneofthesimplestpracticalsampleandboldcircuitconfigurationisshowninFiga
Fig. a Sample and hold circuit
Fig. a Input and output waveforms
•The capacitor C is now facing the high input impedance of the
voltage follower A2 and hence cannot discharge. The capacitor
holds the voltage across it.
•The time period TS, the time during which voltage across the
capacitor is equal to input voltage is called sample period.
•The time period TH of vc , during which the voltage across the
capacitor is held constant is called hold period.
•The frequency of the control voltage should be kept higher than
(at least twice) the input so as to retrieve the input from output
waveform.
•During the time when control voltage vc is zero, the E-MOSFET is off.
•A low leakage capacitor such as Polystyrene, Mylar or Teflon should be used to retain the stored charge.
•Specially designed sample and hold lCs of make Harris semiconductor HA2420, National
semiconductor such as LF198, LF398 are also available. A typical connection diagram of the LF398 is
shown in Fig. a. It may be noted that the storage capacitor C is connected externally.
Fig. a. Typical connection diagram
Fig a. Circuit showing application of A/D and D/A converter
•Figurea.highlightsatypicalapplicationwithinwhichA/DandD/Aconversionisused.
•Theanalogsignalobtainedfromthetransducerisbandlimitedbyantialiasingfilter.
•Thesignalisthensampledatafrequencyratemorethantwicethemaximumfrequencyof
thebandlimitedsignal.
•ThesampledsignalhastobeheldconstantwhileconversionistakingplaceinA/Dconverter.
Basic Digital to analog converters (DAC) -Techniques
•The schematic of a DAC is shown in Fig. a.
•The input is an n-bit binary word D and is combined with a reference voltage V
Rto give an analog
output signal.
•The output of a DAC can be either a voltage or current.
Fig. a Schematic of DAC
For a voltage output DAC, the D/A converter is mathematically described as
There are various ways to implement
Here we shall discuss the following resistive techniques only.
Weighted resistor DAC
R-2R ladder
Binary weighted resistor DAC
•One of the simplest circuits shown in the previous figure uses a summing amplifier with a binary
weighted resistor network. It has n-electronic switches d1, d2..., dn controlled by binary input word.
These switches are single pole double throw (SPDT) type.
•If the binary input to a particular switch is 1, it connects the resistance to the reference voltage (-V
R).
•If the input bit is 0, the switch connects the resistor to the ground.
From Fig. a, the output current Io for an ideal op-amp can be written as
Fig. a Binary weighted resistor DAC
Comparing Eq. with Eq.,
it can be seen that if R
f= R then K = 1 and V
FS= V
R
The circuit shown in Fig. a uses a negative reference voltage.
The analog output voltage is therefore positive staircase as shown in Fig. b for a 3 bit weighted resistor DAC.
Fig. b Transfer Characteristics of 3 bit DAC
It may be noted that
•Although the op-amp in Fig. a is connected in inverting mode, it can also be connected in non-
inverting mode.
•(ii) The op-amp is simply working as a current to voltage converter.
•(iii) The polarity of the reference voltage is chosen in accordance with the type of the switch used.
For example, for TIL compatible switches, the reference voltage should be + 5 V and the output will
be negative.
•The accuracy and stability of a DAC depends upon the accuracy of the resistors and the tracking of
each other with temperature.
Disadvantages of binary weighted type DAC
–Wide range of resistor values required.
–The fabrication of such a large resistance in IC is not practical
R-2R Ladder DAC
•Wide ranges of resistors are required in binary weighted resistor type DAC.
•This can be avoided by using R-2R ladder type DAC where only two values of resistors are required.
•It is well suited for integrated circuit realization. The typical value of R ranges from 2.5 KΩ to 10 KΩ.
Fig. (a) R-2R ladder DAC Fig. (b) Equivalent Circuit of (a)
Fig. (c) Equivalent Circuit of (b)
•For simplicity, consider a 3 bit DAC as shown in Fig. (a), where the switch position d1 d2 d3
corresponds to the binary word 100.
•The circuit can be simplified to the equivalent form of Fig. (b) and finally to Fig. (c).
•Then, voltage at node C can be easily calculated by the set procedure of network analysis as
INVERTED R-2R Ladder DAC
Characteristics of Digital to Analog Converters
•Both D/A and AID converters are available with wide range of specifications.
•The various important specifications of converters generally specified by the manufacturers are
analyzed.
–Resolution
–Linearity
–Accuracy
–Monotonicity
–Settling time
–Stability
Resolution
•The resolution of a converter is the smallest change in voltage which may be produced at the output (or
input) of the converter.
•For example, an 8-bit D/A converter has 2
8
-1 = 255 equal intervals.
•Hence the smallest change in output voltage is (1/255) of the full scale output range.
•In short, the resolution is the value of the LSB.
Linearity
•The linearity of an AID or D/A converter is an important measure of its accuracy and tells us how
close the converter output is to its ideal transfer characteristics
•In an ideal DAC, equal increment in the digital input should produce equal increment in the analog
output and the transfer curve should be linear.0
•However, in an actual DAC, output voltages do not fall on a straight line because of gain and offset
errors as shown by the solid line curve in Fig. a
•The static performance of a DAC is determined by fitting a straight line through the measured output
points.
•The linearity error measures the deviation of the actual output from the fitted line and is given by
as shown in Fig. a.
•The error is usually expressed as a fraction of LSB increment or percentage of full-scale voltage.
•A good converter exhibits a linearity error of less than ±(1/2) LSB.
Accuracy
•Absolute accuracy is the maximum deviation between the actual converter output and the ideal
converter output.
•Relative accuracy is the maximum deviation after gain and offset errors have been removed.
•Data sheets normally specify relative accuracy rather than absolute accuracy.
•The accuracy of a converter is also specified in terms of LSB increments or percentage of full scale
voltage.
Monotonicity
•A monotonic DAC is the one whose analog output increases for an increase in digital input. Figure b
represents the transfer curve for a non-monotonic DAC, since the output decreases when input code
changes from 001 to 010.
•A monotonic characteristic is essential in control applications, otherwise oscillations can result.
Fig. b A non-monotonic 3-blt DAC
•If a DAC has to be monotonic, the error should be less than ±(1/2) LSB at each output level.
•All the commercially available DACs are monotonic because the linearity error never exceeds ±(1/2)
LSB at each output level
Settling time
•It represents the time it takes for the output to settle within a specified band ±(1/2) LSB of its final
value following a code change at the input (usually a full scale change).
•The most important dynamic parameter is the settling time
•It depends upon the switching time of the logic circuitry due to internal parasitic capacitances and
inductances.
•Settling time ranges from 100 ns to 10 μs depending on word length and type of circuit used.
Stability
•The performance of converter changes with temperature, age and power supply variations.
•So all the relevant parameters such as offset, gain, linearity error and monotonicity must be specified
over the full temperature and power supply ranges.
Analog to Digital Converters
WhydoweneedA/Dconversion?
•Mostoftherealworldphysicalquantitiessuchasvoltage,current,temperature,
pressureandtimeetcareavailableinanalogform
•Eventhoughananalogsignalrepresentsarealphysicalparameterwithaccuracy,itis
difficulttoprocess,storeortransmittheanalogsignalwithouterrorsbecauseofthe
superimpositionofnoise.
•Thereforeforprocessing,transmissionandstoragepurposes,itisoftenconvenientto
expressthesevariablesindigitalformitgivesbetteraccuracyandreducesnoise.
•TheoperationofanydigitalcommunicationsystemisbasedonA/Dconversionor
D/Aconversion
Analog to Digital Converters
Classification of ADC
•Direct Type ADC
•Integrating Type ADC
(i) Direct Type of ADC:
It compare a given analogsignal with the internally generated equivalent signal. This group include
1.Flash Type converter
2.Counter type
3.Tracking or Servo converter
4.Successive approximation type converter
(ii) Integrated Type ADC:
It performs conversion in an indirect manner by first changing the analoginput signal to a linear function of time
or frequency and then to a digital code. The two most widely used integrating type converters are,
1.Charge balancing ADC
2.Dual slope ADC
Applications of ADC
Flash AD converters (The Parallel Comparator)
Parallel Comparator( Flash) A/D Converter
SUCESSIVE APPROXIMATION ADC
SUCESSIVE APPROXIMATION ADC
SUCESSIVE APPROXIMATION ADC
SUCESSIVE APPROXIMATION ADC
INTEGRATING TYPE ADC
The integrating type of ADC do not require S/H circuit at the input.
If the input changes during conversion, the ADC output code will be proportional to the value of the
input averaged over the integration period.
Charge Balancing ADC
Dual slope ADC
The circuit consists of a high input impedance bufferA1, precision integratorA2 and
a voltage comparator.
The converter first integrates the analog input signal Va for a fixed duration of 2
n
clock periods as shown in figure.
Then it integrates an internal reference voltage VRof opposite polarity until the
integrator output is zero.
The number of clock cycles required to return the integrator to zero is proportional
to the value of Va averaged over the integration period.
Hence N represents the desired output code
Advantages of active filters over passive filters
•Reducedsizeandweight
•Increasedreliabilityandimprovedperformance
•Simpledesignandgoodvoltagegain
•Whenfabricatedinlargerquantities,cheaperthanpassivefilters
Disadvantages of Active Filters
•Limitedbandwidthonly.
•Qualityfactorisalsolimited
•Requirepowersupply(passivedoesn'trequirepowersupply)
•Changesduetoenvironmentalfactors.
Possible question: What is an active filter? What are its advantages over passive filters?
Figure. Second Order Active Low Pass Filter
•Withfirstordercircuit,anotherRCcircuitisaddedasshowninthefigureandtheresponseisshown
inthefigureforsecondorderLPFwithaslopeof-40dB/decade.
•Thisisduetothefactthat,eachRCnetworkintroduces-20dBdecreaseinstopbandresponseslope
SECOND ORDER LOW PASS FILTER
Second Order Active Low Pass Filter
PROBLEM
PROBLEM
PROBLEM
High Pass Filters
A high pass filter attenuates low frequencies below corner frequency (cut-off frequency) and allows high frequencies
above cut-off frequency. This is shown in the frequency in fig b
The circuit is a simple non-inverting amplifier, where a RC low pass filter circuit is connected to the input.
Fig : First Order Active High Pass Filter
FREQUENCYRESPONSE
PROBLEM
Second Order Active High Pass Filter
PROBLEM
PROBLEM
HIGHER ORDER HIGH PASS FILTER
THIRD ORDER HIGH PASS BUTTER -WORTH FILTER
Band Pass Filters
A Band pass filter allows a band of frequencies and blocks lower and higher frequencies other than the
allowed band as shown in fig b. As shown in the fig a, high pass and low pass filters are connected in series.
Fig. a. Active Band Pass Filter
Fig b. Response of Active Band Pass Filter
ThecornerfrequencyoflowpassfilterfLischosentobelowerthanthatofhighpassfilterfH.Thusthe
differencebetweenfHandfLisconsideredtobethepassband.Inlowfrequencystopband,theresponse
increases20dBperdecadeandinhighfrequencystopband,theresponsedecreasesby20dBper
decade.
This filter has a maximum gain at the resonant frequency ( fr), which is defined as
(i)Narrow Band Pass Filter –Quality Factor (Q > 10)
(ii)Wide Band Pass Filter –Quality Factor (Q < 10)
PROBLEM
PROBLEM
NARROW BAND PASS FILTER
NARROW BAND PASS FILTER
The Node Voltage equation at Node A : ViY1+ VoY3 = VA (Y1+Y2+Y3+Y4)
Assuming VB = 0 (Virtual Ground), the node voltage equation at Node B is,
PROBLEM
PROBLEM
WIDE BAND PASS FILTER
PROBLEM
Band Reject Filters (Notch filter)
•A Band pass filter blocks a band of frequencies and allows lower and higher frequencies other than the
blocked band as shown in fig.b.
•As shown in the fig.a, band pass filter is connected to a summer circuit.
•The input and output of the band pass filter is summed up at the inverting summer input.
•The bands are inverted by the inverting summer and so pass band of band pass filter becomes stop band
and stop bands becomes pass bands.
•Thus this filter only allows particular band above lower corner frequency fL and below upper corner
frequency fH.
Fig.a. Active Band Reject Filter
Fig. b. Response of Active Band Reject Filter
Possiblequestions:
•WritebrieflyaboutfirstandsecondorderButterworthLow-passfilterwithneatsketches.
•WritebrieflyaboutfirstandsecondorderButterworthhigh-passfilterwithneatsketches.
•WritebrieflyaboutfirstorderButterworthband-passfilterwithneatsketches.
•WritebrieflyaboutfirstorderButterworthband-rejectfilterwithneatsketches.
•WritebrieflyaboutNotchfilterwithneatsketches.
BAND REJECT FILTER
WIDE BAND REJECT FILTER
NARROW BAND REJECT FILTER (NOTCH FILTER)
As K approaches unity, Q factor becomes very large and B approaches zero. In fact, mismatches between
resistors and capacitors limit the Q factor and bandwidth (B) to a practically realisable value.
They are also useful for the rejection of a single frequency, such as 50 or 60 Hz power line frequency