SYED HASAN SAEED [email protected]
https://shasansaeed.yolasite.com
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SyedHasan Saeed, Integral University,
Lucknow
MAGNITUDE COMPARATOR
Syed Hasan Saeed, Integral University,
Lucknow
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MAGNITUDE COMPARATOR: DIGITAL COMPARATOR
•It is a combinational logic circuit.
•Digital Comparator is used to compare the value of two binary
digits.
•There are two types of digital comparator (i) Identity Comparator
(ii) Magnitude Comparator.
•IDENTITY COMPARATOR: This comparator has only one output
terminal for when A=B, either A=B=1 (High) or A=B=0 (Low)
•MAGNITUDE COMPARATOR: This Comparator has three output
terminals namely A>B, A=B, A<B. Depending on the result of
comparison, one of these output will be high (1)
•Block Diagram of Magnitude Comparator is shown in Fig. 1
Syed Hasan Saeed, Integral University,
Lucknow
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BLOCK DIAGRAM OF MAGNITUDE COMPARATOR
Syed Hasan Saeed, Integral University,
Lucknow
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n-Bit Digital Comparator
A
n-Bit
B
n-Bit
A<B A=B A>B
Fig. 1
1-Bit Magnitude Comparator:
•This magnitude comparator has two inputs A and B and three
outputs A<B, A=B and A>B.
•This magnitude comparator compares the two numbers of single
bits.
•Truth Table of 1-Bit Comparator
Syed Hasan Saeed, Integral University,
Lucknow
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INPUTS OUTPUTS
A B Y
1(A<B)Y
2 (A=B)Y
3(A>B)
0 0 0 1 0
0 1 1 0 0
1 0 0 0 1
1 1 0 1 0
K-Maps For All Three Outputs :
Syed Hasan Saeed, Integral University,
Lucknow
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A
B
01
0
1
0
0 0
1B B A A BAY
1
K-Map for Y
1 : A<B
K-Maps For All Three Outputs :
Syed Hasan Saeed, Integral University,
Lucknow
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A
B
01
0
1
0
0 0
1B B A A BAY
1
K-Map for Y
1 : A<B
A
B
01
0
1
1
0 1
0B B A A ABBAY
2
K-Map for Y
2: A=B
K-Maps For All Three Outputs :
Syed Hasan Saeed, Integral University,
Lucknow
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A
B
01
0
1
0
0 0
1B B A A BAY
1
K-Map for Y
1 : A<B
A
B
01
0
1
1
0 1
0B B A A ABBAY
2
K-Map for Y
2: A=B
A 01
0
1
0
1
0B B A A B
0BAY
3
K-Map for Y
2: A>B
Realization of One Bit Comparator
Syed Hasan Saeed, Integral University,
Lucknow
9BA
BAY
1
A
BAB B A ABB AY
2 BA Y
3
BA BA BAY
1 ABBAY
2 BAY
3
Realization of by Using AND , EX-NOR gates
Syed Hasan Saeed, Integral University,
Lucknow
10BA
BAY
1 BA
BAY
2
BA Y
3
BA
A
B
2-Bit Comparator:
•Acomparatorwhichisusedtocomparetwobinarynumberseachoftwo
bitsiscalleda2-bitmagnitudecomparator.
•Fig.2showstheblockdiagramof2-Bitmagnitudecomparator.
•Ithasfourinputsandthreeoutputs.
•InputsareA
0,A
1,B
0andB
1andOutputsareY
1,Y
2andY
3
Syed Hasan Saeed, Integral University,
Lucknow
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A
0
A
1
B
1
B
0
Y
1
Y
2
Y
3
2-Bit Comparator
Fig. 2
A
B
Input Output
GREATER THAN (A>B)
LESS THAN (A<B)
Similarly,
1. If A
1= B
1=1 and A
0= 0, B
0=1, then A<B
2. If A
1= B
1= 0 and A
0= 0, B
0=1 then A<B
Syed Hasan Saeed, Integral University,
Lucknow
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A
1 A
0 B
1 B
0
1 0 0 1
1 1 1 0
0 1 0 0
1.If A
1= 1 and B
1= 0 then A>B
2.If A
1and B
1are same, i.eA
1=B
1=1 or A
1=B
1=0 and A
0=1, B
0=0
then A>B
K-Map for A<B: K-Map for A=B:
Syed Hasan Saeed, Integral University,
Lucknow
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0 1 1 1
0 0 1 1
0 0 0 0
0 0 1 0
1 0 0 0
0 1 0 0
0 0 1 0
0 0 0 1
00 01
00
01
11
10
11 10 00 01 11 10
00
01
11
10
A
1A
0
A
1A
0
B
1B
0
B
1B
0
For A<B
For A=B010110011
B B A B A B A AY 01010101010101012
B B A A BBAA B B A A B B A AY
K-Map For A>B
Syed Hasan Saeed, Integral University,
Lucknow
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0 0 0 0
1 0 0 0
1 1 0 1
1 1 0 0
00 01 11 10
00
01
11
10
A
1A
0
B
1B
0001110103
B AA B A B B A Y
For A=B From K-Map
Syed Hasan Saeed, Integral University,
Lucknow
1601010101010101012
B B A A BBAA B B A A B B A AY )B (A )B A(Y
)BA B A( )BA B A(Y
)BA B A(BA )BA B A(B AY
00112
000011112
1111001111002
LOGIC DIAGRAM OF 2-BIT COMPARATOR:
Syed Hasan Saeed, Integral University,
Lucknow
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A
1
A
0B
1B
0
A< B
A=B
A > B001
B A A 11B A 010
B B A 11B A 001
B A A 010
B B A 11B A 00
B A
THANK YOU
Syed Hasan Saeed, Integral University,
Lucknow
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