Microcontroller 8051- Architecture Memory Organization

Microcontroller, Applications, 8051- Architecture,Memory Organization,Addressing Modes in 8051, 8051 Instructions

1. Sanjivani Rural Education Society’s
Sanjivani College of Engineering, Kopargaon-423 603
(An Autonomous Institute, Affiliated to Savitribai Phule Pune University, Pune)
NACC ‘A’ Grade Accredited, ISO 9001:2015 Certified
Department of Computer Engineering
(NBA Accredited)
Prof. S.A.Shivarkar
Assistant Professor
Contact No.8275032712
Email- [email protected]
Subject- Digital Electronics and Logic Design (MDCO221)
Unit –V: Microcontroller

2. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 2
Content
❖Difference between Microprocessor and Microcontroller
❖ Introduction to 8051 Microcontroller, Architecture, Pin configuration
❖Memory organization-Special function registers, instruction set
❖Addressing modes
❖Timer and Counters
❖Serial Communication
❖Interrupt structure

3. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 3
Microprocessors vs Microcontroller
❑General-purpose Microprocessors contains
✓No RAM
✓No ROM
✓No I/O ports
❑Microcontroller has
CPU (microprocessor)
✓RAM
✓ROM
✓I/O ports
✓Timer
✓ADC and other peripheral

4. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 4
Microprocessors vs Microcontroller
❑General-purpose microprocessors
✓Must add RAM, ROM, I/O ports, and timers externally to make them functional
✓Make the system bulkier and much more expensive
✓Have the advantage of versatility on the amount of RAM, ROM, and I/O ports
❑Microcontroller
✓The fixed amount of on-chip ROM, RAM, and number of I/O ports makes them
ideal for many applications in which cost and space are critical
✓In many applications, the space it takes, the power it consumes, and the price per
unit are much more critical considerations than the computing power

5. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 5
Microprocessors vs Microcontroller
❑An embedded product uses a microprocessor (or microcontroller) to do
one task and one task only
✓There is only one application software that is typically burned into ROM
❑A PC, in contrast with the embedded system, can be used for any number
of applications
✓It has RAM memory and an operating system that loads a variety of
applications into RAM and lets the CPU run them
✓A PC contains or is connected to various embedded products
✓Each one peripheral has a microcontroller inside it that performs only one
task

6. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 6
Microcontroller Applications
❑Home
✓Appliances, intercom, telephones, security systems, garage door openers, answering
machines, fax machines, home computers, TVs, cable TV tuner, VCR, camcorder, remote
controls, video games, cellular phones, musical instruments, sewing machines, lighting
control, paging, camera, pinball machines, toys, exercise equipment ‰
❑Office
✓ Telephones, computers, security systems, fax machines, microwave, copier, laser printer,
color printer, paging ‰
❑Auto
✓Trip computer, engine control, air bag, ABS, instrumentation, security system, transmission control,
entertainment, climate control, cellular phone, keyless entry

7. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 7
Microcontroller
❑Many manufactures of general-purpose microprocessors have targeted
their microprocessor for the high end of the embedded market
✓There are times that a microcontroller is inadequate for the task ‰
❑When a company targets a general purpose microprocessor for the
embedded market, it optimizes the processor used for embedded
systems ‰
❑Very often the terms embedded processor and microcontroller are used
interchangeable

8. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 8
Microcontroller
❑One of the most critical needs of an embedded system is to decrease
power consumption and space ‰
❑In high-performance embedded processors, the trend is to integrate more
functions on the CPU chip and let designer decide which features he/she
wants to use ‰
❑In many cases using x86 PCs for the high-end embedded applications
✓Saves money and shortens development time ƒ
➢A vast library of software already written ƒ
➢Windows is a widely used and well understood platform

9. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 9
Microcontroller
❑8-bit microcontrollers
✓Motorola’s 6811
✓Intel’s 8051
✓Zilog’s Z8
✓Microchip’s PIC ‰
❑There are also 16-bit and 32-bit microcontrollers made by various chip
makers

10. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 10
Microcontroller- Computing Needs
❑Meeting the computing needs of the task at hand efficiently and cost
effectively
✓Speed
✓Packaging
✓Power consumption
✓The amount of RAM and ROM on chip
✓The number of I/O pins and the timer on chip
✓How easy to upgrade to higher performance or lower power-consumption versions
✓Cost per unit

11. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 11
Microcontroller- Manufacturer
❑Availability of software development tools, such as compilers,
assemblers, and debuggers ‰
❑Wide availability and reliable sources of the microcontroller
➢The 8051 family has the largest number of diversified (multiple source) suppliers ƒ
✓Intel (original) ƒ
✓Atmel ƒ
✓Philips/Signetics ƒ
✓AMD ƒ
✓Infineon (formerly Siemens) ƒ
✓Matra ƒ
✓Dallas Semiconductor/Maxi

12. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 12
Applications of Microcontroller
✓Household appliances: Microwave oven, washing machine, coffee machines, refrigerators,
digital cameras, alarm clocks, toys, home security systems, remote controllers, exercise
machines, sewing machines, air conditioners, etc.
✓Office and commercial appliances: Fax machine, photocopier, scanner or printer machine,
intercom, computer systems (discussed below), calculators, ATM machines, CCTV camera and
surveillance systems, point of sale systems, weighing scales, elevators, lifts, and many products
included in household appliances.
✓Telecommunication: Telephones, phone answering machines, mobile phones, satellites, etc.
✓ Entertainment and gaming: Televisions, VCRs, music players, stereo systems, set-top boxes, play
stations, video games, musical instruments, etc.
✓Computer systems: Keyboard controller, CD drive or hard-disk controller, CRT controller, DRAM
controller, printer controller, LAN controller, etc.

13. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 13
Applications of Microcontroller
✓Automotive industry: Fuel injection, ABS, ignition, power windows and seats, climate control,
air bags, brake control, etc.
✓Industrial automation and manufacturing: Motor control systems, data acquisition and
supervisory systems, industrial robots, electronic metering, etc.
✓Electronic measurement instruments: Digital multi-meters, frequency synthesizers and
oscilloscopes, logic analyzers, spectrum analyzers, digital thermometers, tachometers, etc.
✓ Biomedical systems: ECG recorder, blood-cell analyzers, glucose monitor, patient monitoring
systems, etc.
✓Military weapons, guidance and positioning systems.
✓Aerospace industry.
✓And any automatic or semiautomatic devices around us usually contain microcontrollers

14. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 14
Microcontroller- 8051
❑Intel introduced 8051, referred as MCS51, in 1981
➢The 8051 is an 8-bit processor ƒ
✓The CPU can work on only 8 bits of data at a time
➢The 8051 had ƒ
✓ 128 bytes of RAM ƒ
✓4K bytes of on-chip ROM ƒ
✓Two timers ƒ
✓ One serial port ƒ
✓Four I/O ports, each 8 bits wide ƒ
✓6 interrupt sources ‰
❑The 8051 became widely popular after allowing other manufactures to
make and market any flavor of the 8051, but remaining code-compatible

15. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 15
Microcontroller 8051- Block Diagram

16. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 16
Microcontroller 8051- Block Diagram

17. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 17
Microcontroller 8051- Block Diagram
❑The 8051 is a subset of the 8052 ‰
❑The 8031 is a ROM-less 8051
✓Add external ROM to it
✓You lose two ports, and leave only 2 ports for I/O operations

18. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 18
Microcontroller- 8051
Feature 8031 8051 8751 8032 8052 8752
Program memory
None ROM
less
4KROM 4KEPROM
None
ROMless
8KROM 8KEPROM
Data memory 128Bytes128Bytes128RAM 256Bytes 256Bytes256Bytes
Timers/counters
(16-bit)
2 2 2 3 3 3
I/O pins 32 32 32 32 32 32
Serial port 1 1 1 1 1 1
Interrupt sources
(Reset not included)
5 5 5 6 6 6

19. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 19
Microcontroller 8051- Architecture

20. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 20
Microcontroller 8051 Architecture
❑ALU
✓Performs arithmetic and logical operations.
✓8-Bit
✓ALU also updates information about the nature of the result in the flag register (PSW)
❑Memory
✓Separate on-chip program and data memory
✓The program instructions are stored in a program memory
✓4K ROM
❑Peripherals
✓Two 16-bit timers (8052 has three timers) that are used for timing and counting
applications.
✓Full duplex serial port (UART) to handle serial data transmission and reception.

21. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 21
Microcontroller 8051 Architecture
❑Timing and Control Unit
✓This unit generates all timing and control signals necessary for the execution of
instructions and synchronizes all internal activities with the clock
❑Oscillator
✓Internal (on-chip) oscillator circuit (partial circuit) which generates the clock pulses by
which all internal operations are synchronized.
✓The external resonant circuit is connected with this internal on-chip oscillator circuit to
make a complete oscillator.
✓Quartz crystal is used to make oscillator functional.
✓Typically, 12 MHz (or 11.0592MHz to support standard baud rates for serial port) crystal
is used.

22. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 22
Programming Model of the 8051
❑Programmer’s view of a
microcontroller/ processor
❑Collection of internal registers
❑Contains 8 (or 16) bit registers
and memory locations
❑Each register (or memory
location) has an internal 1-
byte address with exception
of program counter.
❑Some registers are byte as
well as bit addressable

23. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 23
8051 Register
❑Register are used to store information temporarily, while the information could be
✓a byte of data to be processed, or an address pointing to the data to be fetched
❑The vast majority of 8051 register are 8-bit registers
✓There is only one data type, 8 bits
❑The 8 bits of a register are shown from MSB D7 to the LSB D0
✓With an 8-bit data type, any data larger than 8 bits must be broken into 8-bit chunks before it is
processed

24. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 24
Most Widely Register
❑The most widely used registers
✓A (Accumulator): For all arithmetic and logic instructions
✓B,R0,R1,R2,R3,R4,R5,R6,R7
✓DPTR (data pointer), and PC (program counter)

25. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 25
Memory Organization
❑The 8051 On-chip memory is organized into three general categories; Special
Function Registers, internal RAM and internal ROM
1. Special Function Registers (SFRs)
✓Math registers: A and B
✓Status register: PSW (Program Status Word)
✓Program counter: PC
✓Pointer registers: DPTR (Data Pointer) and SP (Stack Pointer)
✓Input output port latches: P0, P1, P2, and P3
✓Peripheral data registers: TL0, TH0, TL1, TH1, and
✓SBUF Peripheral control registers: IP, IE, TMOD, TCON, SCON, and PCON

26. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 26
Memory Organization-Internal RAM
2. Internal RAM
❑128 bytes of internal RAM
❑Since it is available on-chip, it is fastest and most flexible
❑This memory is subdivided into three categories as specified below:
✓Register Banks: Bank 0, Bank 1, Bank 2 and Bank 3 (00H to 1FH)
✓Bit Addressable RAM: Memory locations from addresses 20H to 2FH
✓General Purpose RAM: Memory locations from addresses 30H to 7FH

27. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 27
Memory Organization - Internal ROM
3. Internal ROM
✓It is used to store program instructions to be executed by the microcontroller
✓It may also be used to store permanent data like constants, passwords and lookup tables.
The 8051 has 4Kbytes of internal ROM
✓It is to be noted that different variants of 8051 has different amount and type of on-chip
ROM

28. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 28
Memory Organization- Special Function Registers (SFRs)
4. Special Function Registers (SFRs)
A.Accumulator: A
✓All arithmetic operations like addition, subtraction, multiplication and division
✓ Majority of logical operations like logical AND, OR, NOT, EX-OR and Rotate
✓All data transfer between the 8051 and any external memory.
B. Register B
✓It is used along with A in multiplication operation to hold one of the operands (either
multiplier or multiplicand) and to store higher-order byte of the result
✓It is also used in division operation to hold divisor and to store remainder of the result.
When not used with multiplication or division, it can be used as a general-purpose register
where one byte of data may be stored

29. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 29
Memory Organization- Special Function Registers (SFRs)
4. Special Function Registers (SFRs)
C. PSW Program Status Word
✓It is an 8-bit register
✓It is also referred as flag register or processor status word
✓Flag is a flip-flop (1-bit storage element) used to store and indicate the nature of result
produced by execution of certain instructions
✓The state of flags (0 or 1) are tested by other instructions (program flow control or branch
instructions) to make decisions

30. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 30
C. PSW Program Status Word
✓CY-Carry Flag: It is a carry (or borrow) used in addition and subtraction operations. It is set to
1 when there is carry out from MSB (D7 bit) after an addition (or a borrow into D7 bit during a
subtraction).It is also used as the ‘Accumulator’ for the Boolean operations
✓AC-Auxiliary Carry Flag :It is a half carry (carry out from bit D3 to D4) used in conventional
BCD arithmetic
✓F0-Flag 0: It is a general-purpose flag. It can be used as a one-bit memory location to record
some event
✓RS0 and RS1- Register Bank Select Bits: These bits are used to select the register bank.
✓OV-Overflow Flag: It is set to 1 to indicate that result of signed arithmetic is erroneous (out of
range).
✓P-Parity Flag: It indicates the parity of the Accumulator; it is set to 1 if the accumulator
register has odd number of ones, otherwise reset to 0, i.e. even parity
Memory Organization- Special Function Registers (SFRs)

31. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 31
The program status word (PSW) register, also referred to as the flag register, is an
8 bit register
➢Only 6 bits are used
✓These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow)
✓–They are called conditional flags, meaning that they indicate some conditions that resulted
after an instruction was executed
✓The PSW3 and PSW4 are designed as RS0 and RS1, and are used to change the bank
➢The two unused bits are user-definable
Memory Organization- Special Function Registers (SFRs)

32. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 32
Memory Organization- Special Function Registers (PSW)

33. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 33
Memory Organization- Special Function Registers (PSW)

34. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 34
Memory Organization- Special Function Registers (PSW)

35. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 35
Memory Organization- Special Function Registers (PSW)

36. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 36
D. Program Counter
✓PC Program Counter (PC) is a 16-bit register
✓It always contains the memory address of the next instruction to be executed, i.e. it points to
the instruction that is to be executed next
✓As the CPU fetches the op-code (instruction byte) from the program memory, the PC is
incremented automatically to point to the next instruction- Incremented by 1
✓If 2-byte instruction is being executed, the PC is incremented by 2
✓There is no direct way to modify the PC but it can be modified using jump or call instructions
can access program addresses from 0000H to FFFFH
Memory Organization- Special Function Registers (SFRs)

37. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 37
E. Data Pointer (DPTR)
✓DPTR is a 16-bit register
✓It is used to point to data byte in external data (RAM) or program (ROM) memory
✓It can be used as a single 16-bit register or can also be accessed as two separate 8-bit registers
named DPL and DPH, where DPH means higher byte of the DPTR and DPL is lower byte of the
DPTR
✓DPTR is under the control of the program, i.e. a programmer can write any value in it at any
time as shown in the following instruction:
MOV DPTR, #1234H
Memory Organization- Special Function Registers (SFRs)

38. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 38
F. Stack Pointer (SP)
✓SP Stack pointer always points to the top of the stack and used to access data from there
✓It is an 8-bit register
✓It should be initialized to a defined value (its default value is 07H)
✓While writing a new data byte on the stack, SP is automatically incremented by 1 and data
byte is stored at an address SP+1
✓While retrieving, data will be read from address in SP and then SP is decremented by 1
✓The data is stored on to the stack using PUSH and CALL instructions and retrieved using POP
and RET instructions
✓Interrupts also use the stack to store the return addresses
Memory Organization- Special Function Registers (SFRs)

39. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 39
G. I/O Port Registers (Latches) : P0, P1, P2 and P3
✓The 8051 has four 8-bit ports named as P0, P1, P2 and P3, each can be used as an input or
output or both
✓All ports are byte as well as bit addressable
✓Each bit corresponds to one of the pin of the microcontroller
✓P0, P2 and P3 pins have dual functions, but only one function can be used at a time
H. Peripheral Data Registers: TL0, TH0, TL1, TH1, and SBUF
✓TL0, TH0, TL1, TH1, and SBUF together represents a16-bit register for timer 0
✓The value in this register determines the timing of events controlled by a timer.
✓They are also used as event counters
✓Similarly, TL1 and TH1 are registers for timer1
✓SBUF (serial buffer) register is used to hold data to be transmitted or received for serial port
Memory Organization- Special Function Registers (SFRs)

40. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 40
I. Peripheral Control Registers: IP, IE, TMOD, TCON, SCON, and PCON IP
✓IP (interrupt priority) register is used to assign priorities to different interrupt sources
✓IE (interrupt enable) register is used to enable/disable interrupts
✓TMOD (timer mode) is used to control behavior, i.e. mode of operation of timers
✓TCON (timer control) is used to start/stop timers. It also contains the status bits of the
timers and status/control bits for the external interrupts
✓ SCON (serial port control) register is used to control the modes of operation of the
serial port; it also contains the status bits to indicate completion of data transmission
and reception
✓PCON (power mode control) register is used to select power saving modes of
operations, i.e. power down and idle mode. It contains a bit to double the baud rate
for serial port and two general-purpose user flags
Memory Organization- Special Function Registers (SFRs)

41. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 41
Memory Organization - Internal RAM
Internal RAM
❑The 8051 microcontroller has a total of
128 bytes of internal RAM
❑These bytes are assigned addresses 00H
to 7FH. These 128 bytes are grouped into
three different areas.
A.Register Banks
B.Bit Addressable Memory
C.General-Purpose RAM

42. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 42
Memory Organization - Internal RAM
A.Register Banks
✓The first 32 bytes from addresses 00H to 1FH are organized as four banks
✓Each bank is made up of eight registers named R0 to R7
✓The four register banks are numbered 0 to 3, i.e. bank0, bank1, bank2 and bank3
✓Out of these four banks (set of R0 to R7), only one bank can be accessed at any
time
✓Bits RS0 to RS1 in the PSW (Program Status Word) determines which register bank
is currently in use
✓These two bits can be modified at any time by a program to select any one of the
bank

43. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 43
Memory Organization - Internal RAM
B.Bit Addressable Memory
✓The 8051 has a bit-addressable area of 16 bytes from byte addresses 20H to 2FH in
internal RAM, forming a total of 128 (16 × 8) addressable bits
✓An addressable bit can be accessed by its bit addresses from 00H to 7FH
✓Besides these 128 bits, majority of SFRs are also bit addressable
✓The instruction that uses this address determines whether a byte or bit is being
referenced without confusion

44. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 44
Memory Organization - Internal RAM
C.General-Purpose RAM
✓RAM Bytes from memory locations 30H to 7FH are used for general-purpose data storage
✓These 80 locations are widely used by programmers to store temporary data and
intermediate results
✓This area of memory is also used as a system stack
✓ The stack is a section of memory in the internal RAM that is used for temporary storage
and retrieval of data (or addresses), while the execution of a program
✓It is the Last In First Out (LIFO) type memory
✓This section of memory is accessed by certain instructions or events (like interrupts)
✓The register used to access contents of the stack is called stack pointer
✓It is an 8-bit register
✓The power on default value of the SP register is 07H

45. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 45
Memory Organization - Internal RAM
❑There are 128 bytes of RAM in the 8051
✓Addresses 00 to 7FH
✓The 128 bytes are divided into three
❑Different groups as follows:
1.A total of 32 bytes from locations 00 to 1F hex are set aside for register
banks and the stack
2.2A total of 16 bytes from locations 20H to 2FH are set aside for bit-
addressable read/write memory
3. A total of 80 bytes from locations 30H to 7FH are used for read and
write storage, called scratch pad

46. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 46
Memory Organization - Internal RAM
❑There are 128 bytes of RAM in the 8051
✓Addresses 00 to 7FH
✓The 128 bytes are divided into three
❑Different groups as follows:
1.A total of 32 bytes from locations 00 to 1F hex are set aside for register banks and
the stack
2.A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable
read/write memory
3. A total of 80 bytes from locations 30H to 7FH are used for read and write storage,
called scratch pad

47. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 47
Memory Organization - Internal RAM
❑These 32 bytes are divided into 4
banks of registers in which each
bank has 8 registers, R0-R7
✓RAM location from 0 to 7 are set aside for
bank 0 of R0-R7 where R0 is RAM location
0, R1 is RAM location 1, R2 is RAM
location 2, and so on, until memory
location 7 which belongs to R7 of bank 0
✓It is much easier to refer to these RAM
locations with names such as R0, R1, and
so on, than by their memory locations
✓Register bank 0 is the default when 8051
is powered up

48. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 48
Memory Organization - Internal RAM
❑We can switch to other banks by
use of the PSW register
✓Bits D4 and D3 of the PSW are used to
select the desired register bank
✓Use the bit-addressable instructions SETB
and CLR to access PSW.4 and PSW.3

49. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 49
Memory Organization - Internal RAM
❑The stack is a section of RAM used by the CPU to store information temporarily
✓This information could be data or an address
❑The register used to access the stack is called the SP (stack pointer) register
✓The stack pointer in the 8051 is only 8 bit wide, which means that it can take value of 00 to
FFH
✓When the 8051 is powered up, the SP register contains value 07
✓RAM location 08 is the first location begin used for the stack by the 8051
❑The storing of a CPU register in the stack is called a PUSH
✓SP is pointing to the last used location of the stack
✓As we push data onto the stack, the SP is incremented by one
❖This is different from many microprocessors

50. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 50
Memory Organization - Internal RAM
❑Loading the contents
of the stack back into
a CPU register is called
a POP
✓With every pop, the top
byte of the stack is copied
to the register specified by
the instruction and the
stack pointer is
decremented once

51. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 51
Memory Organization - Internal RAM

52. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 52
Memory Organization - Internal RAM
❑The CPU also uses the stack to save the address of the instruction just
below the CALL instruction
✓This is how the CPU knows where to resume when it returns from the called
subroutine
❑The reason of incrementing SP after push is
✓Make sure that the stack is growing toward RAM location 7FH, from lower to upper
addresses
✓Ensure that the stack will not reach the bottom of RAM and consequently run out of
stack space
✓If the stack pointer were decremented after push
❖We would be using RAM locations 7, 6, 5, etc. which belong to R7 to R0 of bank
0, the default register bank

53. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 53
Memory Organization - Internal RAM
❑When 8051 is powered
up, register bank 1 and
the stack are using the
same memory space
❑We can reallocate
another section of RAM
to the stack

54. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 54
Memory Organization - Internal ROM
Internal ROM
❑The 8051 microcontroller has a
total of 4Kbytes of internal ROM
(on-chip)
❑It occupies address range from
0000H to 0FFFH
❑Since it is used to store program
instructions (code), it is also called
program memory or code memory

55. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 55
Addressing Modes in 8051
❑The CPU can access data in various ways, which are called addressing modes
1.Immediate : The data (constant) is specified as a part of instruction in a
program memory.
✓The data is available immediately as a part of instruction itself, therefore
immediate addressing is very fast.
2.Register : Operands are specified by register names
3.Direct : The data is accessed directly from the memory address specified as
one of the operand, i.e. one of the operand is an 8-bit address for internal
RAM location

56. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 56
Addressing Modes in 8051
4.Register indirect :
✓The data is specified indirectly in an instruction, i.e. address of the
data (rather than data itself) is specified as one of the operand
✓The register holds the address that contains the data, i.e. the number
in the register is treated as a pointer to address
✓Indirect addressing mode is the most flexible and useful in array
operations. There are two types of indirect addressing in the 8051
A.Register Indirect Addressing Mode
B.Indexed Addressing Mode

57. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 57
Addressing Modes in 8051
A.Register Indirect Addressing Mode
✓The register indirect addressing uses only register R0 or R1 to hold address
of the data in internal RAM, these two registers are also referred to as
pointer registers or simply pointers
✓The symbol @ is used along with R0 or R1 to indicate indirect addressing
MOV @Ri, #data // load constant value in to address contained in Ri
MOV @R0, #30H // If R0=40H, " (40H)=30H

58. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 58
Addressing Modes in 8051
B.Indexed Addressing Mode
✓Two registers are used to form the address of the data
✓The contents of either DPTR or PC are used as a base address and the A is used as index
(or offset) address
✓The final address is formed by adding these two registers
✓It results in a forward reference of 0 to 255 bytes from the base address.
✓They are used to access only program memory
MOVC A, @A+PC // copy data (or code) byte from program memory address formed by
//addition of contents of A and PC into A
MOVC A, @A+DPTR // copy data (or code) byte from program memory address formed by
// addition of contents of A and DPTR into A
✓MOVC means ‘move constant’

59. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 59
Addressing Modes in 8051- Operands
❑Operand Modifiers
✓8051 instructions uses symbols # and @ to distinguish addressing mode
✓# written before operand indicates that it is an immediate operand
✓@ placed before an operand indicates that indirect addressing mode is used
MOV A, #50H // 50H is immediate operand
MOV A, 50H // 50H is direct operand
MOV A, R1 // R1 is register operand
MOV A, @R1 // R1 is indirect register operand

60. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 60
Assembly Language
❑Assembly language is referred to as a low level language
✓It deals directly with the internal structure of the CPU
❑Assembly language instruction includes
✓a mnemonic (abbreviation easy to remember) the commands to the CPU,
❖telling it what those to do with those items
✓Optionally followed by one or two operands the data items being manipulated
❑A given Assembly language program is a series of statements, or lines
✓Assembly language instructions
❖Tell the CPU what to do
✓Directives (or pseudo-instructions)
❖Give directions to the assembler

61. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 61
8051 Instructions- Directive
❑The DB directive is the most widely used data directive in the assembler
✓It is used to define the 8-bit data
✓When DB is used to define data, the numbers can be in decimal, binary, hex, ASCII
formats
❑ORG (origin) directive is used to indicate the beginning of the address
✓The number that comes after ORG can be either in hex and decimal ƒ I
✓If the number is not followed by H, it is decimal and the assembler will convert it to
hex ‰
❑START -This indicates to the assembler the start of the source (asm) file
❑END -This indicates to the assembler the end of the source (asm) file
✓The END directive is the last line of an 8051 program ƒ
✓Mean that in the code anything after the END directive is ignored by the assembler

62. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 62
8051 Instructions- Directive
❑EQU (equate) -This is used to define a
constant without occupying a memory
location
✓The EQU directive does not set aside storage for a
data item but associates a constant value with a
data label ƒ
✓When the label appears in the program, its
constant value will be substituted for the label
✓Assume that there is a constant used in many
different places in the program, and the
programmer wants to change its value
throughout ƒ
✓By the use of EQU, one can change it once and
the assembler will change all of its occurrences

63. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 63
8051 Instructions-MOV
❑MOV destination, source ;copy source to dest.
✓The instruction tells the CPU to move (in reality, COPY) the source operand to the
destination operand

64. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 64
8051 Instructions-MOV
❑Value (proceeded with #) can be loaded directly to
registers A, B, or R0 – R7
❑If values 0 to F moved into an 8-bit register, the rest of the bits are
assumed all zeros ƒ
✓MOV A, #5” ; the result will be A=05; i.e., A = 00000101 in binary
✓Moving a value that is too large into a register will cause an error ƒ
✓MOV A, #7F2H ; ILLEGAL: 7F2H>8 bits (FFH)

65. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 65
8051 Instructions-ADD
❑ADD A, source ; ADD the source operand ;to the accumulator
✓The ADD instruction tells the CPU to add the source byte to register A and put the result in register A
✓Source operand can be either a register or immediate data, but the destination must always be register A
✓“ADD R4, A” and “ADD R2, #12H” are invalid since A must be the destination of any arithmetic operation

66. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 66
8051 Instructions
❑ADDC A, source ; Add with carry
❑SUB A, source ; Subtract the source operand ;to the accumulator
❑SUBB A, source ; Subtracts with borrow
❑DIV AB ; Divide A by B, store the result in A and remainder in B
❑INC destination ; add one to the destination operand
❑DEC destination ; subtract one form the destination operand
❑MOVC A, @A+PC; means ‘move constant, copy data (or code)
byte from program memory address formed by addition of
contents of A and PC into A

67. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 67
8051 Instructions
❑ANL destination, source ; destination =destination AND source
❑ORL destination, source ; destination =destination OR source
❑XRL destination, source ; destination =destination EX-OR source
❑CLR A ; clear accumulator, A=00H
❑CPL A ; complement A, A= A
❑RL A ; rotate A one bit position to the left, bit D0 to D1, bit D1 to D2,
…, bit D6 to D7 and bit D7 to D0
❑RR A ; rotate A one bit position to the right, bit D0 to D7, bit D7 to
D6, …, bit D2 to D1 and bit D1 to D0
❑Call ; instruction is used to call subroutine
❑RET ; transfers control back to the caller

68. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 68
8051 Jump Instructions

69. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 69
8051 Arithmetic Instructions Summary

70. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 70
8051 Logical Instructions Summary

71. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 71
8051 Logical Instructions Summary

72. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 72
Assembly Language Program
❑An Assembly
language
instruction
consists of
four fields:
[label:]
Mnemonic
[operands]
[;comment]

73. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 73
Assembly Language: Examine the list file and how the code is placed in ROM
After the program is burned into ROM,
the opcode and operand are placed in
ROM memory location starting at 0000

74. ❑A step-by-step description of the action of the 8051 upon applying power on it
1.When 8051 is powered up, the PC has 0000 and starts to fetch the first opcode from
location 0000 of program ROM
✓Upon executing the opcode 7D, the CPU fetches the value 25 and places it in R5
✓Now one instruction is finished, and then the PC is incremented to point to 0002, containing opcode 7F
2.Upon executing the opcode 7F, the value 34H is moved into R7
✓The PC is incremented to 0004
1.The instruction at location 0004 is executed and now PC = 0006
2.After the execution of the 1-byte instruction at location 0006, PC = 0007
3.Upon execution of this 1-byte instruction at 0007, PC is incremented to 0008
✓This process goes on until all the instructions are fetched and executed
✓The fact that program counter points at the next instruction to be executed explains some
microprocessors call it the instruction pointer
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 74
Assembly Language- Program

75. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 75
Reference
❖Muhammad Ali Mazidi Janice Gillispie Mazidi Rolin D. McKinlay
“The 8051 Microcontroller and Embedded Systems Using
Assembly and C”
❖Manish K Patel,“The 8051 Microcontroller Based Embedded
Systems ”