Microcontroller Introduction and the various features

vipulkondekar 18 views 21 slides Oct 02, 2024
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About This Presentation

Introduction


Slide Content

8051 Internal Block Diagram

3 CM MOVC A,@A + DPTR ;A  CM(A+DPTR) MOVC A,@A + PC ;A  CM(A+PC) PC = PC(15..0) DPTR = DPTR(15..0)

4 Data memory XM DM MOV A,62H MOV R1,#62H MOV A@R1 MOV A,0A2H MOV R1,#0A2H MOV A@R1

5 Data Memory (DM)

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9 Program Status Word (PSW) D0 D7 D6 D5 D4 D3 D2 - D0 PSW D0 CY AC F0 RS1 RS0 OV - P PSW Carry flag (CY) Is a dual-purpose. Carry out of bit 7 during add, or borrow into bit 7 during a subtract. EX: MOV A, #FFH ADD A, #1 What is the state of the carry flag and the content of the accumulator after execution of the following instruction sequence? MOV R5, #55H; MOV A, #0AAH; ADD A, R5; Solution: A=FFH and CY=0 (No Carry) A=00H and sets the carry flag in the PSW (ie CY=1).

10 Program Status Word (PSW) D0 D7 D6 D5 D4 D3 D2 - D0 PSW D0 CY AC F0 RS1 RS0 OV - P PSW Auxiliary Carry flag (AC) When adding a BCD values, the AC is set if a carry was generated out of bit 3 into bit 4. What is the state of the AC and the content of the accumulator after execution of the instruction sequence below? MOV R5, #1; MOV A, #9; ADD A, R5; Solution: A=10H (BCD) =10 10 = 00010000B  AC=1

11 Program Status Word (PSW) D0 D7 D6 D5 D4 D3 D2 - D0 PSW D0 CY AC F0 RS1 RS0 OV - P PSW Register bank select bit (RS1 and RS0) RS1 RS0 Register Bank # 0 0 0 0 1 1 0 2 1 1 3 SETB RS1; CLR RS0;  Register Bank 2 SETB RS1 (= SETB 0D4H) SETB RS0 (=SETB 0D3H)

12 Program Status Word (PSW) D0 D7 D6 D5 D4 D3 D2 - D0 PSW D0 CY AC F0 RS1 RS0 OV - P PSW Overflow Flag (OV) When signed numbers are added or subtracted, software can examine this bit to determine if the result is in the proper range ( -128 < X < 127). If X >=127 and X <=-128  OV=1 MOV R7, #0FFH; MOV A, #0FH; ADD A, R7; Solution R7=11111111 (00000000+1=-00000001B=-1) A=00001111 (15) A=-1+15=14 =0EH< 127  OV=0 (No overflow)

13 Program Status Word (PSW) D0 D7 D6 D5 D4 D3 D2 - D0 PSW D0 CY AC F0 RS1 RS0 OV - P PSW Parity bit (P) The P is set or cleared each machine cycle to establish even parity accumulator. MOV A, #55H A=01010101B  numbers of 1-bit = 4  P=0

Addressing Modes Immediate Mode – specify data by its value mov A, #0 ;put 0 in the accumulator ;A = 00000000 mov R4, #11h ;put 11hex in the R4 register ;R4 = 00010001 mov B, #11 ;put 11 decimal in b register ;B = 00001011 mov DPTR,#7521h ;put 7521 hex in DPTR ;DPTR = 0111010100100001

Addressing Modes Register Addressing – either source or destination is one of CPU register MOV R0,A MOV A,R7 ADD A,R4 ADD A,R7 MOV DPTR,#25F5H MOV R5,DPL MOV R,DPH Note that MOV R4,R7 is incorrect

Addressing Modes Direct Mode – specify data by its 8-bit address Usually for 30h-7Fh of RAM Mov a, 70h ; copy contents of RAM at 70h to a Mov R0,40h ; copy contents of RAM at 70h to a Mov 56h,a ; put contents of a at 56h to a Mov 0D0h,a ; put contents of a into PSW

Addressing Modes Direct Mode – play with R0-R7 by direct address MOV A,4  MOV A,R4 MOV A,7  MOV A,R7 MOV 7,2  MOV R7,R6 MOV R2,#5 ;Put 5 in R2 MOV R2,5 ;Put content of RAM at 5 in R2

Addressing Modes Register Indirect – the address of the source or destination is specified in registers Uses registers R0 or R1 for 8-bit address: mov psw, #0 ; use register bank 0 mov r0, #0x3C mov @r0, #3 ; memory at 3C gets #3 ; M[3C]  3 Uses DPTR register for 16-bit addresses: mov dptr, #0x9000 ; dptr  9000h movx a, @dptr ; a  M[9000] Note that 9000 is an address in external memory

Use Register Indirect to access upper RAM block (+8052)

Addressing Modes Register Indexed Mode – source or destination address is the sum of the base address and the accumulator(Index) Base address can be DPTR or PC mov dptr, #4000h mov a, #5 movc a, @a + dptr ;a  M[4005]

Addressing Modes Register Indexed Mode continue Base address can be DPTR or PC ORG 1000h 1000 mov a, #5 movc a, @a + PC ;a  M[1008] Nop Table Lookup MOVC only can read internal code memory PC
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