microelectronics-6ed-ch7_a-ppt-2025-spring

電子2上課的ppt

1. Microelectronic Circuits II
•Textbook: Sedra/Smith 8ed.
•Outlines:
–Building Blocks of Integrated-Circuit Amplifiers
–Differential and Multistage Amplifiers
–Frequency Response
–Feedback
•HW assignment for each chapter
•Grading :
–2 Midterm (第6,11週Mon), 30% for each
–Final exam (第16週Thu), 40%

2. Microelectronic Circuits II
Building Blocks of Integrated-Circuit Amplifiers
Chia-Ming Tsai
NYCU
Department of Electrical Engineering

3. Outlines
•IC Design Philosophy
•Current Mirrors and Current Sources
•Basic Gain Cell : CS / CE Amps
•Current Buffers : CG / CB Amps
•Cascode / Cascade / … Amps

4. IC Design Philosophy
•IC fabrication technology imposes constraints on –and provides
opportunities to –the circuit designer.
•Resistors: To minimize the chip area, large and even moderate-
size resistors are to be avoided. (use transistors to replace R)
•Capacitors: Large capacitors are not available, very small
capacitors are easy to fabricate.
•Power supplies: Supply voltage scaled down for advanced
technology.
•Bipolar / BiCMOS technologies : Used for high-quality Amps, high-
speed circuits, and low-noise circuits.
•CMOS technology : The main stream for SoCs.

5. Typical Values of CMOS Device Parameters
0.8μm 0.5μm 0.25μm 0.18μm
ParameterNMOS PMOS NMOS PMOS NMOS PMOS NMOS PMOS
T
ox(nm) 15 15 9 9 6 6 4 4
C
ox
(fF/μm
2
)
2.3 2.3 3.8 3.8 5.8 5.8 8.6 8.6
μ(cm
2
/V•s)550 250 500 180 460 160 450 100
μC
ox
(μA/V
2
)
127 58 190 68 267 93 387 86
V
t0(V) 0.7 -0.7 0.7 -0.8 0.43 -0.62 0.48 -0.45
V
DD(V) 5 5 3.3 3.3 2.5 2.5 1.8 1.8
|V
A’| (V/μm) 25 20 20 10 5 6 5 6
C
ov(fF/μm) 0.2 0.2 0.4 0.4 0.3 0.3 0.37 0.33

6. dependent technology-process :
A
AA
D
A
o
V
LVV
I
V
r




8. Technology Trend
•The oxide thickness (T
ox) scales down with the channel length,
reaching 4 nm for the 0.18-μm process.
•The oxide capacitance (C
ox) is inversely proportional to T
ox, thus
C
ox increases as the technology scales down.
•The transconductance parameters k
n’=μ
nC
oxandk
p’=μ
pC
oxhave
been steadily increasing→ Modern short channel devices achieve
required levels of bias currents at lower overdrive voltage, and
achieve higher transconductance.
•The threshold voltagesV
tnand |V
tp| have been decreasingwith
L
minfrom about 0.7~0.8V to 0.4~0.5V.
•The power supply V
DD has been reduceddrastically. (< 1V for
low-power circuits using advanced CMOS)

9. Technology Trend
•The voltage headroom for V
ovbecomes smaller.
•The channel length modulation effect is very pronounced in
modern submicron CMOS technologies (|V
A’|has been steadily
decreasing).
•Shorter devices exhibit much higher operating speeds and wider
amplifier bandwidths (C
ovhas been staying more or less constant).
f
Tfor a 0.25μm NMOS transistor can be as high as 10GHz.

10. Typical Values for BJTs
Standard High-Voltage ProcessAdvanced Low-Voltage Process
Parameter npn Lateral pnp npn Lateral pnp
A
E (μm
2
) 500 900 2 2
I
s (A) 5 x 10
-15
2 x 10
-15
6 x 10
-18
6 x 10
-18
β
0 (A/ A) 200 50 100 50
V
A (V) 130 50 35 30
V
CE0(V) 50 60 8 18
τ
F 0.35 ns 30 ns 10 ps 650 ps
C
je0 1 pF 0.3 pF 5 fF 14 fF
C
μ0 0.3 pF 1 pF 5 fF 15 fF
r
x(Ω) 200 300 400 200

11. Vertical pnp
in CMOS
Lateral pnp
in CMOS

12. BJT Characteristics
•The lateral pnphas characteristics that are much inferior to those of
the npn–a lowervalue of βand a much larger value of the forward
transit time τ
F.
•The saturation current (I
s)also has been reduced by about three
orders of magnitude due to dramatic reduction in device size.
•The base width (W
B)achieved in the advanced process is on the
order of 0.1μm, as compared to a few microns in the standard high-
voltage process.
•The forward transit time τ
F determines the transition speed of
operation.
•The unity-gain frequency f
Tof the lateral pnpis two orders of
magnitude lower than that of the npnfabricated in the same
process.

13. BJT Characteristics
•For the modern low-voltage npn, f
Tcan be as high as 10~25GHz,
as compared to 400~600MHz for the high-voltage process.
•For the modern process, the Early voltage (|V
A|)is lowerthan its
value in the old high-voltage process.
•Breakdown voltage is reducedin the advanced technology.

14. IC Biasing –Current Sources and Current Mirrors
•Current steering –On an IC chip with a number of amplifier stages,
a constant DC current is generated at one location and is then
replicated at various other locations for biasing the various amplifier
stages.
•Major design considerations
–Voltage headroom, output impedance, device matching…

15. NMOS Current Source
•Q
1: drain shorted to its gate,
forcing it to operate in the
saturation region.
•The relationship is determined by
the geometries of the transistor.
•The combination of Q
1and Q
2is
referred to as a current mirror. 
2
'
1
1
1
2
D n GS tn
W
I k V V
L



  
2
'
2
2
1
2
o D n GS tn
W
I I k V V
L

  

 1
DD GS
D REF
VV
II
R

  
 
2
1
/
/
o
REF
WLI
I W L

Channel length modulation
effectneglected.
(1)
(2)

16. Effect of V
oon I
o
•Consider channel length modulation effect,
we have
•The current source has a finite output
resistance
•V
Ais also proportional to the transistor
channel length
•Consider channel length modulation effect
•To ensure that Q
2is saturated, we must haveo GS t
V V V 2
2
o A
oo
oo
V V
Rr
II

  
 only when
o REF o GS
I I V V  
 
2
21
/
1
/
O GS
o REF
A
WL VV
II
W L V

 
  LRLV
oA if 

17. Example
•Given V
DD=3V, I
REF=100mA, W=10mm, L=1mm,
V
t=0.7V, k
n’=200mA/V
2
, V
A’=20V/mm. Let Q
1=Q
2.
•Find R.
•Find V
o(min). (i.e. Q
2remains in saturation)
•Find r
o.
•If V
ochanges by 1V, the corresponding change in
Io will be'2
1
1
1
2
D REF n OV
W
I I k V
L



 0.316
OV
VV 1
GS t OV
V V V V   31
20
0.1
DD GS
REF
VV
Rk
I
 
    min
0.3
O OV
V V V 0.2
A
O
D
V
rM
I
   2
5
O
O
o
V
IA
r
m

   V 20LVV
AA

18. CMOS Current-Steering Circuits
•Here Q
1together with Rdetermine
the reference current I
REF.
•To keep Q
2and Q
3in saturation
•For PMOS current mirror
•To keep Q
5in saturation
•Q
5is called current source
•Q
2is a current sink (Q
2is also called
current source in general) 
 
2
2
1
/
/
REF
WL
II
WL
  
 
3
3
1
/
/
REF
WL
II
WL
 2 3 1
,
D D SS OV
V V V V   55D DD OV
V V V  
 
5
54
4
/
/
WL
II
WL

NMOS mirror
PMOS mirror

19. CMOS Current-Steering Circuits
(a) Constant-current I
2is the bias
current for the source follower Q
6
(b) Constant-current I
5is the
loadcurrent for the common-
sourceamplifier Q
7.oR oR

20. A current source A current sink
CMOS Current-Steering Circuits

21. Improved Current Mirror
•Output resistance
−Assume Q
3and Q
2haves grounded gates,
similar to CG output impedance with source
impedance = r
o2
−Cascoding raises the output resistance of the
current source by the factor , which is
the intrinsic gain of the cascode transistor
•Cascodecurrent mirrors
•Q
1-Q
2forms the basic current mirror
•Since , improved current matching
•Also, V
DS2is shielded from V
oand I
obecome more stable
–Imply higher output impedance
•Drawback
–Increased voltage headroom
(Simple current mirror require only )(min) 2 3
2
o GS OV OV T
V V V V V    3 4 3 4 1 2G G GS GS DS DS
V V V V V V     OV
V 33mo
gr 2332323)1(
oomooomo rrgrrrgR  ) (If
23 OVOVVV 1
12

G
DD
V
VV

 1DV 4111
mm gg 11
mg

22. 2323
23232
1
)1(
)1(
ooom
o
o
o
ooom
o
o
o
rrrg
i
v
R
rrrg
v
r
v
i


 o
v 1v )
1
(||
3
21
m
o
g
rR To find v
141
11
mm
gg
 0
G
i o
ooom
o
v
rrrg
r
v
2323
2
1
)1( 
 0
Gv
supernode
Q
1,4m
o
m
eq
g
r
g
R
1
||
1


23. BJT Current Mirror
Both Q
1and Q
2 must operate in forward active region.
In general, the current transfer ratio is given by
Practically, Q
2is composed of mtransistors, each
matched to Q
1and connected in parallel. (I
S2 /I
S1=m)
The BJT mirror also has a finite output resistance
Minimum output voltage V
o(min)
•Difference between BJT and MOSFET Current Mirror
–Nonzero base current of the BJT (finite b causes an error in the current transfer ratio.
–The current transfer ratio is determined by the relative areas of the E-B junction of Q
1
and Q
2.2 2
11
Area of EBJ of Q
Area of EBJ of Q
OS
REF S
II
II
 2
2
o A
oo
oo
V V
Rr
II

  
 V3.0
)((min) 
satCEo VV
1 moR )for ( b

24. BJT Current Mirror : Effects of b& V
A
effectEarly
2
2
1
1
1
:effect Early thegConsiderin
1
1
1
1
:A node KCL@
. (2)
region active forwardin operated Q (1)
: thatAssume







 














 


A
BEO
REF
O
REF
C
REF
O
CREF
o
V
VV
m
m
I
I
m
m
I
mI
I
I
I
m
I
r
b
b
b
1 : m
A

25. v
v
i i BJT models

26. BJT Current-Steering Circuits

27. Improved BJT Current Source22
21
1
)(21
1
)1(
2
1
bbb
bb














REF
C
CREF
I
I
II
=> Boosted effective bBECE1
2
2V toincreased is V :Drawback
: resistanceOutput


oOrR
R
o
Goal :)(
2
bb
eff
+
2V
BE
_

28. Improved Current Source
Q
3
Q
1 Q
2
x
R  
)((min)
22
3

:tageoutput vol minimum Increased
mirrorcurrent cascode similar to : 1
: resistanceoutput Increased
)Q(for on.compensatibetter for increase toused is
satCEEOO
EoEmO
x
VRIV
RrRgR
R




 b

29. Small-Signal Operation of Current Mirrors
•Obtaining the small-signal parameters of the MOS current mirror as
a current amplifier.
Current amplifier model
Bias + Signal iis
iA

30. )(high 1 (2)
) (low 1 (1)
that required isit
gain,current overallhigher aobtain To
gain current Overall
1
1
1
oLo
o
inSin
S
i
o
iS
i
S
o
RRR
i
i
RRR
i
i
i
i
i
i
i
i
i
i



 ) (low 1 (2)
)(high 1 (1)
that required isit
gain, voltageoverallhigher aobtain To
gain voltageOverall
1
1
1
oLo
o
inSin
S
i
o
iS
i
S
o
RRR
v
v
RRR
v
v
v
v
v
v
v
v
v
v



 Current Amplifier Voltage Amplifier

31. •Substituting for g
m1,2= m
nC
ox(W/L)
1,2V
OV, where V
OVis the overdrive
voltage, yields for the short-circuit current gain
which is equal to the dc or large-signal current transfer ratio except
for a small error factorrepresented by the quantity in the square
brackets.
•We conclude that the current mirror is an excellent current amplifier
with
–relatively low input resistance (1/g
m1)
–relatively high output resistance (r
o2)
–a reliable gain determinedby the aspect ratios of the MOSFETs
Small-Signal Operation of Current Mirrors
small

32. The Wilson Current Mirror
•Pros : Both reduced β dependence and enhanced output resistance
•Cons: Reduced output voltage swing  
 
  
 
)(3BE1(min)
2
21
1
221
1

22
2
22
21
21
1
1
21
1
satCEO
REF
O
OREF
VVV
I
I
II
























bbb
bb
b
bb
bb
bb
b
b
b

33. The Wilson Current Mirror1 2 3 3 3
(for ) : Given , ( ) ( ), ( )
o
o C C B E C r x x o
Sol r i i i i i i KCL i KCL v KVL R     
supernode1for 2  bi 1for  bb
oir

34. The Wilson MOS Current Mirror
•Enhanced output resistance :
•Neglect the body effect in Q
3  ) same(for 2
3232 moomoomO grrgrrgR  x
om
m
x i
rg
g
i 

11
1
1 v  
  
   
  
O
R
mmomox
mxmomox
odxx
mxo
m
x
ggrgri
gigrgri
vriiv
gir
g
iv
11233
11233
3
11
1
111
11
||
1














35. The Wilson MOS Current Mirror
•Improved current matching by forcing 12 DSDSVV 1312 2
DSGSGSDS VVVV  12 DSDSVV

36. Resistance in ICs
t

37. Widlar Current Source

38. Widlar vs. Simple Current MirrorA 10m
OI A 10m
orefII A 10A 1 m
oref ImI

39. Widlar Current Source rRRrRR
EbEE ||)(||  E
R
v
i



1 
v
R
gi
E
m 









1
2 1i 2i )(neglected
||||||
1
2  rRrr
g
R
o
m
b  bR 















b
mmm
b
b
Rr
r
ggg
Rrrr
R



: ofeffect theinclude To 2i 2i

40. Comparison of BJT/MOS Current Sources

41. Common-Source Amplifier with Active Load
•Intrinsic gain :
–The maximum voltage gain available from a CS amplifier oo
in
omv
rR
R
rgA



PMOS
current
source. Assume 
I
oR )||(
I
oo
Rr omrgA
0 I
o
R

42. Common-Emitter Amplifier with Active Loadoo
in
omv
rR
rR
rgA



 )||(
I
oo
Rr
•Same intrinsic gain ( ) obtainedomrgA
0 . Assume 
I
oR I
o
R

43. Intrinsic Gain for BJT
•For the BJT, one can derive a formula for the intrinsic gain:
•Thus A
0is simply the ratio of the Early voltage V
A, which is a technology-
determinedparameter, and the thermal voltage V
T, which is a physical
parameter (approximately 0.025 Vat room temperature).
–The value of V
A ranges from 5V to 35V for modern technologies.
–The value of A
0ranges from 200V/V to 5000V/V, as such.
–It is important to note that for a given bipolar-transistor fabrication
process, A
0is independent of the transistor junction area and of its bias
current.T
A
om
C
A
o
T
C
m
V
V
rgA
I
V
r
V
I
g



0

44. Intrinsic Gain for MOSFET

D
oxnA
OV
A
OV
A
om
D
A
D
A
o
Doxn
OV
D
m
OVoxnD
I
WLCV
V
LV
V
V
rgA
I
LV
I
V
r
ILWC
V
I
g
VLWCI
)(22
2
2
2
2
1

0
2
m
m
m

















For A
0, we note the following:
1. The denominator V
OV/2is a design parameter. Although thevalue of
V
OVthat designers use for modern submicron technologies has been
steadilydecreasing, it is still about 0.15~0.3V. Thus V
OV/2 is 0.075~
0.15V, whichis 3 to 6 times higher than V
T. Furthermore, there are
reasons for selecting highervalues for V
OV.
2. The numerator V
Ais both process dependent (through V
A)anddevice
dependent(through L), and its value has been steadily decreasing with
the scaling down of thetechnology.
3. A
0can be increased by using a longer MOSFET operating at alower
V
OV. As usual, however, there are design trade-offs.
•For modern short-channeltechnologies, A
0is 10 V/V to 40 V/V, an order
of magnitude lower than BJT.

45. Intrinsic Gain for MOSFETD
oxnA
I
WLCV
A
)(2
0
m

: Threshold voltage
(BJT-like)
(BJT-like)

46. CS Amplifier
•Assume that Q
2and Q
3are matched (1:1).
•The value of V
SGis set by passing the reference bias current I
REFthrough Q
3.
•We have  
tpSGSD Vvvv  REF
A
o
I
V
r
2
2


47. Output Resistance Effect of Current-Source Load
Current-source load

48. Transfer Characteristic2DI
Larger
gaintnIOB
VvV 

49. Transfer Characteristic
•For amplifier operation, section III is the one of interest.
–The transfer curve is almost linear and is very steep, indicating large voltage gain.
–The end points of region III are Aand B
•At A,
•At B,
•The voltage gain of the voltage amplifier can be derived as
•Negative feedback is utilized to ensure that the circuit operates in region III. 
2111211
if
2
1
||
ooomoomV
rrrgrrgA  2OVDDOA
VVV  tnIOB
VvV 

50. Example
•Assume V
DD=3V
, V
tn=|V
tp|=0.6V, m
nC
ox=200mA/V
2
, and
m
pC
ox=65mA/V
2
.
•For all transistors, L=0.4mm, W=4mm,V
An=20V,
|V
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51. Gain-Boosting Technique
•Current buffer (Common-gate amplifier)
–Unity current gain
–Low input resistance (R
in<< r
o1) for higher current gain
–High output resistance (Kr
o1)for higher voltage gain

52. Common-Gate Amplifier
•Behave like a current buffer
•R
inis the input resistance looking into the source
of the CG transistor
•R
outis the output resistance looking back into the
drain with i
sigset to zero
•A
isis the current gain i
o/i
sigwith R
Lset to zero
(also called short-circuit current gain)

53. Input Resistancexgs
vv 











L
oLm
Lm
om
L
m
in
om
mino
in
R
rRg
Rg
rg
R
g
R
rg
gRr
R
if
if2
0 if1

1

,1For
1 , If
obtained becan Low
Supernode)()1(
)(
Loxomx
Lxoxmxx
Rrirgv
Rirvgiv



54. Short-Circuit Current Gain
Supernode1 ,1For 
issm ARg

55. Output Resistancesomoutsm
somooutom
sout
RrgRRg
RrgrRrg
RR
)( ,1For
)( ,1For
large afor obtained becan High



Supernode 
sosmxx
sxosxmxx
RrRgiv
RirRigiv


)1(
)(

56. Summary for CG Amplifier
•To summarize, the CG circuit has
–unity current gain
–low input resistance, obtained by dividing R
Lby g
mr
o
–high output resistance, obtained by multiplying R
sby g
mr
o
•All the properties mentioned above make the CG circuit an excellent current
buffer.

57. R
outof CS Amplifier with Source Resistance
Identical R
omodel
as the CG circuit
•The source degeneration multiplies r
oby the factor(1+g
mR
s).

58. Body Effect in CG Amplifier
•The body terminal acts as a second gate for the MOSFET
•The drain current becomes (small-signal) m gs mb bs
g v g v mb m
gg 0.1~ 0.2
(boosted g
m)

59. Common-Base Amplifier

60. )1 (if
omrg R
inof CB Amplifier








Lin
Le
in
om
emino
in
RRr
Rr
R
rg
rgrRr
R
if)(
0 if

,1For
1|| , If
obtained becan Low
max,


61. •We can find the short-circuit current gain of the CB amplifier byreplacing R
s
in the CG case with (R
e|| r
π), thus
•For g
mr
o>> 1 and R
e>> r
π, the result reduces to
Furthermore, if b>>1=>
A
isof CB Amplifier

62. •The output resistance can be obtained by replacing R
sin CG case with (R
e
||r
π),thus
which can be written in the alternative form as
•For g
mr
o>>1,
•Thus, similar to the CG amplifier, the CB amplifier exhibits an impedance
transformationproperty that raises the output resistance.
•R
out has an absolute maximum value obtained by setting R
e= as
R
outof CB Amplifier

63. CB Amplifier
•We conclude that the CB circuit behaves like an excellent current buffer with
–a current gain of nearly unity
–a low input resistance
–a high output resistance

64. R
outof Emitter-Degenerated CE Amplifier
•The emitter degeneration multiplies r
oby the factor[1+g
m(R
e||r
π)].
–Note that this factor has a maximum value of (1+g
mr
π)or (b+1),
obtainedwhen R
e>> r
π.

65. Cascode Amplifier
•CG and CB circuits
–Small input resistance
–High output resistance
–Suitable as current buffers
–Absence of Miller effect (smaller input capacitance)
•Make the high-frequency response of the CG and CB circuits far
superior to that of the CS and CE amplifiers.
•CascodeAmplifier
–CS/CE + CG/CB
–Combine the followings properties
•High input resistance and large transconductanceachieved in a
CS/CE amplifier
•Superior high-frequency response of the CG/CB circuit.
•Can be designed to obtain a wider bandwidth but equal DC gain
•Can be designed to increase the DC gain while leaving the gain-
bandwidth product unchanged.

66. Cascode Amplifier
•A configuration combined with CS/CE (for V-to-I) and CG/CB (for I-to-V)
•The CG/CB circuit provides a high R
out, thus enabling the cascodeamplifier
to have a higher voltage gain.
•For g
m1= g
m2= g
mand r
o1= r
o2= r
o,
–Thus cascodingincreases the gain magnitude from A
0to A
0
2
.
Open-circuit
voltage gain:
(Ideal).1)1( If
122 oom rrg 

67. Cascode Amplifier with Current Source Load
•Thus the gain magnitude will be reduced back to A
0.
•In fact, this cascodeamplifier does have a major advantage over the CS
circuit: It exhibits a much wider bandwidthdue to its smaller input
capacitance(theMiller effect).
C
GD1

68. 






10 if11
1 if2

)1( ,
1
,
1
Let
1
1
1
1
KC
KC
C
KCC
Cj
Z
Cj
Z


69. Improved CMOS Cascode
(for identical g
mand r
o)

70. Gain Analysis of Cascode Amplifier
Determining v
o1

71. Let r
o1= r
o2= r
o.
Case 1 : R
L = (an ideal current-source load)
Case 2 : R
L = (g
mr
o)r
o(a cascodecurrent-source load)
Case 3 : R
L = r
o(a simple current-source load)
Case 4 : R
L= 0.2r
0(for some RF amplifier applications)
Gain Analysis of Cascode Amplifier

72. BJT Cascode
•For g
m1= g
m2, r
o1= r
o2
which will be less than (g
mr
o)
2
.
•For r
o1>> r
2
(for same g
mand r
o)

73. Improved BJT Cascode

74. Alternative Cascodes
•Double cascading : Improved R
ooo
rAR
2
0
 •Folded cascode:
Improved voltage headroom

75. BiCMOS Cascode
•Combine bipolar and MOS transistors
•MOSFET input stage : provide high input resistance
•Bipolar cascode: reduce the input resistance of Q
2
•Double cascode: provide high output resistance

76. Source Follower

77. •For 1/g
mb<< r
o1, r
o3,
•Substituting for g
mb= χg
mwhere χ = 0.1 to 0.2,
•This is the maximum possible gain obtained from a source follower. The
actual gain will usually be lower because of the effect of r
o1and r
o3.
Source Follower

78. CD-CS / CC-CE / CD-CE Configurations
•Provide bandwidth much wider than CS amplifier.
•Q
2 still exhibit a Miller effect (for capacitance C), the output resistance of CC,
CD is much lower 1/(g
m+g
mb) to mitigate this effect.
•For the CD-CE case in (c),
–Q
1provides high input resistance
–Q
2provides high g
m → High gain

79. The Darlington Configuration
•Q
1collector is connected to that of Q
2.
•Boosted effective current gain :
•Can be implemented as a high-performance voltage follower.
•Use the CC-CC configuration 
212121 bbbbbbb 
eff bi)1(
1b b
i b
i)1)(1(
21
bb b
i)1(
12
bb b
i
1
b  
bi
2121 bbbb 
Boosted small-signalb
eff
For Q
1
bias

80. CC-CB / CD-CG Configurations
•Neither the CC nor the CB amplifier suffers from the Miller effect, the CC-CB
configuration has excellent high-frequency performance.
•In (a) we have 

Lm
L
b
Lc
i
o
eeeeein Rg
r
R
rI
RI
V
V
rrrrrrR
2
1
22
) & ( if : 21
2121211 


b
bbbb Lm
sigin
in
sig
o
sig
Rg
RR
R
V
V
R










2
1
: With LR