Microprocessor 8051

krishnaakshatanil 976 views 34 slides Jun 20, 2014
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PRESENTATION
ON
MICROPROCESSOR MICROPROCESSOR
8051
By: -
ANIL MAURYA
ELECTRICAL & ELECTRONICS
ENGINEER

GENERIC 8051 FEATURES

•Eight bit CPU with registers A and B

•Sixteen bit program counter (PC) and data pointer (DPTR)

•Eight-bit program status word (PSW)

•Eight bit stack pointer (SP)

•128 bytes of RAM and 4K ROM

•Thirty two input / output pins arranged as four 8 bit ports: P0 -P3 •
Two
16
-
bit
timers
/counters
:
T
0
and
T
1

•
Two
16
-
bit
timers
/counters
:
T
0
and
T
1

•Full duplex serial data receiver and transmitter: SBUF

•Two external and three internal interrupt sources

•Control registers TCON, TMOD, SCON, PCON, IP and IE.

•Oscillator and the clock circuits.

MathRegister
A
A and B CPU Registers:
A
A Register (Accumulator)
A
B Register
A
Multiplication and division can be performed only upon numb ers stored in the A and B
registers. All other instructions in the program can use this register as a spare
accumulator (A).

Program Status Word (PSW) Register
P - Parity bit.If a number stored in the accumulator is even then this bit wil l be automatically set
(1), otherwise it will be cleared (0). It is mainly used durin g data transmit and receive via serial
communication
.
communication
.
OV Overflowoccurs when the result of an arithmetical operation is large r than 255 and cannot be
stored in one register. Overflow condition causes the OV bit to be set (1). Otherwise, it will be cleared
(0).
RS0, RS1 - Register bank select bits.These two bits are used to select one of four regis ter banks
of RAM. By setting and clearing these bits, registe rs R0-R7 are stored in one of four banks of RAM.

A
F0 - Flag 0.This is a general-purpose bit available for use.
A
AC -Auxiliary Carry Flagis used for BCD operations only.
A
CY - Carry Flagis the (ninth) auxiliary bit used for all arithmetical o perations
and shift instructions.

INTRNAL RAM

REGISTER Bank
BANK1 BANK2 BANK3 BANK0

Internal ROM

Microcontroller has a 4 K byte internal ROM. The op codes of the instruction stored in the ROM.
The opcode fetch from the internal ROM.

DATA POINTER

Stack Pointer (SP) Register

I/O Ports:
A
Port 0:Port 0 is 8 bit port. It used as a input port or output port .when used as a output port ,the pin
latches that programmed to a 0 ,if used as a output port ,the pin latc hes that programmed to a 1.it Also
provide the facility for low orderadders bus forexternal memor y.
A
Port 1: Port 1is 8 bit port. It used as a input port or output port .when used as a output port ,the pin latches
that programmed to a 0 ,if used as a output port ,the pin latches that programmed to a 1.
A
Port 2:Port 0 is 8 bit port. It used as a input port or output port .when used as a output port ,the pin
latches that programmed to a 0 ,if used as a output port ,the pi n latches that programmed to a 1.it Also
provide the facility for high order adders bus for external m emory.
A
Port 3: Port 1is 8 bit port. It used as a input port or output port .whe n used as a output port ,the pin
latches that programmed to a 0 ,if used as a output port ,the pi n latches that programmed to a1.The
port 3 alternate uses shown in the following table:

TIMERS AND COUNTERS
The 8051 comes equipped with two 16 bit timers (T0, T1), both of
which may be controlled, set, read, and configured individu ally.
The 8051 timers have two general functions:
1 Count internal -acting as timer
2. Count external -acting as counter
All counter action is controlled by the TMOD and the TCON regi sters.

TMOD Register: TMOD Register:
GATE 1
/0 enables and disables Timer 1/0 by means of a sig nal brought to the
Timer 1 Timer 0
GATE 1
/0 enables and disables Timer 1/0 by means of a sig nal brought to the
INT1/0 pin (P3.3/P3.2)
1- Timer 1 operates only if the INT1 bit is set.
0- Timer 1 operates regardless of the logic state of the INT1 bit.
C/T 1/0selects pulses to be counted up by the timer/counte r 1:
1- Timer counts pulses from external source ,brought to the T1 pin
(P3.5)(counter)
0- Timer counts pulses from internal oscillator(timer )
T1M1,T1M0These two bits select the operational mode of the T imer 1.

Different modes of timers

Different modes of timers

TCON Register TCON Register
TF1
bit is automatically set on the Timer 1 overflow (i e when counting is over)
TF1
bit is automatically set on the Timer 1 overflow (i e when counting is over)
TR1bit enables the Timer 1.
1- Timer 1 is enabled.
0- Timer 1 is disabled.
TF0bit is automatically set on the Timer 0 overflow (i e when counting is over).
TR0bit enables the timer 0.
1- Timer 0 is enabled.
0- Timer 0 is disabled.

M
IE1 –External interrupt 1. set when INT1 is active( pin 3.3).Not related with
timer/counter
M
IT1 –If IT1 =1 , INT1 is enabled by falling edge si gnal to generate interrupt
If IT1 =0 , INT1 is enabled by low signal to genera te interrupt
M
IE0 –External interrupt 0. set when INT0 is active( pin 3.2). Not related with
timer/counter
M
IT0 –If IT1 =1 , INT0 is enabled by falling edge si gnal to generate interrupt
If IT1 =0 , INT0 is enabled by low signal to genera te interrupt

UART (Universal Asynchronous Receiver and Transmitt er)
SBUF register holds the data
SCON register controls the data communication
PCON register controls data rate

Serial Port Control (SCON) Register
SM0– Serial port mode control bit 0
SM1 – Serial port mode control bit 1
SM2

Multi processor communication bit
SM2

Multi processor communication bit
- In mode 2 and 3, if set to 1 then interrupt is gen erated 9th bit of received
data is 1. No interrupt is generated if 9
th
bit is 0
- In mode 1 , no interrupt is generated until a stop bit is received
- in mode 0,it is cleared
REN- Receive enable control bit . Set to 1,to enable re ception.Cleared to 0 to disable
reception
TB8 – transmit bit 8. set and cleared by program in mode 2 and mode 3
RB8– Receive bit 8. set and cleared by program in mode 2 and mode 3
TI– Transmit interrupt flag
RI- Receive interrupt flag

Different mode of serial data transmission
MODE 0 I
Bit pattern
BAUD RATE = f/12
f:crystal frequency

Different mode of serial data transmission
MODE 1 P
Bit pattern
BAUD RATE = 2
SMOD
*k* oscillator freq /32*12*[256-TH1]
If SMOD=0 ,then k=1
If SMOD =1, then k =2
f:crystal frequency(11.0592 MHz)

Different mode of serial data transmission
MODE 2 P
Bit pattern
BAUD RATE = f/32,f/64

Different mode of serial data transmission
MODE 3 P
Bit pattern
BAUD RATE = 2
SMOD
*k*oscillator freq /32*12*[256-TH1]

INTERRUPT
Five interrupts are provided in 8051,three of these are generated
automatically by internal operation two interrupts are tri ggered by external
signals provided by circuitry that is connected to pins INT0 and INT1.
Timer flag interrupt:when a timer and counter overflow the corresponding
timer flag TF0 or TF1 is set to 1.
Serial port interrupt:if a data byte is received an interrupt bit, RI is set
to 1 in the SCON register when a data byte has binn transmittedan
interrupt bit TI is set to be 1.
External interrupt:pins ~INT0 and ~INT1 are used by external circuitry.
Input on these pins can set the interrupt flag IE0 and IE1 in th e TCON
reregister to 1 by two different methods.

Interrupt Enable Register Interrupt Enable Register
EA
-
global interrupt enable/disable:
EX1
-
bit enables or disables external 1 interrupt:
EA
-
global interrupt enable/disable:
0 - disables all interrupt requests.
1 - enables all individual interrupt requests.
ET2- Reserved
ES- enables or disables serial interrupt:
0 - UART system cannot generate an interrupt.
1 - UART system enables an interrupt.
ET1- bit enables or disables Timer 1 interrupt:
0 - Timer 1 cannot generate an interrupt.
1 - Timer 1 enables an interrupt.
EX1
-
bit enables or disables external 1 interrupt:
0 - change of the pin INT1 logic state cannot
generate an interrupt.
1 - enables an external interrupt on the pin INT1
state change.
ET0- bit enables or disables timer 0 interrupt:
0 - Timer 0 cannot generate an interrupt.
1 - enables timer 0 interrupt.
EX0- bit enables or disables external 0 interrupt:

Interrupt Vector Location Priority External hardware interrupt
0(INT0)
0003H Highest Timer 0 interrupt ( T0)
000BH
Timer 0 interrupt ( T0)
000BH
External hardware interrupt 1(INT1) 0013H
Timer 1interrupt ( 1) 001BH
Serial communication interrupt (RI
and TI)
0023H lowest

Interrupt priority Register Interrupt priority Register
PS
-
Serial Port Interrupt priority bit
PS
-
Serial Port Interrupt priority bit Priority 0
Priority 1
PT1- Timer 1 interrupt priority
Priority 0
Priority 1
PX1- External Interrupt INT1 priority
Priority 0
Priority 1
PT0- Timer 0 Interrupt Priority
Priority 0
Priority 1
PX0- External Interrupt INT0 Priority
Priority 0
Priority 1
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