MOSFET fabrication 12

MOSFET fabrication

1. MOSFET Fabrication MR. HIMANSHU DIWAKAR Assistant Professor JETGI MR. HIMANSHU DIWAKAR JETGI 1

2. Categories of Materials MR. HIMANSHU DIWAKAR JETGI 2

3. Semiconductors While there are numerous semiconductor materials available , by far the most popular material is Silicon . GaAs , InP and SiGe are compound semiconductors that are used in specialized devices . The success of a semiconductor material depends on how easy it is to process and how well it allows reliable high-volume fabrication. MR. HIMANSHU DIWAKAR JETGI 3

4. Lithography An IC consists of several layers of material that are manufactured in successive steps . Lithography is used to selectively process the layers, where the 2-D mask geometry is copied on the surface. MR. HIMANSHU DIWAKAR JETGI 4

5. Lithography The surface of the wafer is coated with a photosensitive material, the photoresist . The mask pattern is developed on the photoresist, with UV light exposure . Depending on the type of the photoresist (negative or positive ), the exposed or unexposed parts of the photoresist change their property and become resistant to certain types of solvents. Subsequent processing steps remove the undeveloped photoresist from the wafer. The developed pattern (usually) protects the underlying layer from an etching process. The photoresist is removed after patterning on the lower layer is completed. MR. HIMANSHU DIWAKAR JETGI 5

6. Etching Etching is a common process to pattern material on the surface. Once the desired shape is patterned with photoresist, the nprotected areas are etched away , using wet or dry etch techniques . MR. HIMANSHU DIWAKAR JETGI 6

7. Fabrication Process Flow: Basic Steps The simplified process sequence for the fabrication of CMOS integrated circuits on a p-type silicon substrate is shown in Fig. 2.1. MR. HIMANSHU DIWAKAR JETGI 7

8. Fig: 2.1 Simplified process sequence for the fabrication of the n-well CMOS integrated circuit with a single polysilicon layer, showing only major fabrication steps. MR. HIMANSHU DIWAKAR JETGI 8 Deposit pattern and polysilicon layer Implant source grain regions, substrate contacts Create contact windows, deposit and pattern metal layer Create n-well regions and channel stop regions Grow field oxide and gate oxide (thin oxide)

9. Fabrication Process Flow: Basic Steps The integrated circuit may be viewed as a set of patterned layers of doped silicon, polysilicon, metal , and insulating silicon dioxide . The process used to transfer a pattern to a layer on the chip is called lithography. Since each layer has its own distinct patterning requirements, the lithographic sequence must be repeated for every layer, using a different mask . To illustrate the fabrication steps involved in patterning silicon dioxide through optical lithography, let us first examine the process flow shown in Fig. 2.2. MR. HIMANSHU DIWAKAR JETGI 9

10. Fabrication Process Flow: Basic Steps MR. HIMANSHU DIWAKAR JETGI 10 Figure 2.2 Fabrication Of MOSFETs

11. Fabrication Process Flow: Basic Steps Figure 2.2 Process steps required for patterning of silicon dioxide. MR. HIMANSHU DIWAKAR JETGI 11

12. Fabrication Process Flow: Basic Steps Figure 2.2 Fabrication of MOSFETs MR. HIMANSHU DIWAKAR JETGI 12

13. Fabrication Process Flow: Basic Steps Figure 2.3. The result of a single lithographic patterning sequence on silicon dioxide, without showing the intermediate steps. Compare the un patterned structure (top) and the patterned structure (bottom) with Fig. 2.2(b) and Fig. 2.2(g), respectively. MR. HIMANSHU DIWAKAR JETGI 13

14. Fabrication of n-MOS Transistor The process starts with the oxidation of silicon substrate (Fig 2.4(a)) in which a relatively thick oxide layer is deposited on the surface. (Fig 2.4(a )) Then, the field oxide is selectively etched to expose the silicon surface on which the MOS transistor will be created (Fig. 24(c )). Following this step, the surface is covered with a thin, high-quality oxide layer, which will eventually form the gate oxide of the MOS transistor (Fig. 2.4(d)). On top of the thin oxide layer, a layer of polysilicon (polycrystalline silicon) is deposited (Fig. 2.4(e)). MR. HIMANSHU DIWAKAR JETGI 14

15. Fabrication of n-MOS Transistor Figure 2.4. Process flow for the fabrication of an n-type MOSFET on p-type silicon. MR. HIMANSHU DIWAKAR JETGI 15

16. Fabrication of n-MOS Transistor Figure 2.4. Process flow for the fabrication of an n-type MOSFET on p-type silicon . MR. HIMANSHU DIWAKAR JETGI 16

17. Fabrication of n-MOS Transistor Polysilicon is used both as gate electrode material for MOS transistors and also as an interconnect medium in silicon integrated circuits. Undoped polysilicon has relatively high resistivity. The-resistivity of polysilicon can be reduced, however, by doping it with impurity atoms . After deposition, the polysilicon layer is patterned and etched to form the interconnects and the MOS transistor gates (Fig. 2.4(f)). The thin gate oxide not covered by polysilicon is also etched away, which exposes the bare silicon surface on which the source and drain junctions are to be formed (Fig. 2.4(g)). MR. HIMANSHU DIWAKAR JETGI 17

18. Fabrication of n-MOS Transistor The entire silicon surface is then doped with a high concentration of impurities, either through diffusion or ion implantation (in this case with donor atoms to produce n-type doping). Figure 2.4(h) shows that the doping penetrates the exposed areas on the silicon surface, ultimately creating two n-type regions (source and drain junctions) in the p-type substrate . MR. HIMANSHU DIWAKAR JETGI 18

19. Fabrication of n-MOS Transistor Figure 2.4. Process flow for the fabrication of an n-type MOS transistor (continued). MR. HIMANSHU DIWAKAR JETGI 19

20. Fabrication of n-MOS Transistor Figure 2.4. Process flow for the fabrication of an n-type MOS transistor (continued). MR. HIMANSHU DIWAKAR JETGI 20

21. Fabrication of n-MOS Transistor Figure 2.4. Process flow for the fabrication of an n-type MOS transistor (continued). MR. HIMANSHU DIWAKAR JETGI 21

22. Fabrication of n-MOS Transistor Figure 2.4. Process flow for the fabrication of an n-type MOS transistor (continued). MR. HIMANSHU DIWAKAR JETGI 22

23. Thank you MR. HIMANSHU DIWAKAR JETGI 23