Multiprocessor Architecture (Advanced computer architecture)

A multiprocessor is a computer system with two or more central processing units (CPUs), with each one sharing the common main memory as well as the peripherals. This helps in simultaneous processing of programs.

The key objective of using a multiprocessor is to boost the system’s execution speed, with other objectives being fault tolerance and application matching.

A good illustration of a multiprocessor is a single central tower attached to two computer systems. A multiprocessor is regarded as a means to improve computing speeds, performance and cost-effectiveness, as well as to provide enhanced availability and reliability.

1. Multiprocessor Architecture Asst. Prof. Vani Malagar

2. Co n t e n ts Introduction to Multiprocessing Systems Types of Multiprocessing Systems Advantages of Multiprocessing Examples to Multiprocessors Interconnection Structures Asst. Prof. Vani Malagar

3. Introduction Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system. The term also refers to the ability of a system to support more than one processor and/or the ability to allocate tasks between them. The term ‘processor’ in multiprocessor can mean either a CPU or an input-output processor (IOP). There are some similarities between multiprocessor and multicomputer systems since both support concurrent operations. However, there exists an important distinction between the two. In case of multicomputer systems, several autonomous computers are connected through a network that may or may not communicate with each other. On the other hand, in a multiprocessor system, processors interact with each other through an operating system and cooperate in the solution of a problem . Eg . Satellite Launching Asst. Prof. Vani Malagar

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7. Advantages of Multiprocessing A benefit derived from multiprocessing is improved system performance. This happens because computations can proceed in parallel in one of two ways:- Multiple independent jobs can be made to operate in parallel. A single job can be partitioned into multiple parallel tasks. Increased Reliability: A failure or error in one part has a limited effect on the rest of the system. If a fault causes one processor to fail, a second processor can be assigned to perform the functions of the disabled processor. Increased Throughput: An increase in the number of processors completes the work in less time. It is important to note that doubling the number of processors does not halve the time to complete a job. Asst. Prof. Vani Malagar

8. Classification Multiprocessors are classified by the way their memory is organized. There are two main kinds of multiprocessing systems:- Tightly Coupled Systems (Common Shared Memory) Loosely Coupled Systems (Distributed Memory) Asst. Prof. Vani Malagar

9. Tightly Coupled Systems A multiprocessor system with common shared memory is classified as a s hared- memory or tightly coupled multiprocessor . This does not prevent each processor from having its own local memory . In fact, most commercial tightly coupled multiprocessors provide a cache memory with each CPU. In addition, there is a global common memory that all CPUs can access. Information can be therefore be shared among the CPUs by placing it in the common global memory. Symmetric multiprocessing (SMP) involves a multiprocessor system architecture where two or more identical processors connect to a single, shared main memory, have full access to all I/O devices , and are controlled by a single operating system instance that treats all processors equally, reserving none for special purposes. Asst. Prof. Vani Malagar

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11. Loosely Coupled Systems An alternative model of microprocessor is the distributed memory or loosely coupled system . Each processor element in a loosely coupled system has its own private local memory. The processors are tied together by a switching scheme designed to route information from one processor to another through a message-passing scheme . Loosely coupled systems are most efficient when the interaction between tasks is minima l unlike tightly coupled systems can tolerate a higher degree of interaction between tasks. Asst. Prof. Vani Malagar

12. Beowulf Cluster The Borg, a 52-node Beowulf cluster, is an example of a loosely-coupled system. It is a high-performance c om pu ti n g c l us t er p a r allel f r om inexpensive personal computer hardware. Asst. Prof. Vani Malagar

13. Tightly & Loosely Coupled Microprocessors Asst. Prof. Vani Malagar

14. Low coupling CPU’s located at different Locations No sharing of Buses , I/O devices etc Efficient when tasks running on different processors has minimal interaction between them (parallel applications). No memory conflict occurs. Processors communicate with each other by using message –passing. Data Rate is low (becoz of different Location) larger in size . Scalability is high. More Fault tolerant Complex due to additional hardware is req. Less portable Asst. Prof. Vani Malagar

15. Complete the Characteristics using the Tightly Coupled Microprocessor Asst. Prof. Vani Malagar

16. Types of Systems using the different Memory organization : UMA – (Tightly Coupled) –[Symmetric & Asymmetric] NUMA – (Tightly Coupled ) COMA – (Loosely Coupled ) Asst. Prof. Vani Malagar

17. UMA & NUMA Uniform memory access (UMA) is a shared memory architecture used in parallel computers. All the processors in the UMA model share the physical memory uniformly. The UMA model is suitable for general purpose and time sharing applications by multiple users. Non-uniform memory access (NUMA) is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to the processor. Under NUMA, a processor can access its own local memory faster than non-local memory (memory local to another processor or memory shared between processors). Asst. Prof. Vani Malagar

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19. UMA & NUMA Asst. Prof. Vani Malagar

20. Opteron Opteron is AMD's x86 server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64). The Opteron is a Non-Uniform Me m o r y Ac c e s s ( NUMA) architecture. Asst. Prof. Vani Malagar

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22. Structure of Multiprocessor Asst. Prof. Vani Malagar

23. Interconnection Structures Some of the physical forms available for establishing an interconnection network between the components of a multiprocessor system are : The collection of paths that connects the various modules such as CPU, I/O processors ,Memory etc in order to communicate with each other is called Interconnection structures. Asst. Prof. Vani Malagar

24. Physical Forms Includes : Time-shared common bus Multiport memory Crossbar switch Multistage switching Network Hypercube System Asst. Prof. Vani Malagar

25. Interconnection Topologies Asst. Prof. Vani Malagar

26. Time-Shared Common Bus Memo r y Unit CPU 1 CPU 2 CPU 3 IOP 1 IOP 2 The main  limitation  of  shared - bus  multiprocessors is that the  common bus  tends to be the primary source for contention, and thus imposes a  limit  on the number of processors in the system. Alternative architectural features are necessary to reduce the memory bandwidth demands and to increase the  bus  bandwidth. Overcome by Cache Asst. Prof. Vani Malagar

27. How to Overcome bus –oriented Interconnection Use of cache associated with each Processor. Use of hierarchy of buses : Local Bus System Bus Expansion Bus . Asst. Prof. Vani Malagar

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29. Multiport Memory MM 1 MM 2 MM 3 MM 4 CPU 1 CPU 2 CPU 3 CPU 4 14M C A0015 Asst. Prof. Vani Malagar

30. Cross Bar Switch Asst. Prof. Vani Malagar

31. Crossbar Switch MM 1 MM 2 MM 3 MM 4 CPU 1 CPU 2 CPU 3 CPU 4 Decrease the cables Asst. Prof. Vani Malagar

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35. Multistage Switching Applied to build large Multiprocessor systems like Omege , Butterfly etc The switching Network can connect any Input to any Output by making appropriate communication to each. CPU Memory End’s Switching elements Asst. Prof. Vani Malagar

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38. Hypercube Asst. Prof. Vani Malagar

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41. Formulae: N=8 ,then each node has direct log (8)=3 other nodes connected to it. Hypercube composed of N=2^n processor connected in an n-dimensional binary cube. E.g. N=1 then N=2^1=2 Processors N=2 then N=2^2=4 Processors Asst. Prof. Vani Malagar

42. References Computer System Architecture, 3 rd Edition by M. Morris Mano, Pearson Education Computer Architecture-A Quantitative Approach, 4 th Edition by Hennessy and Patterson http://en.wikipedia.org/wiki/Multiprocessing http://en.wikipedia.org/wiki/Symmetric_multiprocessing

43. Thank You!  12/09/14 Arpan Baishya 14M C A0015 Asst. Prof. Vani Malagar