{OS}-U2-ch2-Memory Management chapter(PPT).pdf
PratheekshaR3
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63 slides
Jun 29, 2024
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About This Presentation
Memory Management in OS
Slide Content
300040
420940
880000
024000
operating
system
120900
limit
420940
880000
024000
operating
system
120900
limit
EN > +
linking
time
loader
|
memory
binary
memor
image
time
loader
|
memory
binary
memor
image
relocation
register
logical
ddress
memory
register
logical
ddress
memory
operating
system
user
space
main memory
backing store
system
user
space
main memory
backing store
logical physical
address \ address
trap: addressing error
address \ address
trap: addressing error
3
process8 Lg — =)
process 2 process 2 process 2 process 2 >
process8 Lg — =)
process 2 process 2 process 2 process 2 >
logical physical J
address address f0000 ... 0000
CPU p Ta t Id
#111... 1111
physical
page table ELBA
address address f0000 ... 0000
CPU p Ta t Id
#111... 1111
physical
page table ELBA
frame
number
page table
logical
memory
number
page table
logical
memory
logical memo
address
Pe d
page
frame
number number
TLB hit
physical
address
|
TLB miss
page table
physical
memory
Pe d
page
frame
number number
TLB hit
physical
address
|
TLB miss
page table
physical
memory
valid-invalid bit
page table
for P,
page table
for P-
for P,
page table
for P-
outer page
table
900
page of
page table
table
900
page of
page table
logical address
outer page
table
page of
page table
outer page
table
page of
page table
page inner page offset
2
2nd outer page rpage innerpage offset
2
2nd outer page rpage innerpage offset
physical
logical address } address
p_| d ys —
Gam | hysical
{ hash ... physical
\ function / Laps]*] t Pir t memory
hash table
logical address } address
p_| d ys —
Gam | hysical
{ hash ... physical
\ function / Laps]*] t Pir t memory
hash table
logical
address physical
address
physical
memory
pid | p i 1
search |
address physical
address
physical
memory
pid | p i 1
search |
subroutine
main
program
main
program
segment
table
M
trap: addressing error physical memory
LY
table
M
trap: addressing error physical memory
LY
N
| stack | N
segment 3
symbol
segment 0 table
Sart segment 4
main
program
ment tabl
=e segment table
\ geament 1
logical address space
1400
segment 0
2400
segment 4
segment 2
segment 4
5700
6300
segment 4
6700 ———
physical memory
| stack | N
segment 3
symbol
segment 0 table
Sart segment 4
main
program
ment tabl
=e segment table
\ geament 1
logical address space
1400
segment 0
2400
segment 4
segment 2
segment 4
5700
6300
segment 4
6700 ———
physical memory
logical
address
linear physical
segmentation |_ address address | physical
1 paging
A rr E
page number page offset
à
address
linear physical
segmentation |_ address address | physical
1 paging
A rr E
page number page offset
à
logical address | selector
offset
descriptor table
segment descriptor
Le
32-bit linear address
offset
descriptor table
segment descriptor
Le
32-bit linear address
page
directory
directory
asar | wider | Pr a
(linear address)
lobal directory, middle directon page table offset
global
directory middle
directory
page
[PA ni page
global frame
directory entry page table
middle entry ”
Cra —l directory entry
register
lobal directory, middle directon page table offset
global
directory middle
directory
page
[PA ni page
global frame
directory entry page table
middle entry ”
Cra —l directory entry
register
End of Chapter 7
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