Simple Scalar Simulator of ACD Familiariation Labratory Manual

Lab Familairization

1. SimpleScalar Tool Set Familiarization Advanced Computer Architecture Laboratory 1

2. Lab o ratory #1 Familiarization 2

3. Outline What is an Architectural Simulator Categories of Architecture Simulators SimpleScalar Simulator Introduction Simulator Suite Overview Advantage Running the Simulator 3

4. A Computer Architecture Simulator What is an architectural simulator? A piece of software that models computer devices (components) to predict outputs and performance metric on a given input A Tool that reproduces the behavior of a computing device 4

5. Categories of Architecture Simulators Functional Simulators Emphasize on achieving the same function as the modeled component What to be done Implement the architecture Performance (Timing )Simulators Strive to accurately reproduce the performance/timing features of the target in addition to their functionalities When is done Implement the micro architecture 5

6. SimpleScalar What is SimpleScalar? An open source computer architecture simulator Developed by Todd Austin, while doing his Ph. D Consists of a collection of micro architecture simulators that emulate the microprocessor at different levels of detail A simulation suite/ tool set Performs fast, flexible and accurate simulation of modern processors that implement the SimpleScalar Architecture Which instruction set architecture (ISA) can it simulate ? What is a SimpleScalar Architecture? A close derivative of the MIPS architecture 6

7. SimpleScalar Suite Overview 7

8. Designed to measure the performance of several parts of a superscalar processor and its memory hierarchy This simulator is highly referenced in publications SimpleScalar Suite Overview 8

9. Extensible Open source project, no license required for noncommercial use User-extensible instruction, architecture format Portable (sort-of) Runs on Unix platforms (with older compiler + minor hacks) X86 support on-your-own Can support multiple ISAs Detailed Simulators of arbitrary detail are available SimpleScalar Advantage 9

10. Global Simulator Options Supported on all simulators - h - print simulator help message -d - enable debug message - i - start up in DLite ! debugger -q - quit immediately - config <file> - read config parameters from <file> - dumpconfig <file> - save config parameters into <file> SimpleScalar Suite Overview 10

11. sim -fast The fastest, least detailed simulator Instruction interpreter Does no time accounting, performs only functional simulation it executes each instruction serially, simulating no instructions in parallel Does not account for the behavior of pipelines, caches or any micro-architecture sim -safe A Slightly slower instruction interprester , i.e it also performs functional simulation But checks for correct alignment and access permissions for each memory reference Sim -fast and sim -safe Although similar, sim -fast and sim -safe are split Neither of the simulators accept any additional command-line arguments Both versions are very simple less than 300 lines of code—they therefore make good starting points for understanding the internal workings of the simulators SimpleScalar Suite Overview 11

12. sim -profile a functional simulator that produces voluminous and varied profile information Instruction interpreter and profiler Keeps track of and reports dynamic instruction counts, instruction class counts, usage of address modes…. can generate detailed profiles on instruction classes and addresses, text symbols, memory accesses, branches, and data segment symbols sim -profile takes the following command-line arguments, which toggle the various profiling features: - iclass instruction class profiling (e.g. ALU, branch) - iprof instruction profiling (e.g., bnez , addi ) - brprof branch class profiling (e.g., direct, calls, conditional) - amprof addr . mode profiling (e.g., displaced, R+R) - segprof load/store segment profiling (e.g., data, heap) - tsymprof execution profile by text symbol (functions) - dsymprof reference profile by data segment symbol - taddrprof execution profile by text address -all turn on all profiling listed above SimpleScalar Suite Overview 12

13. sim -cache A memory system simulator Functional cache simulator Can emulate a system with multiple level of instruction and data caches Each can be configured for different sizes and organizations Ideal for fast simulation of caches if the effect of cache performance on execution time is not needed SimpleScalar Suite Overview 13

14. sim -cache… sim -cache accepts the following arguments, in addition to the universal arguments described earlier -cache:dl1 < config > configures a level-one data cache -cache:dl2 < config > configures a level-two data cache -cache:il1 < config > configures a level-one instr. cache -cache:il2 < config > configures a level-two The cache configuration (< config >) is formatted as follows <name>:< nsets >:< bsize >:<assoc>:< repl > where: <name> cache name, must be unique < nsets > number of sets in the cache < bsize > block size (for TLBs, use the page size) <assoc> associativity of the cache (power of two) < repl > replacement policy (l | f | r), where l = LRU, f = FIFO, r = random replacement. The cache size is therefore the product of < nsets >, < bsize >, and <assoc> SimpleScalar Suite Overview 14

15. sim -cache To have a unified level in the hierarchy, “point” the instruction cache to the name of the data cache in the corresponding level, as in the following example: -cache:il1 il1:128:64:1:l -cache:il2 dl2 -cache:dl1 dl1:256:32:1:l -cache:dl2 ul2:1024:64:2:l The defaults used in sim -cache are as follows: L1 instruction cache: il1:256:32:1:l (8 KB) L1 data cache: dl1:256:32:1:l (8 KB) L2 unified cache: ul2:1024:64:4:l (256 KB) instruction TLB: itlb:16:4096:4:l (64 entries) data TLB: dtlb:32:4096:4:l (128 entries) SimpleScalar Suite Overview 15

16. The tool set takes binaries compiled for the SimpleScalar architecture and simulates their execution on one of several provided processor simulators A set of precompiled binaries (SPEC95) is available Running the Simulator 16

17. Running a program ./sim-cache -config <file> <executable file for SimpleScalar> <parameters> Example ./ sim -cache - config test.cfg compress95.ss Running the Simulator… 17

18. 18

19. sim-cache 19

20. The cache size is therefore the product of, <nsets>, <bsize>, <assoc>. il1:256:32:1:1 (8KB)‏ sim-cache …(cont.)‏ 20

21. sim-cache …(cont.)‏ 21

22. How to create binaries for the architecture? The simulator provides sets of precompiled binaries. Also provides a modified version of GCC that allows you to compile your own binaries. Binaries? 22

23. Compile your c code make myprog1 Run the simulator /usr/local/simplescalar/simplesim-2.0 /sim-cache myprog1 How to make a binary for SimpleScalar 23

24. Supported on all simulators -h - print simulator help message -d - enable debug message -i - start up in DLite! debugger -q - quit immediately -config <file> - read config parameters from <file> -dumpconfig <file> - save config parameters into <file> Global Simulator Options (cont.)‏ 24

25. -cache:dl1 <config> l1 data cache -cache:dl2 < config > l2 data cache -cache:il1 < config > l1 inst cache -cache:il2 < config > l2 inst cache -tlb:itlb < config > instruction TLB -tlb:dtlb < config > data TLB Cache Simulation Options 25