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Interconnect and Packaging
Lecture 3: Skin Effect
Chung-Kuan Cheng
UC San Diego
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Outlines
I.Transmission Line Model
II.Spectrum of Configurations
III.Skin Effect
IV.Coaxial Cable
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I. Transmission Line ModelRΔlLΔl
CΔl
RΔlLΔl
CΔl…
i(z,t)
RΔlLΔl RΔlLΔl
⚫Voltage drops through serial resistance and inductance
⚫Current reduces through shunt capacitance
⚫Resistance increases due to skin effect
⚫Shunt conductance is caused by loss tangent
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I. Interconnect Model (Constants)
•AWG (American Wire Gauge
•Wire Diameter = 2.54x10
-(AWG+10)/20
•Copper p= 2.2uohm-cm
•Copper thickness 1oz(/sqft)= 36um
•Electric Permittivity of Air 8.85x10
-12
F/m
•Magnetic Permeability of Air
•Characteristic Impedance of Air =8.376/ mH/104
7−
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II. Spectrum of Configurations jCjGLjR +=++= ))((
RLGC R L G C
0001 ( jwC)Capacitance
0010 (G )Shunt
0011 (G+jwC)Leaky Capacitance
0100( jwL) Inductance
0101( jwL)( jwC)Lossless LC Line
0110( jwL)(G )Skin Effect Derivation
0111( jwL)(G+jwC)Skin Effect + Permitivity
1000(R ) Resistance
1001(R )( jwC)RC Line
1010(R )(G )Leaky Resistance
1011(R )(G+jwC)Leaky RC Line
1100(R+jwL) Lossy Inductance
1101(R+jwL)( jwC)Lossy LC Line
1110(R+jwL)(G )Lossy and Leaky Inductance
1111(R+jwL)(G+jwC)Transmission Line
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III. Skin Effect
2
= 22
))((
LG
j
LG
LGj
CjGLjR
+
++=
Skin Depth
(Equivalent Depth of Uniform Current)
Assuming thatresistance and capacitance
are negligible.
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IV. Coaxial Cable02
,
2
),
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(
2
1
Z
R
ba
R ==+=
===
+===
776.3/
/1/ln0
0Zab
baab
da
d )/ln(
60
2
)/ln(
0 ab
ab
Z
r
=
10
IV. Coaxial Cable: InductanceabL
rdr
a
I
brLI
a
/ln
28
2),(
0
2
2
+=
= ab
I
ra
a
I
dr
r
I
dr
a
Ir
r
br
b
a
a
r
/ln
2
)(
4
22
),(
22
2
2
2
+−=
+=
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IV. Coaxial Cable: Inductancei
LR=
2
11
,
2
1
2
2
0
pp
R
pp
L
p
I
rdr
p
I
IL
i
i
====
==
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IV. Coaxial Cable: Inductance)/()(
/
)(
)(
2
)(
1
0
jj
m
jaI
jaI
a
Z
i
+=
=
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IV. Coaxial Cable: Impedance
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IV. Coaxial Cable: Impedance22
ACDC
RRR +=
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HW1: Remarks on z900
•Chip (Processor)
•10x17 sqmm, 38W, 918MHz, 250MIPS
•128bits to each L2 cache chip
•280um pitch chip to MCM
•MCM
•127x127sqmm, 5xTerabits/s, 459MHz
•20 Processors, 8x4MB Memory
•11Knets, 95mm max length on critical path
•1ns on MCM, 1.4ns off MCM
•33um think film pitch, 396um ceramic substrate
•101Kpins, 35.3pin/sqcm
•4224pins/1735pg to PCB