Universal shift register using verilog.p

universal shift register using verilog

1. Universal shift register using verilog

2. UNIVERSAL SHIFT REGISTER: A Universal Shift Register Is A Sequential Logic That Can Store Data Within And On Every Clock Pluse It Transfers Data To The Output Port The universal shift register can be used as 1. Parallel In Parallel Out shift register 2.Parallel In Serial Out shift register 3.Serial In Parallel Out shift register 4.Serial In Serial Out shift register

3. operation Mode of control (select) operation No change 1 Shift right 1 Shift left 1 1 Parallel load

4. Block diagram

5. VERILOG CODE

6. Test code

7. output

8. Advantages of universal shift register Multifunctionality:  left and right shifts, parallel load, and static hold can all be performed. Flexibility:  can be used in many different digital systems. Efficient:  reduces the hardware to manipulate the data . DISADVANTAGES OF UNIVERSAL SHIFT REGISTER Multifunctionality:  left and right shifts, parallel load, and static hold can all be performed. Flexibility:  can be used in many different digital systems. Efficient:  reduces the hardware to manipulate the data.

9. APPLICATIONS OF UNIVERSAL shift register Digital Signal Processing :  Digital signal processing   finds its applications in arithmetic operations and data manipulation . Frequency divider : obtains lower frequency clock signals. Counters and timers :  Counters  and timers perform timing and counting operations. THANKYOU k.Deepthisree submitted to 23P61A67A2 CH.Ranjith CSD-B (Asst.prof)