voltage divider and collector current with numericals (1).pdf

Potential divider

1. € 2.8_ VOLTAGE DIVIDER BIAS OR UNIVERSAL BIAS CIRCUIT

In both the fixed-bias and the emiterbias circuits, the quiescent values of , and Vg, Le, the
ain f of the transistor. We know that this current
sing circuit independent or less

quiescent point is a function of de current g
gain is sensitive to temperature and its value Keeps varying. Abi
dependant on ff such as the voltage-divider bias circuit is therefore desirable. A voltage divider

Fig, 2:13 Voltage divider bias or universal bias circuit
The voltage divider bins circuit can be analysed in two methods, First one is the exact method
and the second one is the approximate method. Let us analyse the circuit using each of these
methods,

2. Re

L*

ig) 2144 Bu cia of Wltage wider bias ect

28.1 Exact Analysis
The input side ofthe cireuit of Fig 2.13 is redraivn in Fig 2.14 for the de analysis,
The Thevenin equivalent ofthe circuit comprising of Y. R, and R, of Fi

2.14 is drawn in

Fig. 2.15(a).

A » moy

L E L e

à $

+
Fy a Ri 3
We 2
ns

— , | 4

o
Fig, 2:15 (a) Thevenin equivalent

(6) Determination of Ry,

(© Determination of Va:

3. The Thevenin equivalent of the circuit to the left of 8 and N in Fig, 2.14 can be written by
computing the Thevenin resistance and Thevenin voltage as seen between B and N.

To find the Thevenin resistance R,, Ve¢ is reduced to zero in the circuit of Fig. 2.15(a). The
resulting circuit is shown in Fig. 2.15(b).

From Fig. 2.15(b), Thevenin resistance is

Ry = RR,
RR
er Ro RAR

and from Fig. 2.15(c), Thevenin voltage is

Yq = Ye
” RAR,
The circuit of Fig. 2.14 is redrawn in Fig. 2.16 after substituting the Thevenin equivalent
between B and N.

tn
ya
Va + $ I
IL, 3

Fig: 2.16 Base circuit with Thevenin equivalent

Applying Kirchhof?’s voltage law to the base-emitter circuit in Fig 2.16, we get

Vy = Rave + Var * le Re (2.29)
Now th 2.30)
and 1. = Bly
Substituting in Equation (2.30)
ITA
or 1,= GDh, eso
Equation (2.29) now becomes
Vy Rapa Mae EXD IR
Ve Voge = Ry BF DRM,

4. ‘The collector circuit of Fig. 2.13 is shown in Fig 2.17.

Yee
f
|
te Sk
Yee
Ye
M mesh

Fig, 247 Collector circuit SF Val¥ege aii

iden bias

Applying KVL to the collector circuit of Fig. 2.17,

Using

Equation (2.33) thus become

Further from Fig. 2.1

1, and ¥-, become almost independent of ß. For this reason voltage divider bias is also calles

beta independent circuit

Transistor Saturation
When the transisitor is in saturation
Ver

1,

and i

ToRe* Ver + lo Re
la

Voom IelRe + Re)

Voltage across R,
KR,
Collector to ground voltage

= Base to ground voltage
A

is provided through the emitter resistance. As à resul

Very © OV
=1

5. Substuiting this condition in Equation (

and taking /, = I.. we get

+R]

239)

Leçon =
Note that Equation (2.39) is same as that obtained for emitter bias circuit in Equation (2.28)

8.2 Approximate Analysis

now that, the resistance in the emitter circuit gets reflected as (1 +B) R, in the base circuit
erefore the circuit between base and ground of Fig. 2.14 can be replaced by an equivalent
sistance. R,= (1 +) R, as shown in Fig, 2.18.

Fig: 2.18 ‘Input circuit for epproximate analysis

For the circuit of Fig.

18 using KCL we can write

I+ ly 2.40)
= (1+A)R,= BR, since B>1

if R= BR, =10R ean
ea 1, < 0.1 ,, hence J, can be neglected in Eq
1,

mh

Applying KVL to the circuit of Fig. 2.18 we get

Vee R]
Now A

poe Vale
EURER,

6. Observe that expression for Y, is identical to that of V,,

But v,

A

Fete

Va Vo es

‘The emitter current /, is given by

em
and 045
From the KVL equation of collector = emitter circuit
Using
Veg = Veo Hel Re# Re {27}
Bample23

ind the quiescent base current, collector current and V, for the circuit shown using silicon
transistor with F,, = 0.7 V and = 80.

(6) Determine the values of collector, emitter and base voltages with respect to ground

(©) Repeat (a) for = 150.

(4) Draw the de load line and locate the Q points corresponding to ß = 80 and f = 150.

@

I.
Ir
yop 4

Solution
Let us draw the de circuit with all volta

ind currents marked.

7. 16v

oa
oxo de
ES n
wat Ir
te
62 KOS. 40
® Bo EICHE
Aa er
RIN ra sy:
The base current an now be obtained from
i= Mant
Ry BH DRE N
_ _ 205v=orv

NOV tar na
IE

Le = Bly=80%21.42 w= 171 mA
PARA RD

16 V~1.71 mA [3.9 kQ + 0.68 kQ]= 8.17 V

16 V~(1.71 mA x 3.9KQ) = 9.33 V

71 MAX 0.68 k= 1.16 V
he base to ground voltage is

V,= Vag + Ve = OT V+ LGV = 186 V

8. (O Now for B = 150

Le
oT Rn +B+DR,

= 2.05 V-07V
794 K+ (150+ 00.68 ka 22 HA

1,97 150% 12.2 HA=1.83 mA
Vero = Veo" He(Re* Re)
= 16V- 1.83 mA G.9 KQ + 0.68 kQ) = 7.62 V

Let us now tabulate the quiescent currents and voltage for = 80 and À = 150,

B Foo Leo Vero
80 [214200 171 mA] 8.17 v

150 | 122 wa | 1:83 ma | 7.62 V

Observe that even on nearly doubling current gain , /,, reduces by almost half while J
and Ve, marginally change indicating good stability of the operating point, Compare this wit
the results obtained in Examples 2.1 and 2.6. In the case of the voltage divider bias circuit,

base current drastically reduces to keep the increase in collector current, due to increase in Pata

(@) DC load line

16 Y

A MN 90
lew © ETT TT

Tela)

3494

in

Si

a7

9. Gample 2.10

sorte voltage divider bias configuration shown below.

9 Find Je and Pe using exact analysis.

lp Find and V, using approximate analysis

(0) Find leva

() Compare the results obtained (a) and (b) and comment

Assume silicon transistor with = 150.

ET)

‘uation
Exact Analysis
RR OA
Ry = RAR 0KQ+4Kk0
Vo Ry _ (20 V) (4 kQ)
ETS
Vn Vow
Ry + (+ B)Re
182 V-07Y
= jp y= (150) (48610) = 0729 mA
Voom le [RR]
20 V-0.729 mA [10 ke LIE V

OO

= 3.63 kQ

.82 V

4.86 A

10. (b) Approximate Analysis

BR, = (150) (1.5 kQ)= 225 kQ

10R,

(10) (4 KO) = 40k

Note that R,>10R,
Hence we can use approximate analysis

Li2v

sn = 0746 mA

0.746 mA

Ver = Voom IelRe +R

= 20 V-0.746 mA [10k + 1.5 kQ]= 11.42 V

| oe Y 20v
© ls,” Roth, TORA SR

= 174 mA

(&) The results of exact and approximate analysis are compared in the following table

Parameter |) Exact Approximate
analysis analysis,
1 0.729 ma 0.746 mA
Ver 11.62V 1142 V

Observe that there is only a slight difference in the values since the condition 8 R; 2 10 Ris

satisfied.

11. 4 29 COLLECTOR FEEDBACK BIAS

The collector feedback bias circuit is realized by introducing feedback path from the cal
to base as shown in Fig. 2.19. The operating point of this circuit is less sensitive to variations in
temperature and f when compared to the fixed-bias and emitter-bias circuits.

Vee

Fig: 2/19) Collector Feedback bias circu

12. reins for Ty td Ie
Be eat is shawn in Fig, 220,

(Raza be ar
Writing the Kirchhoft’s voltage law equation for the base-emitter circuit, we get
Veo = et ID Ret Iy By + Vag + Te Re 2.47)
Now [pth = 1. since I, <I,
and Tal,
++ Equation (2.47) becomes

Yoo = (Dre +R + Part le Re
Substituting J, = BI,
BR Uy yt Vag BER,
DRE B Re +R) ly + Vag

Yoo = Var
Ry + BR + Re)
On comparision with Equation (2.17), it is clear that in the collector feedback circuit besides
‘collector resistance R, also gets reflected in the base circuit
lector current,

(2.48)

To = Bly

xn) ,
LE Ry BRe+R,) Gay)

ee

13. then PER + Ry) > Ry
Ry + BIR. Re] = BER + Red

Now Ec

250)

Observe thatthe collector current becomes independent of under these conditions and hence
is independent of variations in f.
Expression for Vg
Applying KVL to the collector-emitte circuit of Fig. 2.20 we get

Yoo = Rolle ly) + Vert La Re es)

As in the computation of base current,
[ot ly

1, and y=
TeRe* Veg * Tee

Veo=Ie(Re* Ry) es

Ve =
r.

which is the same as Equation (2.35) derived for the voltage-divider bias circuit.

Transistor Saturation
When the transistor is in saturation, Vo, = 0. From Equation (2.52), the collector eurent st

saturation is given by

1 Ta es
Eu RR,

Observe that J ju. is same as that of emitter bias and voltage divider bias circuits given in

Equations (2.28) and (2.39) respectively.

Example 2.14

‘The following circuit values are given for the collector feedback bias circuit of Fig. 2.19.
2V TkQ R,=220kQ R,= 1 kQ. Assuming silicon transistor

1d the operating point for the circuit shown using silicon transistor with = 90.

(b) Find the operating point for f = 150.

Solution
(a) When f= 90

Sata 1809
TB +R ~ P20 9004.7 RR)
1. = Bl, =90* 1542 pA = 1.39 mA

= 1542 A

14. Ver = Vel AR AR)

12 V=1.39 mA * (4.7 KO #1 KQ) = 4.08 V
(9) For A = 150
Vo = Var 12 V-07V
Ry+BRe+R,) — 220 KQ+150(4.7k0+1K0)
1. = BI,=150% 10.51 pA= 1.58 mA
Vou = Vo=leRet+R)

= 12 V-1.58 mA (4.7 kO +1 kQ)=3V

Let us now tabulate the results for f= 90 and f = 150.

0.51 1A

Bb Fig. Leo. Vero
90 | 15.42 yA | 1.39 ma | 4.08 V

150 | 10.51 ya | 1.58ma] 3v

Observe that a large change in f causes a small shift in the operating point well within the
active region.

Eamplezas 7
For the circuit shown below, determine
(©) Jyand J, (0) Y, and Y (©) MAE era
Assume silicon transistor with ß = 100.
EN

axe 2042.

1510

15. Solution
Let us write the de circuit by open circuiting all capacitors.

na El
>
ner
ar
Ve ~)~
ale,
1510 S|
!

From the circuit

470 KO + 220 KA = 690k
(2) 1,and 1,

7 30v-07V ana
RAFA +R) ORO HONG KR Ka] ~ 2007!

77

100) 20.07 1A)=2.01 mA
©) Vegand Y

Ver = Veo lelRe +R] (Neglecting /,]
= 30V-2.01 ma [6.2 b+ 1.5 kQ]= 14.52
Veo le R= 30 V ~ (2.01 mA) (62 K0)

(© Vand’,

Y, = 1,R¿=I¿R¿=(2.01 mA) (1.5 KO)

= Le 30.

OV 389mA
Ro+R¿ 62 kQ+15Kk0

Foca