Novel Space Vector Based Hybrid PWM Methods For A Three Level Inverter Department of Electrical & Electronics Engineering G.Pulla Reddy Engineering College (Autonomous): Kurnool By A.LAKSHMI PRASANNA 159X1D4315 Under The Guidance of C.HARINATHA REDDY M.Tech,(Ph.D) Assistant Professor
Introduction Three level voltage source inverters are increasingly employed for dc-ac power conversion It provides better performance in terms of semiconductor losses, common mode voltages than a two-level inverter . This project brings out the method for designing Hybrid PWM Techniques to reduce line ripple current.
Two-level inverter using sinusoidal PWM and SVPWM using MATLAB are shown earlier . Comparision of THD in Sinusoidal and SVPWM FREQUENCY THD IN SINUSOIDAL THD IN SVPWM 50 12.23% 9.75% 45 11.13% 9.17% 42 10.67% 8.84%
Three Level Diode Clamped Inverter The most commonly used multilevel topology is the diode clamped inverter, in which the diode is used as the clamping device to clamp the dc bus voltage so as to achieve steps in the output voltage.
The switching status of a single phase is as follows: Switching status for a phase state Pole voltage 1.S a = ON,S b =ON (or) S ’ a = OFF,S ’ b =OFF +1 V DC / 2 2.S a =OFF,S b =ON (or) S ’ a =ON,S ’ b =OFF 0V 3. .S a = OFF,S b =OFF (or) S ’ a = ON,S ’ b =ON -1 -V DC / 2
Voltage Vector Diagram of a three-level Inverter 3 Level I nverter S witching states consists of 27 switching states
The six regions in a voltage vector diagram of a three level inverter are
First Region of the three level inverter hexagon works as a two level inverter hexagon